boot_loader_1.c

The combined demo is dedicated for S1C33L05, so DMT33L05 should be used to load and run the demo. F

//--------------------------------------------------------------------------------- 
//
//      Copyright (C) SEIKO EPSON CORP. 2004 
//
//      GROUP			: SEE LSI
//      FILE                    : boot_loader_1.c
//      MODULE                  : nand flash booting
//      Function description    : second boot code put in page0/block1 of boot nand flash
//      Revision history        :                                                                                               
//                                Date            userName         Description
//                                2004/02/24      Stella	      start
//
//      Notes                   : 
//
//---------------------------------------------------------------------------------


// following const defined by customer
#define SDRAM_VECTOR_ADDR 	0x2100000			
#define MAX_CODE_LOOP		10240		//now max page cnt 2^16 


/*Flash command	*/								
#define	 READ_MODE1_CMD		0x0000
#define	 NAND_Flash_BASE_ADDRESS 0x4000000 	/*both flash and SMC map to area 15*/

#define	FLASH_ECC_ERROR		0x1

//---------------------------------------------------------------------------------
// macro definition
//---------------------------------------------------------------------------------
#define SET_BUSY_INPUT		*(volatile unsigned char*)0x300f47&=0xdf 	/* set PD5 input*/
#define CHECK_BUSY		(*(volatile unsigned char*)0x300f46 & 0x20 )	/* PD5=L mean busy*/
#define	SET_ALE_H		*(volatile unsigned char*)0x402d9|=0x20		//set p25 H	
#define	SET_ALE_L		*(volatile unsigned char*)0x402d9&=0xdf		//set p25 L	

#define SET_CLE_H		*(volatile unsigned char*)0x402d9|=0x10		//set p24 H
#define SET_CLE_L		*(volatile unsigned char*)0x402d9&=0xef		//set p24 L


/* ECC setting*/
#define EN_ECC			*(volatile unsigned char*)0x300102|=0x01 	/* enable ecc check*/
#define DIS_ECC			*(volatile unsigned char*)0x300102 &=0xfe	/* disable ecc check*/
#define SET_DEVICE_16		*(volatile unsigned char*)0x300103|=0x01 	/* 16 bit device*/
#define RESET_ECC		*(volatile unsigned char*)0x300101|=0x01 	/* reset ECC */
#define CHECK_ECC_READY		(*(volatile unsigned char*)0x300101& 0x1) 	/* if can start ecc check*/

#define ECC_AREA0_COL_ADDR	(unsigned char*)0x300104


/* nand flash only control port register */
#define SET_NAND_CE_CE		*(volatile unsigned char*)0x30004a &=0xf3	/* set p51 as CE15&16 for CE don't-care flash*/




int SDRAM_BOOT(void);
typedef void (*pFunc)();
/*******************************************************************************
 * boot
 *   Type : void
 *   Ret val :  none
 *   Argument : void
 *   Function : Boot program. This is second boot area, store in 2nd page of nand flash
 *******************************************************************************/
int SDRAM_BOOT(void)
{
	unsigned short ReadCnt,i;
    	unsigned short  *ECCRet;
    	unsigned short getRedt[3],LoopCnt;
    
    	unsigned long	ulAddress;
	pFunc 		JP_ADDR;
     	
     	
	
	/* Inital SDRAM*/
	// Area 4 (USB DMA) & Area 6 (internal extend IO) is the internal area
  	*(volatile unsigned short *)0x48132 = 0x0200 | 0x0100;
	/* CE function 10 */
    	*(volatile unsigned char*)0x48131=0x04;
    	
    	/*Set BSL system & SWAIT enable */
  	*(volatile unsigned char*)0x4812e|=0x09;      /*BSL system */

      
        /* Set misc control register protect flag write enable*/
  	*(volatile unsigned char *)0x300f2f = 0x96;
  	/* Set A0/BSL mode*/
  	*(volatile unsigned char *)0x300f38 = 0x01;       /*BSL system*/
                                             
                                             
 	 /* Set misc control register protect flag write enable*/
  	*(volatile unsigned char *)0x300f2f = 0x96;
  	/* Set BCLG enable*/
  	*(volatile unsigned char *)0x300f33 = 0x80;
  	
  	
  	/*_init_sdramc*/
  	 /* Fix BCLK clock*/
  	*(volatile unsigned char *)0x4812f|= 0x80;

  	/* Set SDRAM pin share*/
  	/* PA, P2, P6, and P5*/
  	*(volatile unsigned char *)0x300f60 = 0x1a;       /*PA2, #SDRAS, #SDCAS*/
  	*(volatile unsigned char *)0x402dc|= 0x01;        /*P30 wait function*/

  	*(volatile unsigned char *)0x300044 = 0x05;       /*#SDWE, SDCKE*/
  	*(volatile unsigned char *)0x30004c = 0x57;       /*DQM, SDA10, SDCLK*/
  	*(volatile unsigned char *)0x30004a&= 0x3f;       /*#SDCE*/
  	*(volatile unsigned char *)0x30004a|= 0x80;       /*#SDCE*/


  	*(volatile unsigned short *)0x3a0204 = 0x0177;    /*Auto Refresh count*/
  	*(volatile unsigned short *)0x3a0206 = 0x008f;    /*Disable Self Refresh*/
  	*(volatile unsigned short *)0x3a0208 = 0x0002;    /*SDRAM speed setup*/
  	*(volatile unsigned short *)0x3a0200 = 0x000b;    /*SDRAM size setup*/


    	/* SDRAM initial*/
    	*(volatile unsigned short *)0x3a0202 = 0x0002;    /*Pre-Charge*/
	
    	*(volatile unsigned short *)0x3a0202 = 0x0001;	 /*Auto-Refresh*/
    		
    	*(volatile unsigned short *)0x3a0202 = 0x0001;	 /*Auto-Refresh*/

    	*(volatile unsigned short *)0x3a0202 = 0x0004;    /*Mode-Register-Set*/


  	*(volatile unsigned short *)0x3a0210 = 0x000f;    /*Areas, High performance, IQB on*/
	
	
	
	for (LoopCnt=0;LoopCnt<MAX_CODE_LOOP; LoopCnt++){
	      
		SET_CLE_H;		/* set CLE H*/
		*(volatile unsigned char*)NAND_Flash_BASE_ADDRESS=READ_MODE1_CMD;	/* read mode 1*/
	
		SET_CLE_L;		/* set CLE low*/
		SET_ALE_H;		/* set ALE h*/
	
		ulAddress=0x8000+LoopCnt*512;
		if (ulAddress==0x86700)
			asm("nop");
		*(volatile unsigned char*)NAND_Flash_BASE_ADDRESS=(unsigned char)(ulAddress & 0x000000ff);;	/* send col address*/
		*(volatile unsigned char*)NAND_Flash_BASE_ADDRESS=(unsigned char)((ulAddress & 0x0001fe00)>>9);	/* send page address*/
		*(volatile unsigned char*)NAND_Flash_BASE_ADDRESS=(unsigned char)((ulAddress & 0x01fe0000)>>17);	/* send block l address*/
		*(volatile unsigned char*)NAND_Flash_BASE_ADDRESS=(unsigned char)((ulAddress & 0x02000000)>>25);   /* send block h address*/
	
		SET_ALE_L;		/*set ALE L*/
	
		
		asm("nop");
		asm("nop");
		asm("nop");
		asm("nop");
         	asm("nop");  
         	asm("nop");
         	asm("nop");  
         	asm("nop");
         	asm("nop");  
         	asm("nop");
		
		do{}
		while (!CHECK_BUSY);
		#ifdef ECC
			RESET_ECC;
			EN_ECC;	
		#endif
		
		for (ReadCnt=0; ReadCnt< 512; ReadCnt+=2){
			*(volatile unsigned short*)(SDRAM_VECTOR_ADDR+LoopCnt*512+ReadCnt)=*(volatile unsigned short*)NAND_Flash_BASE_ADDRESS;
		}
		#ifdef ECC
			DIS_ECC;
	
			getRedt[0]=*(volatile unsigned short*)NAND_Flash_BASE_ADDRESS;
			getRedt[1]=*(volatile unsigned short*)NAND_Flash_BASE_ADDRESS;
			getRedt[2]=*(volatile unsigned short*)NAND_Flash_BASE_ADDRESS;
			
			do{}
			while (!CHECK_ECC_READY);
		
			ECCRet=(unsigned short *)ECC_AREA0_COL_ADDR;
		
			
			for (i=0; i<3; i++)
      				if (*ECCRet++ != getRedt[i])
        				return FLASH_ECC_ERROR;
		#endif
		
		
	}
	
	*(volatile unsigned char*)0x4812d=0x59;
	*(volatile unsigned int*)0x48134=(unsigned int)SDRAM_VECTOR_ADDR;
	

	JP_ADDR=(pFunc)(*(volatile unsigned int*)SDRAM_VECTOR_ADDR);
	JP_ADDR();
}