📄 init.lst
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174 1 OSCXCN = 0x67; // start external oscillator with
175 1 // 22.1184MHz crystal
176 1
177 1 for (n=0; n < 256; n++) ; // XTLVLD blanking interval (>1ms)
178 1
179 1 while (!(OSCXCN & 0x80)) ; // Wait for crystal osc. to settle
C51 COMPILER V8.01 INIT 03/07/2007 14:09:12 PAGE 4
180 1
181 1 OSCICN = 0x88; // select external oscillator as SYSCLK
182 1 // source and enable missing clock
183 1 // detector
184 1 //----------------------------------------------------------------
185 1 // Reference Control Register Configuration
186 1 //----------------------------------------------------------------
187 1 REF0CN = 0x00; // Reference Control Register
188 1 //----------------------------------------------------------------
189 1 // ADC Configuration
190 1 //----------------------------------------------------------------
191 1 AMX0CF = 0x60; // AMUX Configuration Register
192 1 AMX0SL = 0x00; // AMUX Channel Select Register
193 1 ADC0CF = 0xF8; // ADC Configuration Register
194 1 ADC0CN = 0x00; // ADC Control Register
195 1
196 1 ADC0LTH = 0x00; // ADC Less-Than High Byte Register
197 1 ADC0LTL = 0x00; // ADC Less-Than Low Byte Register
198 1 ADC0GTH = 0xFF; // ADC Greater-Than High Byte Register
199 1 ADC0GTL = 0xFF; // ADC Greater-Than Low Byte Register
200 1
201 1 AMX1SL = 0x00; // AMUX1 Channel Select Register
202 1 ADC1CF = 0xF8; // ADC1 Configuration Register
203 1 ADC1CN = 0x00; // ADC1 Control Register
204 1 //----------------------------------------------------------------
205 1 // DAC Configuration
206 1 //----------------------------------------------------------------
207 1 DAC0CN = 0x00; // DAC0 Control Register
208 1 DAC0L = 0x00; // DAC0 Low Byte Register
209 1 DAC0H = 0x00; // DAC0 High Byte Register
210 1
211 1 DAC1CN = 0x00; // DAC1 Control Register
212 1 DAC1L = 0x00; // DAC1 Low Byte Register
213 1 DAC1H = 0x00; // DAC1 High Byte Register
214 1 //----------------------------------------------------------------
215 1 // SPI Configuration
216 1 //----------------------------------------------------------------
217 1 SPI0CN = 0x00; // SPI Control Register
218 1 SPI0CFG = 0x00; // SPI Configuration Register
219 1 SPI0CKR = 0x00; // SPI Clock Rate Register
220 1 //----------------------------------------------------------------
221 1 // UART Configuration
222 1 //----------------------------------------------------------------
223 1 /*
224 1 SCON0 = 0x40; // Serial Port Control Register
225 1 SADEN0 = 0x00; // Serial 0 Slave Address Enable
226 1 SADDR0 = 0x00; // Serial 0 Slave Address Register
227 1
228 1 PCON = 0x00; // Power Control Register
229 1
230 1 SCON1 = 0x00; // Serial Port 1 Control Register
231 1 SADEN1 = 0x00; // Serial 1 Slave Address Enable
232 1 SADDR1 = 0x00; // Serial 1 Slave Address Register
233 1 */
234 1 SADEN0 = 0x00; // Serial 0 Slave Address Enable
235 1 SADDR0 = 0x00; // Serial 0 Slave Address Register
236 1 //----------------------------------------------------------------
237 1 // SMBus Configuration
238 1 //----------------------------------------------------------------
239 1 SMB0CN = 0x00; // SMBus Control Register
240 1 SMB0ADR = 0x00; // SMBus Address Register
241 1 SMB0CR = 0x00; // SMBus Clock Rate Register
C51 COMPILER V8.01 INIT 03/07/2007 14:09:12 PAGE 5
242 1 //----------------------------------------------------------------
243 1 // PCA Configuration
244 1 //----------------------------------------------------------------
245 1 PCA0MD = 0x00; // PCA Mode Register
246 1 PCA0CN = 0x00; // PCA Control Register
247 1 PCA0H = 0x00; // PCA Counter/Timer High Byte
248 1 PCA0L = 0x00; // PCA Counter/Timer Low Byte
249 1
250 1 //Module 0
251 1 PCA0CPM0 = 0x00; // PCA Capture/Compare Register 0
252 1 PCA0CPL0 = 0x00; // PCA Counter/Timer Low Byte
253 1 PCA0CPH0 = 0x00; // PCA Counter/Timer High Byte
254 1
255 1 //Module 1
256 1 PCA0CPM1 = 0x00; // PCA Capture/Compare Register 1
257 1 PCA0CPL1 = 0x00; // PCA Counter/Timer Low Byte
258 1 PCA0CPH1 = 0x00; // PCA Counter/Timer High Byte
259 1
260 1 //Module 2
261 1 PCA0CPM2 = 0x00; // PCA Capture/Compare Register 2
262 1 PCA0CPL2 = 0x00; // PCA Counter/Timer Low Byte
263 1 PCA0CPH2 = 0x00; // PCA Counter/Timer High Byte
264 1
265 1 //Module 3
266 1 PCA0CPM3 = 0x00; // PCA Capture/Compare Register 3
267 1 PCA0CPL3 = 0x00; // PCA Counter/Timer Low Byte
268 1 PCA0CPH3 = 0x00; // PCA Counter/Timer High Byte
269 1
270 1 //Module 4
271 1 PCA0CPM4 = 0x00; // PCA Capture/Compare Register 4
272 1 PCA0CPL4 = 0x00; // PCA Counter/Timer Low Byte
273 1 PCA0CPH4 = 0x00; // PCA Counter/Timer High Byte
274 1
275 1 //----------------------------------------------------------------
276 1 // Timer Configuration
277 1 //----------------------------------------------------------------
278 1 CKCON = 0x00; // Clock Control Register
279 1 TH0 = 0x00; // Timer 0 High Byte
280 1 TL0 = 0x00; // Timer 0 Low Byte
281 1 TH1 = 0x00; // Timer 1 High Byte
282 1 TL1 = 0x00; // Timer 1 Low Byte
283 1 TMOD = 0x00; // Timer Mode Register
284 1 TCON = 0x00; // Timer Control Register
285 1
286 1 RCAP2H = 0xFF; // Timer 2 Capture Register High Byte
287 1 RCAP2L = 0xB8; // Timer 2 Capture Register Low Byte
288 1 TH2 = 0x00; // Timer 2 High Byte
289 1 TL2 = 0x00; // Timer 2 Low Byte
290 1 T2CON = 0x34; // Timer 2 Control Register
291 1
292 1 TMR3RLL = 0x00; // Timer 3 Reload Register Low Byte
293 1 TMR3RLH = 0x00; // Timer 3 Reload Register High Byte
294 1 TMR3H = 0x00; // Timer 3 High Byte
295 1 TMR3L = 0x00; // Timer 3 Low Byte
296 1 TMR3CN = 0x00; // Timer 3 Control Register
297 1
298 1 RCAP4H = 0x00; // Timer 4 Capture Register High Byte
299 1 RCAP4L = 0x00; // Timer 4 Capture Register Low Byte
300 1 TH4 = 0x00; // Timer 4 High Byte
301 1 TL4 = 0x00; // Timer 4 Low Byte
302 1 T4CON = 0x00; // Timer 4 Control Register
303 1
C51 COMPILER V8.01 INIT 03/07/2007 14:09:12 PAGE 6
304 1 //----------------------------------------------------------------
305 1 // Reset Source Configuration
306 1 //
307 1 // Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0
308 1 //------------------------------------------------------------------
309 1 // R | R/W | R/W | R/W | R | R | R/W | R
310 1 //------------------------------------------------------------------
311 1 // JTAG |Convert | Comp.0 | S/W | WDT | Miss. | POR | HW
312 1 // Reset |Start | Reset/ | Reset | Reset | Clock | Force | Pin
313 1 // Flag |Reset/ | Enable | Force | Flag | Detect| & | Reset
314 1 // |Enable | Flag | & | | Flag | Flag | Flag
315 1 // |Flag | | Flag | | | |
316 1 //------------------------------------------------------------------
317 1 // NOTE! : Comparator 0 must be enabled before it is enabled as a
318 1 // reset source.
319 1 //
320 1 // NOTE! : External CNVSTR must be enalbed through the crossbar, and
321 1 // the crossbar enabled prior to enabling CNVSTR as a reset source
322 1 //------------------------------------------------------------------
323 1
324 1 RSTSRC = 0x00; // Reset Source Register
325 1 //----------------------------------------------------------------
326 1 // Interrupt Configuration
327 1 //----------------------------------------------------------------
328 1
329 1 IE = 0x00; //Interrupt Enable
330 1 IP = 0x00; //Interrupt Priority
331 1 EIE1 = 0x00; //Extended Interrupt Enable 1
332 1 EIE2 = 0x00; //Extended Interrupt Enable 2
333 1 EIP1 = 0x00; //Extended Interrupt Priority 1
334 1 EIP2 = 0x00; //Extended Interrupt Priority 2
335 1 // other initialization code here...
336 1
337 1 } //End of config
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 283 ----
CONSTANT SIZE = ---- ----
XDATA SIZE = ---- ----
PDATA SIZE = ---- ----
DATA SIZE = ---- ----
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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