nandpara.h

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/**
 * @file nandpara.h
 * @brief nandflash parameter define
 * This file define all nandfalsh parameter
 * Copyright (C) 2004 Anyka (GuangZhou) Software Technology Co., Ltd.
 * @author Junhua Zhao
 * @date 2006-01-25
 * @version 1.0
 * @ref AK3221 technical manual. HY27UF1G2M series nandflash datasheet.
 */

#ifndef __NANDPARA_H_
#define __NANDPARA_H_

#define DEFAULT_SYSTEM_CLOCK	84000000	/* default system clock:84M Hz*/

/* define  parameter of the nandfalsh  */
//#define NFLASH_CAPACITY			0x8000000	//128M bytes
#define NFLASH_CAPACITY			    0x10000000	//128M bytes
#define NFLASH_PHY_PGSIZE		0x800		//2K bytes
#define NFLASH_BLK_SIZE			0x20000		//128K bytes
#define NFLASH_RST_TIME			10			//reset wait time 25us
#define NFLASH_RD_TIME			1
#define NFLASH_CMD_TIMING		0x000c3671		//command timing	
#define NFLASH_DATA_TIMING		0x000d3637		//data timing

/* define nandflash command set */
#define NFLASH_READ0			0x00
#define NFLASH_READ1			0x30
#define NFLASH_RD_CYCLES		0x02	//the bus cycle's times for read command

#define NFLASH_RESET			0xff
#define NFLASH_STATUS_READ		0x70
#define NFLASH_READ_ID			0x90
/* end define  parameter of the nandfalsh  */

/* define the computational nandflash parameter */
#define NFLASH_LOG_PGSIZE		0x0200		//512 bytes
#define NFLASH_LOG_PGNUM		(NFLASH_PHY_PGSIZE/NFLASH_LOG_PGSIZE)		//logical page num each physical page
#define NFLASH_PHY_PGNUM		(NFLASH_CAPACITY/NFLASH_PHY_PGSIZE)

#if (NFLASH_PHY_PGSIZE<=0xFF)
	#define OFFSET_ADDR_CYCLES		1	//the bus cycle's times for setting offset address in page
#else
	#define OFFSET_ADDR_CYCLES		2	//the bus cycle's times for setting offset address in page
#endif

#if (NFLASH_PHY_PGNUM<=0x100)
	#define PAGE_ADDR_CYCLE				1		//the bus cycle's times for set page address
#else
	#if (NFLASH_PHY_PGNUM<=0x10000)
		#define PAGE_ADDR_CYCLE			2		//the bus cycle's times for set page address
	#else
		#if (NFLASH_PHY_PGNUM<=0x1000000)
			#define PAGE_ADDR_CYCLE		3		//the bus cycle's times for set page address
		#else
			#define PAGE_ADDR_CYCLE		4		//the bus cycle's times for set page address
		#endif
	#endif
#endif

#define RESET_WAIT_TIME			((NFLASH_RST_TIME * (DEFAULT_SYSTEM_CLOCK/1000000) +1023)/ 1024)
#define READ_WAIT_TIME			((NFLASH_RD_TIME * (DEFAULT_SYSTEM_CLOCK/1000000) +1023)/ 1024)

#endif	//__NANDPARA_H_