📄 isd51.lst
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A51 MACRO ASSEMBLER ISD51 06/06/2005 17:50:27 PAGE 1
MACRO ASSEMBLER A51 V7.08a
OBJECT MODULE PLACED IN ISD51.OBJ
ASSEMBLER INVOKED BY: C:\Keil\C51\BIN\A51.EXE ISD51.A51 SET(SMALL) DEBUG EP
LOC OBJ LINE SOURCE
1 $nomod51
2 ;------------------------------------------------------------------------------
3 ; ISD51 In-System Debugger for 8051 based microcontrollers
4 ; Copyright KEIL ELEKTRONIK GmbH and Keil Software, Inc. 2000 - 2003
5 ; Version 2.05
6 ;------------------------------------------------------------------------------
7 ; ISD51.A51: This module needs to be added to the user application
8 ;
9 ; Copy this file to your project folder and add the copy to your uVision2
10 ; project. You can customize several parameters of the ISD51 In-System
11 ; Monitor within this configuration file.
12 ;
13 ; ISD51 V2.00: added new features like user I/O and hardware breakpoints.
14 ; ISD51 V2.02: fixed a problem when single stepping through putchar
15 ;
16 ; ISD51 V2.03: adapted for TI AUX Interupt (EAI Bit save/restore added)
17 ; ISD51 V2.04: 'Stop' command did not break program execution on targets that
18 ; do not have hardware breakpoints
19 ; ISD51 V2.05: when ISD51 is not started, getkey return value was not in R7.
20 ;------------------------------------------------------------------------------
21
22 ;#include "ISD51.H"
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A51 MACRO ASSEMBLER ISD51 06/06/2005 17:50:27 PAGE 2
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0098 +1 69 sfr SCON = 0x98;
0099 +1 70 sfr SBUF = 0x99;
00A8 +1 71 sfr IE = 0xA8;
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0099 +1 74 sbit TI = SCON^1;
0098 +1 75 sbit RI = SCON^0;
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00AC +1 78 sbit ES = IE^4;
00AF +1 79 sbit EA = IE^7;
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+1 81 CLR_TI MACRO ; Clear Transmit Interrupt Flag
+1 82 CLR TI ; No CPU register may be changed here
+1 83 ENDM
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+1 85 SET_TI MACRO ; Set Transmit Interrupt Flag
+1 86 SETB TI ; No CPU register may be changed here
+1 87 ENDM
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+1 89 JNB_TI MACRO label ; Jump if Transmit Interrupt Flag not set
+1 90 JNB TI,label ; PSW may be modified without saving it
+1 91 ENDM
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+1 93 WR_SBUF MACRO ; Write ACC to SBUF
+1 94 MOV SBUF,A ; ACC and PSW may be modified without saving it
+1 95 ENDM
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+1 97 CLR_RI MACRO ; Clear Receiver Interrupt Flag
+1 98 CLR RI ; No CPU register may be changed here
+1 99 ENDM
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+1 101 JB_RI MACRO label ; Jump if Receiver Interrupt Flag set
+1 102 JB RI,label ; ACC and PSW may be modified without saving it
+1 103 ENDM
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+1 105 JNB_RI MACRO label ; Jump if Receiver Interrupt Flag not set
+1 106 JNB RI,label ; ACC and PSW may be modified without saving it
+1 107 ENDM
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+1 109 RD_SBUF MACRO ; Return SBUF in ACC
+1 110 MOV A,SBUF ; ACC and PSW may be modified without saving it
+1 111 ENDM
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+1 113 CLR_ES MACRO ; Disable Serial Interrupt
+1 114 CLR ES ; No CPU register may be changed here
+1 115 ENDM
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+1 117 SET_ES MACRO ; Enable Serial Interrupt
+1 118 SETB ES ; No CPU register may be changed here
+1 119 ENDM
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+1 121 JNB_ES MACRO label ; Jump if Receiver Interrupt Flag not set
+1 122 JNB ES,label ; ACC and PSW may be modified without saving it
+1 123 ENDM
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A51 MACRO ASSEMBLER ISD51 06/06/2005 17:50:27 PAGE 3
+1 125 SAVE_ES MACRO ; Save Serial Interrupt enable bit to Carry
+1 126 MOV C,ES ; ACC and PSW may be modified without saving it
+1 127 ENDM
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+1 129 RESTO_ES MACRO ; Restore Serial Interrupt enable bit from Carry
+1 130 MOV ES,C ; ACC and PSW may be modified without saving it
+1 131 ENDM
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0023 +1 133 SINTRVEC EQU 0x23 ; Interrupt Vector Address of UART interrupt
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+1 161 CWRITE MACRO
+1 162 MOV DPL, R0
+1 163 MOV DPH, A
+1 164 MOV A, CBLK
+1 165 MOVX @DPTR,A
+1 166 CLR A
+1 167 ENDM
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