source2.list

来自「Intel IXP1200开发指南. 包含IXP1200网络处理器PPT演示与」· LIST 代码 · 共 56 行

+version:  7/2/1998
+switches:  
+uca_version: 2.0.83
+uca_date: Aug  2 2001 00:02:16
+current_date: Tue Jul 02 10:59:41 2002

.cpu_version 0x00000001 0 15

.%num_contexts 4

.%local_mem0_mode rel
.%local_mem1_mode rel

:self# 3
*-- no_destination F0
*base gpr_a_rel C0
*$xfer2 sram_rel E0
.0 DC000900 common_code
	.import_var __chip_id __chip_revision __uengine_id
	.%line 8 "D:\yxp\ixp1200\讲座\Intel IXP1200开发指南\开发指南5之demo工程\开发指南(5)之demo工程\demo3\Source2.uc" 1
	;Reference Instructions
	;TA
	;sram (about ctx_swap)
	;(Microengine 0  run source0.uc
	; Microengine 1  run source1.uc
	; Microengine 2  run source2.uc
	; Microengine 3  run source3.uc)
	immed[$xfer2,0x12]
.1 A00E0139 common_code
	.%line 10 "D:\yxp\ixp1200\讲座\Intel IXP1200开发指南\开发指南5之demo工程\开发指南(5)之demo工程\demo3\Source2.uc" 0
	;To perform SRAM[2]:=2
	sram[write, $xfer2, base, 2, 1], ctx_swap,defer[1]; Ask for SRAM completion signal and swap out this thread causing it waiting for the signal. Using with defer[1].
.2 D8000000 common_code
	.%line 11 "D:\yxp\ixp1200\讲座\Intel IXP1200开发指南\开发指南5之demo工程\开发指南(5)之demo工程\demo3\Source2.uc" 0
	immed[base,0]
.3 F8000187 common_code
	.%line 12 "D:\yxp\ixp1200\讲座\Intel IXP1200开发指南\开发指南5之demo工程\开发指南(5)之demo工程\demo3\Source2.uc" 1
	self#:
	.%line 13 "D:\yxp\ixp1200\讲座\Intel IXP1200开发指南\开发指南5之demo工程\开发指南(5)之demo工程\demo3\Source2.uc" 1
	br[self#]
+ucode_end



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