source3.list

Intel IXP1200开发指南. 包含IXP1200网络处理器PPT演示与Demo Code.

+version:  7/2/1998
+switches:  
+uca_version: 2.0.83
+uca_date: Aug  2 2001 00:02:16
+current_date: Tue Jul 02 10:59:41 2002

.cpu_version 0x00000001 0 15

.%num_contexts 4

.%local_mem0_mode rel
.%local_mem1_mode rel

:self# 3
*-- no_destination F0
*base gpr_a_rel C0
*$xfer3 sram_rel E0
.0 DC000980 common_code
	.import_var __chip_id __chip_revision __uengine_id
	.%line 8 "D:\yxp\ixp1200\讲座\Intel IXP1200开发指南\开发指南5之demo工程\开发指南(5)之demo工程\demo3\Source3.uc" 1
	;Reference Instructions
	;TA
	;sram (about voluntary_swap)
	;(Microengine 0  run source0.uc
	; Microengine 1  run source1.uc
	; Microengine 2  run source2.uc
	; Microengine 3  run source3.uc)
	immed[$xfer3,0x13]
.1 D8000000 common_code
	.%line 9 "D:\yxp\ixp1200\讲座\Intel IXP1200开发指南\开发指南5之demo工程\开发指南(5)之demo工程\demo3\Source3.uc" 1
	immed[base,0]
.2 A00801B9 common_code
	.%line 11 "D:\yxp\ixp1200\讲座\Intel IXP1200开发指南\开发指南5之demo工程\开发指南(5)之demo工程\demo3\Source3.uc" 1
	;To perform SRAM[3]:=3
	sram[write, $xfer3, base, 3, 1], voluntary_swap;Not Ask for SRAM completion signal , swap out this thread and it not waiting for any signal and just being READY.
.3 F8000187 common_code
	.%line 12 "D:\yxp\ixp1200\讲座\Intel IXP1200开发指南\开发指南5之demo工程\开发指南(5)之demo工程\demo3\Source3.uc" 1
	self#:
	.%line 13 "D:\yxp\ixp1200\讲座\Intel IXP1200开发指南\开发指南5之demo工程\开发指南(5)之demo工程\demo3\Source3.uc" 1
	br[self#]
+ucode_end



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