per561.per

trace32调试器附带的指令集模拟器

; MPC561 on chip peripherals

width 0x7
base d:(data.long(spr:638.)&0x0e)*0x200000                                 

tree "BBC"
;begin include file imb/bbc56x.ph
;parameters:
group spr:560.--560. 
 line.long 0x0 "BBCMCR,BBC Module Configuration Register" 
  bitfld.long 0x0 31. "R ,Read Only" "no,yes"
  bitfld.long 0x0 30. "  D ,Data Only" "no,yes"
  bitfld.long 0x0 29. "  S ,Supervirsor Only" "no,yes"
  bitfld.long 0x0 28. "  ACTE ,Array Current Test Enable" "no,yes"
  bitfld.long 0x0 27. "  OCTE ,Open Circuit Test Enable" "no,yes"
  bitfld.long 0x0 25.--26. "  OCTS ,Open Circuit Test Select" "0,1,2,3"
  bitfld.long 0x0 24. "  SDTE ,Soft Defects Test Enable" "no,yes"
 textline "              "
  bitfld.long 0x0 13. "  BE ,Burst Enable" "no,yes"
  bitfld.long 0x0 12. "  EIRE ,Exception Table Relocation Enable" "no,yes"
  bitfld.long 0x0 11. "  EIR ,Enhanced External Interrupt Relocation Enable" "no,yes"
  bitfld.long 0x0 10. "  EN_COMP ,Enable Compression" "no,yes"
  bitfld.long 0x0 0x9 "  EXC_COMP ,Exception Compression" "no,yes"
  bitfld.long 0x0 0x8 "  DECOMP_SC_EN ,Decompression Show Cycle Enable" "no,yes"
 textline "              "
  bitfld.long 0x0 0x6--0x07 "  OERC ,Other Exceptions Relocation Control" "0K,64K,512K,0x3FE000"
  bitfld.long 0x0 0x5 "  BTEE ,Branch Target Entires Enable" "no,yes"
  bitfld.long 0x0 0x4 "  BCMEE ,Branch Conditional misspredicted Entry Enable" "no,yes"
  bitfld.long 0x0 0x1 "  DCAE ,Decompressor Configuration Access Enable" "no,yes"
  bitfld.long 0x0 0x0 "  TST ,BBC Test Mode" "no,yes"

group spr:529.--529. 
 line.long 0x0 "EIBADR,External Interrupt Relocation Table Base Address" 
 
group spr:528.--528. 
 line.long 0x0 "GRA,Global Region Attribute Register" 
  bitfld.long 0x0 31. "             ENR0 ,Enable Region 0 of IMPU" "no,yes"
  bitfld.long 0x0 30. "  ENR1 ,Enable Region 1 of IMPU" "no,yes"
  bitfld.long 0x0 29. "  ENR2 ,Enable Region 2 of IMPU" "no,yes"
  bitfld.long 0x0 28. "  ENR3 ,Enable Region 3 of IMPU" "no,yes"
 textline "                           "
  bitfld.long 0x0 10.--11. "  PP ,Protection" "00,01,10,11"
  bitfld.long 0x0 0x7--0x9 "  COMP_ISB ,Compression ISB" "0,1,2,3,4,5,6,7"
  bitfld.long 0x0 0x6 "  G ,Guarded Attribute for Region" "no,yes"
  bitfld.long 0x0 0x5 " CO_REG ,Compressed Region" "no,yes"
  bitfld.long 0x0 0x4 " EC_REG ,Enable Compressed Code Region" "no,yes"
  bitfld.long 0x0 0x3 " BTBINH ,BTB Inhibit" "no,yes"

group spr:784.--784.
 line.long 0x0 "RBA0,Region Base Address Register 0"
  hexmask.long 0x0 12.--31. 0x1000	"RA ,Region Address"
group spr:816.--816.
 line.long 0x0 "RA0,Region Attribute Register 0"
  hexmask.long 0x0 12.--31. 0x1000 0x1000 "RS ,Region Size"
  bitfld.long 0x0 10.--11. "  PP ,Protection" "00,01,10,11"
  bitfld.long 0x0 0x7--0x9 "  COMP_ISB ,Compression ISB" "0,1,2,3,4,5,6,7"
  bitfld.long 0x0 0x6 "  G ,Guarded Attribute for Region" "no,yes"
  bitfld.long 0x0 0x5 " CO_REG ,Compressed Region" "no,yes"
  bitfld.long 0x0 0x4 " EC_REG ,Enable Compressed Code Region" "no,yes"
  bitfld.long 0x0 0x3 " BTBINH ,BTB Inhibit" "no,yes"
group spr:785.--785.
 line.long 0x0 "RBA1,Region Base Address Register 1"
  hexmask.long 0x0 12.--31. 0x1000	"RA ,Region Address"
group spr:817.--817.
 line.long 0x0 "RA1,Region Attribute Register 1"
  hexmask.long 0x0 12.--31. 0x1000 0x1000 "RS ,Region Size"
  bitfld.long 0x0 10.--11. "  PP ,Protection" "00,01,10,11"
  bitfld.long 0x0 0x7--0x9 "  COMP_ISB ,Compression ISB" "0,1,2,3,4,5,6,7"
  bitfld.long 0x0 0x6 "  G ,Guarded Attribute for Region" "no,yes"
  bitfld.long 0x0 0x5 " CO_REG ,Compressed Region" "no,yes"
  bitfld.long 0x0 0x4 " EC_REG ,Enable Compressed Code Region" "no,yes"
  bitfld.long 0x0 0x3 " BTBINH ,BTB Inhibit" "no,yes"
group spr:786.--786.
 line.long 0x0 "RBA2,Region Base Address Register 2"
  hexmask.long 0x0 12.--31. 0x1000	"RA ,Region Address"
group spr:818.--818.
 line.long 0x0 "RA2,Region Attribute Register 2"
  hexmask.long 0x0 12.--31. 0x1000 0x1000 "RS ,Region Size"
  bitfld.long 0x0 10.--11. "  PP ,Protection" "00,01,10,11"
  bitfld.long 0x0 0x7--0x9 "  COMP_ISB ,Compression ISB" "0,1,2,3,4,5,6,7"
  bitfld.long 0x0 0x6 "  G ,Guarded Attribute for Region" "no,yes"
  bitfld.long 0x0 0x5 " CO_REG ,Compressed Region" "no,yes"
  bitfld.long 0x0 0x4 " EC_REG ,Enable Compressed Code Region" "no,yes"
  bitfld.long 0x0 0x3 " BTBINH ,BTB Inhibit" "no,yes"
group spr:787.--787.
 line.long 0x0 "RBA3,Region Base Address Register 3"
  hexmask.long 0x0 12.--31. 0x1000 "RA ,Region Address"
group spr:819.--819.
 line.long 0x0 "RA3,Region Attribute Register 3"
  hexmask.long 0x0 12.--31. 0x1000 0x1000 "RS ,Region Size"
  bitfld.long 0x0 10.--11. "  PP ,Protection" "00,01,10,11"
  bitfld.long 0x0 0x7--0x9 "  COMP_ISB ,Compression ISB" "0,1,2,3,4,5,6,7"
  bitfld.long 0x0 0x6 "  G ,Guarded Attribute for Region" "no,yes"
  bitfld.long 0x0 0x5 " CO_REG ,Compressed Region" "no,yes"
  bitfld.long 0x0 0x4 " EC_REG ,Enable Compressed Code Region" "no,yes"
  bitfld.long 0x0 0x3 " BTBINH ,BTB Inhibit" "no,yes"

;end include file imb/bbc56x.ph
tree.end

tree "USIU"
;begin include file imb/siu56x.ph
;parameters:
group spr:638.--638. "SIU System Configuration"
 line.long 0x0 "IMMR,Internal Memory Map Register"
  hexmask.long 0x0 24.--31. 0x1 "PARTNUM ,Part Number"
  hexmask.long 0x0 16.--23. 0x1 " MASKNUM ,Mask Number"
  bitfld.long 0x0 11. " FLEN ,Flash Enable" "no,yes"
  bitfld.long 0x0 8. " CLES ,Core Little Endian Swap" "no,yes"
  bitfld.long 0x0 0x1--0x3 " ISB ,Internal Memory Space" "$00000000,$00400000,$00800000,$00c00000,$01000000,$01400000,$01800000,$01c00000"
group 0x2fc000--0x2fc023
 line.long 0x0 "SIUMCR,SIU Module Configuration"
  bitfld.long 0x0 31. "EARB ,External Arbitration" "int,ext"
  bitfld.long 0x0 28.--30. "  EARP ,External Arbitration Request Priority" "0,1,2,3,4,5,6,7"
  bitfld.long 0x0 23. "  DSHW ,Data Showcycles" "no,yes"
  bitfld.long 0x0 21.--22. "  DBGC ,Debug Pins Configuration" "BDM/ext_master,watch/ext_master,BDM/full_trace,full_watch"
  bitfld.long 0x0 20. "  DBPC ,Debug Port Configuration" "bdm,jtag"
  bitfld.long 0x0 19. "  ATWC ,Address Type Write enable Configuration" "we,at"
 textline "                "
  bitfld.long 0x0 17.--18. "GPC ,General pins Configuration" "pflow/l-watch,I/O,frz/l-watch,frz/irq"
  bitfld.long 0x0 16. " DLK ,Debug Register Lock" "no,yes"
  bitfld.long 0x0  13.--14. " SC ,Single Chip Select" "full_bus,16-bit,pflow_only,single"
  bitfld.long 0x0  12. " RCTX ,Reset Configuration - Timer Expired Configuration" "rstconf,texp"
  bitfld.long 0x0  10.--11. " MLRC ,Multi Level Reservation Control" "all_irq_pins,trace/master,all_I/O,trace/master/io"
 textline "                "
  bitfld.long 0x0 0x7 "MTSC ," "no,yes"
  bitfld.long 0x0 0x6 "  NOSHOW ,Instruction Show Cycles Disable" "OFF,ON"
  bitfld.long 0x0 0x5 "  ECIEN ,Enhanced Interrupt Controller Enable" "dis,ena"
  bitfld.long 0x0 0x4 "  LPMASK_EN ,Low Priority Request Masking Enabled" "dis,ena"
 line.long 0x4 "SYPCR,System Protection Control"
  hexfld.word 0x4 "SWTC ,Software Watchdog Timer Count"
  hexfld.byte 0x6 "  BMT ,Bus Monitor Timing"
  bitfld.long 0x4 0x7 "  BME ,Bus Monitor Enable" "dis,ena"
  bitfld.long 0x4 0x3 "  SWF ,Software Watchdog Freeze" "dis,ena"
  bitfld.long 0x4 0x2 "  SWE ,Software Watchdog Enable" "dis,ena"
  bitfld.long 0x4 0x1 "  SWRI ,Software Watchdog Reset/Interrupt Select" "int,res"
  bitfld.long 0x4 0x0 "  SWP ,Software Watchdog Prescale" "no,yes"
 line.word 0x8 "SWT,Software Watchdog Timer"
 line.word 0x0e "SWSR,Software Service Register"
 line.long 0x20 "TESR,Transfer Error Status"
  bitfld.long 0x20 13. "IEXT ,Instruction External Transfer Error Acknowledge" "ok,err"
  bitfld.long 0x20 12. "  IBMT ,Instruction Transfer Monitor Time Out" "ok,err"
  bitfld.long 0x20 0x5 "  DEXT ,Data External Transfer Error Acknoledge" "ok,err"
  bitfld.long 0x20 0x4 "  DBM ,Data Transfer Monitor Time Out" "ok,err"

group 0x2fc280--0x2fc291 "System Clock"
 line.long 0x0 "SCCR ,System Clock and Reset Control Register"
  bitfld.long 0x0 31. "DBCT ,Disable backup clock for timers." "0,1"
  bitfld.long 0x0 29.--30. "  COM,Clock Output Mode" "clk_full/bus_full,clk_red/bus_red,clk_off/bus_full,clk_off/bus_red"
  bitfld.long 0x0 28. "  DCSLR ,Disable clock switching at loss of lock during reset." "ena,dis"
  bitfld.long 0x0 27. "  MFPDL ,MF and Pre-Divider Lock" "no,yes"
  eventfld.long 0x0 26. "  LPML ,LPM Lock" "no,yes"
  bitfld.long 0x0 25. "  TBS ,Time Base Source" "osc,sclk"
  bitfld.long 0x0 24. "  RTDIV ,RTC Clock Divide" "/4,/512"
 textline "                "
  bitfld.long 0x0 23. "STBUC ,Switch to Back-Up Clock Control" "no,yes"
  bitfld.long 0x0 22. "  CQDS ,Clock Quarter Drive Strength" "no,yes"
  bitfld.long 0x0 21. "  PRQEN ,Power Management Request Enable" "low,hig"
  bitfld.long 0x0 20. "  RTSEL ,RTC Circuit Input Source Select" "osc,ext"
  bitfld.long 0x0 19. "  BUCS ,Back-Up Clock Status" "no,yes"
  bitfld.long 0x0 17.--18. "  EBDF ,External Bus Division Factor" "/1,/2,res,res"
  bitfld.long 0x0 16. "  LME ,Limp Mode Enable" "dis,ena"
 textline "                "
  bitfld.long 0x0 14.--15. "EECLK ,Enable Engineering Clock" "1/1,1/2,buc,dis"
  bitfld.long 0x0 0x8--13. "  ENGDIV ,Engineering Clock Division Factor" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64"
  bitfld.long 0x0 0x4--0x6 "  DFNL ,Division Factor Low Frequency" "/2,/4,/8,/16,/32,/64,res,/256"
  bitfld.long 0x0 0x0--0x2 "  DFNH ,Division Factor High Frequency" "/1,/2,/4,/8,/16,/32,/64,res"
 line.long 0x4 "PLPRCR,PLL Low Power and Reset Control Register"
  bitfld.long 0x4 20.--31. "MF ,Multiplication Factor" "x1,x2,x3,x4,x5,x6,x7,x8,x9,x10,x11,x12,x13,x14,x15,x16,x17,x18,x19,x20,x21,x22,x23,x24,x25,x26,x27,x28,x29,x30,x31,x32"
  eventfld.long 0x4 18. "  LOCS ,Loss of Clock Status" "no,yes"
  eventfld.long 0x4 17. "  LOCSS ,Loss of Clock Sticky" "no,yes"
  eventfld.long 0x4 16. "  SPLS ,System PLL Lock Status" "no,yes"
 textline "                "
  eventfld.long 0x4 15. "SPLSS ,System PLL Lock Sticky" "no,yes"
  eventfld.long 0x4 14. "  TEXPS ,Timer Expired Status" "no,yes"
  eventfld.long 0x4 12. "  TMIST ,Timer Interrupt Status" "no,yes"
  bitfld.long 0x4 10. "  CSRC ,Clock Source" "H,L"
  bitfld.long 0x4 0x8--0x9 "  LPM ,Low Power Modes" "00,01,10,11"
 textline "                "
  bitfld.long 0x4 0x7 "CSR ,Checkstop Reset Enable" "dis,ena"
  bitfld.long 0x4 0x6 "  LOLRE ,Loss of Lock Reset Enable" "dis,ena"
  bitfld.long 0x4 0.--4. "  DIVF ,Pre-Divider" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16"
 line.word 0x0c "COLIR,Change of Lock Interrupt"
  hexfld.byte 0x0c "    COLIRQ ,Change of Lock Interrupt Request Level"
  bitfld.word 0x0c 0x7 "  COLIS ,Change of Lock Interrupt Status" "no,yes"
  bitfld.word 0x0c 0x6 "  COLIE ,Change of Lock Interrupt Enable" "dis,ena"
 line.word 0x10 "VSRMSR,VDDSRM Control Register" 
  hexmask.word 0x10 11.--14. 0x1 "    LVSRS ,Loss of VDDSRM Sticky"
  bitfld.word 0x10 10. "  VSRDE ,VDDSRM Detection Circuit is Enabled" "ena,dis"
  bitfld.word 0x10 9. "  LVDECRAM ,Loss of VDDSRM for DECRAM Sticky" "no,yes"
 line.long 0x8 "RSR,Reset Status Register"
  eventfld.long 0x8 31. "EHRS ,External Hard Reset Status" "no,yes"
  eventfld.long 0x8 30. "  ESRS ,External Soft Reset Status" "no,yes"
  eventfld.long 0x8 29. "  LLRS ,Loss of Lock Reset Status" "no,yes"
  eventfld.long 0x8 28. "  SWRS ,Software Watchdog Reset Status" "no,yes"
 textline "                "
  eventfld.long 0x8 27. "CSRS ,Check Stop Reset Status" "no,yes"
  eventfld.long 0x8 26. "  DBHRS ,Debug Port Hard Reset Status" "no,yes"
  eventfld.long 0x8 25. "  DBSRS ,Debug Port Soft Reset Status" "no,yes"
  eventfld.long 0x8 24. "  JTRS ,JTAG Reset Status" "no,yes"
 textline "                "
  eventfld.long 0x8 23. "OCCS ,On Chip Clock Switch" "no,yes"
  eventfld.long 0x8 22. "  ILBC ,Illegal Bit Change" "no,yes"
  eventfld.long 0x8 21. "  GPOR ,Glitch Detect on POR Pin" "no,yes"
  eventfld.long 0x8 20. "  GHRST ,Glitch Detect on HRESET Pin" "no,yes"
  eventfld.long 0x8 19. "  GSRST ,Glitch Detect on SRESET Pin" "no,yes"

wgroup 0x2fc380--0x2fc38b "Clocks and Reset Keys"
 hide.long 0x0 "SCCRK,System Clock Control Key"
 hide.long 0x4 "PLPCRK,PLL, Low Power and Reset Control Register Key"
 hide.long 0x8 "RSRK,Rset Status Register Key"

group 0x2fc000--0x2fc023 "SIU Interrupt Configuration"
 line.long 0x10 "SIPEND,Interrupt Pending Register"
  bitfld.long 0x10 31. "IRQ0 ,Interrupt Request 0" "no,yes"
  bitfld.long 0x10 30. "  LVL0 ,Level Request 0" "no,yes"
  bitfld.long 0x10 29. "  IRQ1 ,Interrupt Request 1" "no,yes"
  bitfld.long 0x10 28. "  LVL1 ,Level Request 1" "no,yes"
 textline "                "
  bitfld.long 0x10 27. "IRQ2 ,Interrupt Request 2" "no,yes"
  bitfld.long 0x10 26. "  LVL2 ,Level Request 2" "no,yes"
  bitfld.long 0x10 25. "  IRQ3 ,Interrupt Request 3" "no,yes"
  bitfld.long 0x10 24. "  LVL3 ,Level Request 3" "no,yes"
 textline "                "
  bitfld.long 0x10 23. "IRQ4 ,Interrupt Request 4" "no,yes"
  bitfld.long 0x10 22. "  LVL4 ,Level Request 4" "no,yes"
  bitfld.long 0x10 21. "  IRQ5 ,Interrupt Request 5" "no,yes"
  bitfld.long 0x10 20. "  LVL5 ,Level Request 5" "no,yes"
 textline "                "
  bitfld.long 0x10 19. "IRQ6 ,Interrupt Request 6" "no,yes"
  bitfld.long 0x10 18. "  LVL6 ,Level Request 6" "no,yes"
  bitfld.long 0x10 17. "  IRQ7 ,Interrupt Request 7" "no,yes"
  bitfld.long 0x10 16. "  LVL7 ,Level Request 7" "no,yes"