interruptvector.c

Freescale 智能车竞赛代码

 #include "BaseInc.h"
 
 #pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
 __interrupt void SCI0_ISR(void) {			//接受数据
   unsigned char nTmp;
   nTmp = SCI0SR1;
  //Order = SCI_GetByte(0);
  //if(Order==0x22) PTP=PTP_PTP1_MASK;
  //else   
  //{
  //PTP_PTP1=0;
  // CRGINT_RTIE=1;	
  //}

}
 #pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void SCI1_ISR(void) {			//接受数据
   unsigned char nTmp;
   nTmp = SCI1SR1;
  //Order = SCI_GetByte(1);
  //PIDInit();
  ////PTP_PTP1=0;
  //startcar();
 

}
//================================RTI interrupt===================================   
#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void RTI_ISR(void){
   uchar chTmp; 
   CRGFLG |= 0x80;
   chTmp = PACN0;
   //if(chTmp != 0)m_nCnt++;
   PACN0 = 0;
   ICPAR |= ICPAR_PA0EN_MASK; //start the next
    
}
//=============================ATD0 interrupt==================================
 #pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void ATD0_ISR(void) {
  uchar chTemp;
  
  chTemp=ATD0DR0H;		 //读数据寄存器清除所有中断标志
  m_cSampNum++;
  #if 1
  if(m_cSampNum < CCD_COLS){
    //m_nCnt++;
    ATD0CTL5=0x06;	     //启动AD转换
    if(m_cSampNum>=0){
      m_aImage[m_cRowNum][m_cSampNum] =  chTemp;
      //m_nCnt++;
    }
  }else{
    //m_cSampNum = -2;  //空出1次AD转换时间
    m_cSampNum = -8;
  }
  #endif
  
  #if 0
  if(m_cFrameSampeFlag == 0) {
    m_nCnt++;
    //ATD0CTL5=0x04;	     //启动AD转换
  }
  ATD0CTL5=0x06;	     //启动AD转换
  //m_nCnt2++;
  #endif
}
//======================IRQ interrupt==================
#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void IRQ_ISR(void){
  
  m_cCCDFrameShiftFlag = m_cCCDFrameShiftFlag|CCD_VS;
  
  if(m_cCCDFrameShiftFlag == 0xfe){							//  ~~~~|____
  													
    //OpenMDC();
    m_cFrameSyncFlag = 1;
    m_nCnt2++;
    
  }
  m_cCCDFrameShiftFlag = m_cCCDFrameShiftFlag<<1;
  if(m_cFrameSyncFlag == 1){
    m_cMuxPulseCnt++;
    if(m_cMuxPulseCnt == SAMPLE_START_CNT){
      m_cFrameSampeFlag = 1;
      m_cFrameSyncFlag = 0;
      m_cMuxPulseCnt = 0;
    }
  }
  if(m_cFrameSampeFlag == 1){
     if(m_cCCDRowNum%14==0)
     {
        m_cRowNum++;
        ATD0CTL5 = 0x06;	     //启动AD转换
     }
     m_cCCDRowNum++;
     //m_cSampNum = -2;
     //m_cSampNum = -3;
     m_cSampNum = -8;
     if(m_cRowNum == CCD_ROWS-1){
       m_cFrameSampeFlag = 0;
       m_cFrameCompleteFlag = 1;
     }
  }else{
     m_cCCDRowNum = -1;
     m_cRowNum = -1;
  }
}
////////////Modulus Down Counter interrupt service//////////
#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void MDCounter_ISR(void) {
    uchar chTmp;
    MCFLG_MCZF = 1;
    CloseMDC();
    m_cFrameSampeFlag = 1;
    
   #if 0 
   // PORTA_BIT0 = ~  PORTA_BIT0;
    m_nCnt2++;
    if(m_nCnt2==100){
      m_nCnt2 = 0;
      m_cFrameSampeFlag = 1;
      
      chTmp = PACN0;
   if(chTmp != 0)m_nCnt++;
   PACN0 = 0;
   ICPAR |= ICPAR_PA0EN_MASK; //start the next
    }
    //MCCTL_MCEN = 0;
    #endif
}  
     
  
  
#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void UnimplementedISR(void)
{
   /* Unimplemented ISRs trap.*/
   asm BGND;
}
typedef void (*near tIsrFunc)(void);
const tIsrFunc _vect[] @0xFF80 = {     /* Interrupt table */
        UnimplementedISR,                 /* vector 63*/
        UnimplementedISR,                 /* vector 62*/
        UnimplementedISR,                 /* vector 61*/
        UnimplementedISR,                 /* vector 60 */
        UnimplementedISR,                 /* vector 59 */
        UnimplementedISR,                 /* vector 58 */
        UnimplementedISR,                 /* vector 57 */
        UnimplementedISR,                 /* vector 56 */
        UnimplementedISR,                 /* vector 55 */
        UnimplementedISR,                 /* vector 54 */
        UnimplementedISR,                 /* vector 53 */
        UnimplementedISR,                 /* vector 52 */
        UnimplementedISR,                 /* vector 51 */
        UnimplementedISR,                 /* vector 50 */
        UnimplementedISR,                 /* vector 49 */
        UnimplementedISR,                 /* vector 48 */
        UnimplementedISR,                 /* vector 47 */
        UnimplementedISR,                 /* vector 46 */
        UnimplementedISR,                 /* vector 45 */
        UnimplementedISR,                 /* vector 44 */
        UnimplementedISR,                 /* vector 43 */
        UnimplementedISR,                 /* vector 42 */
        UnimplementedISR,                 /* vector 41 */
        UnimplementedISR,                 /* vector 40 */
        UnimplementedISR,                 /* vector 39 */
        UnimplementedISR,                 /* vector 38 */
        UnimplementedISR,                 /* vector 37 */
        UnimplementedISR,                 /* vector 36 */
        UnimplementedISR,                 /* vector 35 */
        UnimplementedISR,                 /* vector 34 */
        UnimplementedISR,                 /* vector 33 */
        UnimplementedISR,                 /* vector 32 */
        UnimplementedISR,                 /* vector 31 */
        UnimplementedISR,                 /* vector 30 */
        UnimplementedISR,                 /* vector 29 */
        UnimplementedISR,                 /* vector 28 */
        UnimplementedISR,                 /* vector 27 */
        MDCounter_ISR, /* vector 26 */
        UnimplementedISR,                 /* vector 25 */
        UnimplementedISR,                 /* vector 24 */
        UnimplementedISR,  //ADT1_ISR       /* vector 23 */
        ATD0_ISR,                          /* vector 22 */
        UnimplementedISR,//SCI1_ISR,       /* vector 21 */
        SCI0_ISR,                      /* vector 20 */
        UnimplementedISR,                 /* vector 19 */
        UnimplementedISR,                 /* vector 18 */
        UnimplementedISR,                 /* vector 17 */
        UnimplementedISR,                 /* vector 16 */
        UnimplementedISR,                 /* vector 15 */
        UnimplementedISR,// ECT6_ISR,     /* vector 14 */
        UnimplementedISR,// ECT5_ISR,     /* vector 13 */
        UnimplementedISR,// ECT4_ISR,     /* vector 12 */
        UnimplementedISR,// ECT3_ISR,     /* vector 11 */
        UnimplementedISR,// ECT2_ISR,     /* vector 10 */
        UnimplementedISR,// ECT1_ISR,     /* vector 09 */
        UnimplementedISR,// ECT0_ISR,     /* vector 08 */
        RTI_ISR,                          /* vector 07 */
        IRQ_ISR,                          /* vector 06 */
        UnimplementedISR,                 /* vector 05 */
        UnimplementedISR,                 /* vector 04 */
        UnimplementedISR,                   /* vector 03 */
        UnimplementedISR,                   /* vector 02 */
        UnimplementedISR                   /*  vector 01 */
   };