uartser.c

WinCE 3.0 BSP, 包含Inter SA1110, Intel_815E, Advantech_PCM9574 等

/* 
THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
PARTICULAR PURPOSE.
Copyright (c) 1995-2000  Microsoft Corporation

Module Name:  UartSer.c

Abstract:  

    based serial device.

Functions: UART for serial driver

*/
#include <windows.h>
#include <serhw.h>
#include <serdbg.h>
#include "sa11x0.h"
//#include "s1xuart.h"
#include "sa1xser.h"
#include "macros.h"
VOID
SA_ReadSR1(
    PSER_HW_INFO  pHWHead
    )
{
    ULONG LineEvents = 0;
    
    // Note: Its not wise to do debug msgs in here since they will
    // pretty much guarantee that the FIFO gets overrun.
    
    if (pHWHead->pUART->utsr1.ror) {
            // DEBUGMSG (ZONE_WARN, (TEXT("Overrun\r\n")));
        LineEvents |= EV_ERR;
        pHWHead->DroppedBytes++;
        pHWHead->CommErrors |= CE_OVERRUN;
    }

    if (pHWHead->pUART->utsr1.pre) {
            // DEBUGMSG (ZONE_WARN, (TEXT("parity\r\n")));
        LineEvents |= EV_ERR;
        pHWHead->CommErrors |= CE_RXPARITY;
    }

    if (pHWHead->pUART->utsr1.fre) {
            // DEBUGMSG (ZONE_WARN, (TEXT("frame\r\n")));
        LineEvents |= EV_ERR;
        pHWHead->CommErrors |= CE_FRAME;
    }

    if(pHWHead->pUART->utsr0.rbb)
        LineEvents |= EV_BREAK;
        // Let WaitCommEvent know about this error
    if( LineEvents )
        pHWHead->EventCallback( pHWHead->pMddHead, LineEvents );
}

void HW_EnableTxRx(PVOID pHead)
{
    PSER_HW_INFO pHWHead = (PSER_HW_INFO)pHead;

    IOW_REG_FIELD(struct  utcr3Bits, &pHWHead->pUART->utcr3, rie, 1);
    IOW_REG_FIELD(struct  utcr3Bits, &pHWHead->pUART->utcr3, txe, 1);
    IOW_REG_FIELD(struct  utcr3Bits, &pHWHead->pUART->utcr3, rxe, 1);
}

struct utcr3Bits HW_SA1100DisableTxRx(PVOID pHead)
{
    struct utcr3Bits            utcr3Original;
    PSER_HW_INFO    pHWHead = (PSER_HW_INFO)pHead;

    utcr3Original = pHWHead->pUART->utcr3;


    IOW_REG_FIELD(struct  utcr3Bits, &pHWHead->pUART->utcr3, rxe, 0);
    IOW_REG_FIELD(struct  utcr3Bits, &pHWHead->pUART->utcr3, txe, 0);
    IOW_REG_FIELD(struct  utcr3Bits, &pHWHead->pUART->utcr3, rie, 0);
    IOW_REG_FIELD(struct  utcr3Bits, &pHWHead->pUART->utcr3, tie, 1);
    return(utcr3Original);
}


void HW_SA1100RestoreUTCR3(PVOID pHead,struct utcr3Bits rVal)
{
    PSER_HW_INFO    pHWHead = (PSER_HW_INFO)pHead;
    pHWHead->pUART->utcr3=rVal;
}

//
// This routine is used only for debugging, and performs a formatted
// ascii dump of the various UART registers.
//
VOID
SA_DumpSerialRegisters(
    PVOID  pHead
    )
{
    struct utsr1Bits sr1;
    struct utsr0Bits sr0;

    PSER_HW_INFO   pHWHead   = (PSER_HW_INFO)pHead;

RETAILMSG(1,(TEXT("****** DumpSerialRegisters()\r\n")));
    try {
        sr1 = pHWHead->pUART->utsr1;        
RETAILMSG(1,(TEXT("SA1100 UTSR1 (0x%x):  0x%2.2X\r\n"),&pHWHead->pUART->utsr1,sr1));
        if(sr1.rne)
RETAILMSG(1,(TEXT("DataReady\r\n")));
        if(sr1.ror)
RETAILMSG(1,(TEXT("OverRun\r\n")));
        if(sr1.pre)
RETAILMSG(1,(TEXT("ParityErr\r\n")));
        if(sr1.fre)
RETAILMSG(1,(TEXT("FramingErr\r\n")));
        if(sr1.tnf)
RETAILMSG(1,(TEXT("THR Not Full\r\n")));
        if(sr1.tby)
RETAILMSG(1,(TEXT("TXBusy\r\n")));

        sr0 = pHWHead->pUART->utsr0;
RETAILMSG(1,(TEXT("SA1100 UTSR0 (0x%x: 0x%2.2X\r\n"),&pHWHead->pUART->utsr0,sr0));
        if(sr0.rbb)
RETAILMSG(1,(TEXT("Beginning of BREAK\r\n")));
        if(sr0.reb)
RETAILMSG(1,(TEXT("End of BREAK\r\n")));
        if(sr0.eif)
RETAILMSG(1,(TEXT("FIFOErr\r\n")));
        if(sr0.tfs)
RETAILMSG(1,(TEXT("Tx Fifo Request Service\r\n")));
        if(sr0.rfs)
RETAILMSG(1,(TEXT("Rx Fifo Request Service\r\n")));
        if(sr0.rid)
RETAILMSG(1,(TEXT("Rx Idle ")));
RETAILMSG(1,(TEXT("\r\n")));
       
//        byte = INB(pHWHead, pUTDR);  /* reading will effect status bits */
//RETAILMSG(1,(TEXT("1100 S3 UTDR: 0x%2.2X\r\n"), byte));
//        NKDbgPrintfW(TEXT("1100 S3 rbr/thr:\t%2.2X\r\n"), byte);

RETAILMSG(1,(TEXT("1100 UTCR0(0x%x): 0x%2.2X\r\n"),&pHWHead->pUART->utcr0,pHWHead->pUART->utcr0));
RETAILMSG(1,(TEXT("1100 UTCR1(0x%x): 0x%2.2X\r\n"),&pHWHead->pUART->utcr1,pHWHead->pUART->utcr1));
RETAILMSG(1,(TEXT("1100 UTCR2(0x%x): 0x%2.2X\r\n"),&pHWHead->pUART->utcr2,pHWHead->pUART->utcr2));
RETAILMSG(1,(TEXT("1100 UTCR3(0x%x): 0x%2.2X\r\n"),&pHWHead->pUART->utcr3,pHWHead->pUART->utcr3));
    }
    except (GetExceptionCode() == EXCEPTION_ACCESS_VIOLATION ?
            EXCEPTION_EXECUTE_HANDLER : EXCEPTION_CONTINUE_SEARCH) {
    }
}
//
// Helper routine to search through a lookup table for a designated
// key.
//
ULONG
SA_LookUpValue(
    ULONG   Key,
    PLOOKUP_TBL pTbl
    )
{
    ULONG   index = 0;

    while ( index < pTbl->Size) {
        if (Key == pTbl->Table[index].Key)
            return pTbl->Table[index].AssociatedValue;
        ++index;
    }
    return 0;
}
//
// Helper function.  Pass in a baudrate, and the corresponding divisor
// (from the baudtable) is returned.  If no matching baudrate is found
// in baudtable, then return 0.
//
USHORT
SA_DivisorOfRate(
    PVOID   pHead,      // @parm PVOID returned by HWinit.
    ULONG   BaudRate    // @parm     ULONG representing decimal baud rate.    
    )
{
    return((USHORT)SA_LookUpValue(BaudRate,((PSER_HW_INFO) pHead)->pBaudTable));
}

#ifdef UART16550
//
// This is a reverse lookup table which can be used to determine
// the FIFO trigger level from the 2 bit value stored in the FCR
//
#define HIGH_WATER_SIZE     4
static const
PAIRS   HighWaterPairs[HIGH_WATER_SIZE] = {
    {SERIAL_1_BYTE_HIGH_WATER, 0},
    {SERIAL_4_BYTE_HIGH_WATER, 4},
    {SERIAL_8_BYTE_HIGH_WATER, 8},
    {SERIAL_14_BYTE_HIGH_WATER, 14}
};
static const
LOOKUP_TBL  HighWaterTable = {HIGH_WATER_SIZE, (PAIRS *) HighWaterPairs};
#endif

//
/////////////////// Start of exported entrypoints ////////////////
//
// @doc OEM 
// @func PVOID | HW_SA1100Open | Configures 16550 for default behaviour.
//
VOID
HW_SA1100Open(
    PVOID   pHead // @parm PVOID returned by HWinit.
    )
{
    struct utdrBits utdr;
    PSER_HW_INFO pHWHead = (PSER_HW_INFO)pHead;

//RETAILMSG(1,(TEXT("+HW_SA1100Open 0x%X\r\n"), pHead));
    DEBUGMSG (ZONE_OPEN,(TEXT("+HW_SA1100Open 0x%X\r\n"), pHead));

     // If the device is already open, all we do is increment count
    if( pHWHead->OpenCount++ ) {
        DEBUGMSG (ZONE_OPEN,(TEXT("-HW_SA1100Open 0x%X (%d opens)\r\n"),
                   pHead,pHWHead->OpenCount));
        return ;
    }
    pHWHead->DroppedBytes = 0;
    pHWHead->CTSFlowOff = FALSE;  // Not flowed off yet
    pHWHead->DSRFlowOff = FALSE;  // Not flowed off yet
    pHWHead->CommErrors   = 0;
    pHWHead->ModemStatus  = 0;

    try {
         // Set default framing bits (SERIAL_8_DATA | SERIAL_1_STOP | SERIAL_NONE_PARITY).
         IOW_REG_FIELD(struct  utcr0Bits, &pHWHead->pUART->utcr0, pe, 0);
         IOW_REG_FIELD(struct  utcr0Bits, &pHWHead->pUART->utcr0, oes, 0);
         IOW_REG_FIELD(struct  utcr0Bits, &pHWHead->pUART->utcr0, sbs, 0);
         IOW_REG_FIELD(struct  utcr0Bits, &pHWHead->pUART->utcr0, dss, 1);
         IOW_REG_FIELD(struct  utcr0Bits, &pHWHead->pUART->utcr0, sce, 0);
         IOW_REG_FIELD(struct  utcr0Bits, &pHWHead->pUART->utcr0, rce, 0);
         IOW_REG_FIELD(struct  utcr0Bits, &pHWHead->pUART->utcr0, tce, 0);


         IOW_REG_BITSET (struct  utsr0Bits, &pHWHead->pUART->utsr0, rid, 1);
         IOW_REG_BITSET (struct  utsr0Bits, &pHWHead->pUART->utsr0, rbb, 1);
         IOW_REG_BITSET (struct  utsr0Bits, &pHWHead->pUART->utsr0, reb, 1);

        DEBUGMSG (ZONE_OPEN,(TEXT("HW_SA1100Open Setting DCB parameters\r\n")));

         // Get defaults from the DCB structure
        HW_SA1100SetBaudRate( pHead, pHWHead->dcb.BaudRate );
        HW_SA1100SetByteSize( pHead, pHWHead->dcb.ByteSize );
        HW_SA1100SetStopBits( pHead, pHWHead->dcb.StopBits );
        HW_SA1100SetParity  ( pHead, pHWHead->dcb.Parity   );

        // Ugly.  On PC's, the PIC is edge triggered.  So because of the
        // sequence in which we initialize interrupts, etc it is possible
        // to have the UART generating its level based interrupt but the
        // PIC never gets an edge, so we never start the entire interrupt/
        // interrupt-acknowledge sequence.  All we need to do here is ensure
        // that any already pending interrupts get cleared at the UART.
        while(((pHWHead->pUART->utsr0.rid) || (pHWHead->pUART->utsr1.rne))) {
            DEBUGMSG (ZONE_OPEN, (TEXT("!!UTSR0 %X\r\n"), pHWHead->pUART->utsr0));
                // Reading LSR clears RLS interrupts.
            utdr=pHWHead->pUART->utdr;
            IOW_REG_BITSET (struct  utsr0Bits, &pHWHead->pUART->utsr0, rid, 1);
        }
        HW_EnableTxRx(pHWHead);
#ifdef DEBUG
//        if( ZONE_INIT )
//            SA_DumpSerialRegisters(pHWHead);
#endif
    }
    except (GetExceptionCode() == EXCEPTION_ACCESS_VIOLATION ?
            EXCEPTION_EXECUTE_HANDLER : EXCEPTION_CONTINUE_SEARCH) {
    }
//RETAILMSG(1,(TEXT("-HW_SA1100Open 0x%X\r\n"), pHead));
}

//
// @doc OEM 
// @func PVOID | HW_SA1100Close | Does nothing except keep track of the
// open count so that other routines know what to do.
//
VOID
HW_SA1100Close(
    PVOID   pHead // @parm PVOID returned by HWinit.
    )
{
    PSER_HW_INFO pHWHead = (PSER_HW_INFO)pHead;
//RETAILMSG(1,(TEXT("+HW_SA1100Close 0x%X\r\n"), pHead));
    DEBUGMSG (ZONE_CLOSE,(TEXT("+HW_SA1100Close 0x%X\r\n"), pHead));

    if( pHWHead->OpenCount )
        pHWHead->OpenCount--;
    try {
            //GDS try inserting this code to replace next 3 lines (???)
HW_SA1100DisableTxRx(pHead);
//pHWHead->pUART->utcr3.rie=0;
//pHWHead->pUART->utcr3.txe=0;
//pHWHead->pUART->utcr3.rxe=0;
    }
    except (GetExceptionCode() == EXCEPTION_ACCESS_VIOLATION ?
            EXCEPTION_EXECUTE_HANDLER : EXCEPTION_CONTINUE_SEARCH) {
    }   
//SA_DumpSerialRegisters(pHWHead);
    DEBUGMSG (ZONE_CLOSE,(TEXT("-HW_SA1100Close 0x%X\r\n"), pHead));
}

//
// @doc OEM 
// @func PVOID | HW_SA1100Init | Initializes 16550 device head.  
//
VOID
HW_SA1100Init(
    PVOID   pHead, // @parm points to device head
    PUCHAR  pRegBase, // Pointer to 16550 register base
    UINT8   RegStride, // Stride amongst the 16550 registers
    EVENT_FUNC EventCallback, // This callback exists in MDD
    PVOID   pMddHead,   // This is the first parm to callback
    PLOOKUP_TBL   pBaudTable  // BaudRate Table
    )
{
    PSER_HW_INFO   pHWHead   = (PSER_HW_INFO)pHead;

//RETAILMSG(1,(TEXT("+HW_SA1100INIT, pHWHead<0x%X>\r\n"), pHWHead));
//RETAILMSG(1,(TEXT("+HW_SA1100INIT, pRegBase<0x%X>\r\n"), pRegBase));
    DEBUGMSG (ZONE_CLOSE,(TEXT("+HW_SA1100INIT, 0x%X\r\n"), pHWHead));
    
    pHWHead->pUART =(struct uart *)pRegBase;

     // Store info for callback function
    pHWHead->EventCallback = EventCallback;
    pHWHead->pMddHead = pMddHead;
    
     // Now set up remaining fields
    if( pBaudTable != NULL )
        pHWHead->pBaudTable = (LOOKUP_TBL *) pBaudTable;
    else
        pHWHead->pBaudTable = (LOOKUP_TBL *) &LS_BaudTable;
    pHWHead->FlushDone    = CreateEvent(0, FALSE, FALSE, NULL);
    pHWHead->OpenCount = 0;

#ifdef SA1100_MODEM_CTRL
    pHWHead->MSR=0;
#endif