📄 serio.c
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return 0;
}
}
HWReadLSR( pHWHead );
if( ( pHWHead->LSR & SERIAL_LSR_THRE ) && !(pHWHead->LSR & SERIAL_LSR_DR) ){
if( pHWHead->IIR & SERIAL_IIR_FIFOS_ENABLED ){
byteCount = SERIAL_FIFO_DEPTH;
}
else{
byteCount = 1;
}
if ( pHWHead->IrMode ){
DISABLE_BITS8(ASICSiuRegs.siuie, SERIAL_IER_RDA);
ENABLE_BITS8(ASICSiuRegs.siumc, SERIAL_MCR_RTS);
}
DEBUGMSG(ZONE_FUNCTION, (TEXT("Send DATA:\r\n")));
for( ; (NumberOfBytes && byteCount); NumberOfBytes--, byteCount-- ){
DEBUGMSG(ZONE_FUNCTION, (TEXT("%02x "), *pSrc));
REG8(ASICSiuRegs.siurb_th) = *pSrc;
++pSrc;
(*pBytesSent)++;
}
DEBUGMSG(ZONE_FUNCTION, (TEXT("\r\n")));
DEBUGMSG(ZONE_FUNCTION, (TEXT("SIURB_TH = 0x%x\r\n"), ASICSiuRegs.siurb_th));
}
// Enable xmit intr. We need to do this no matter what,
// since the MDD relies on one final interrupt before
// returning to the application.
if ( pHWHead->IrMode ){
ENABLE_BITS8(ASICSiuRegs.siuie, SERIAL_IER_RLS | SERIAL_IER_MS | SERIAL_IER_THR);
} else {
ENABLE_BITS8(ASICSiuRegs.siuie, SERIAL_IER_RDA | SERIAL_IER_RLS
| SERIAL_IER_MS | SERIAL_IER_THR);
}
return 0;
}
// *************************************************************************
//
// @doc OEM
//
// @func BOOL | HWPowerOff |
// Called by driver to turn off power to serial port.
//
// @parm PVOID | pHead | PDD device context (returned from HWInit())
//
// @rdesc Returns TRUE for success, FALSE if error
//
// @remark This function is called when the device is entering a
// powered down state. Since this call is without normal
// process/thread context care must be taken in writting this
// function. No DLL's or system calls can be used (e.g. Sleep()).
// The function should save it's state to local storage, and then
// return.
//*************************************************************************
BOOL
HWPowerOff(
PVOID pHead
)
{
PPERP_IO_SER_INFO pHWHead = (PPERP_IO_SER_INFO)pHead;
BOOL retval = TRUE;
ENABLE_BITS16(VRCmuRegs.cmuclkmsk, MSKSIU | MSKSSIU);
// Save any registers that we need
pHWHead->IER = REG8(ASICSiuRegs.siuie);
pHWHead->LCR = REG8(ASICSiuRegs.siulc);
pHWHead->MCR = REG8(ASICSiuRegs.siumc);
pHWHead->Scratch = REG8(ASICSiuRegs.siusc);
DISABLE_BITS16(VRGiuRegs.giupiod, IRPWR);
// DISABLE_BITS16(VRCmuRegs.cmuclkmsk, MSKSIU | MSKSSIU);
DISABLE_BITS16(VRCmuRegs.cmuclkmsk, MSKSSIU);
return retval;
}
// ****************************************************************
//
// @doc OEM
//
// @func BOOL | HWPowerOn |
// Called by driver to turn on power to serial port.
//
// @parm PVOID | pHead | PDD device context (returned from HWInit())
//
// @rdesc Returns TRUE for success, FALSE if error
//
// @remark This function is called when the device is entering a
// powered up state. Since this call is without normal
// process/thread context care must be taken in writting this
// function. No DLL's or system calls can be used (e.g. Sleep()).
// The function should restore it's state from local storage, and then
// return.
//******************************************************************
BOOL
HWPowerOn(PVOID pHead)
{
PPERP_IO_SER_INFO pHWHead = (PPERP_IO_SER_INFO)pHead;
BOOL retval = TRUE;
ENABLE_BITS16(VRCmuRegs.cmuclkmsk, MSKSIU | MSKSSIU);
// Restore any registers that we need
REG8(ASICSiuRegs.siuiid_fc) = pHWHead->FCR;
REG8(ASICSiuRegs.siuie) = pHWHead->IER;
REG8(ASICSiuRegs.siulc) = pHWHead->LCR;
REG8(ASICSiuRegs.siumc) = pHWHead->MCR;
REG8(ASICSiuRegs.siusc) = pHWHead->Scratch;
if(pHWHead->PortOpen == FALSE){
// DISABLE_BITS16(VRCmuRegs.cmuclkmsk, MSKSIU | MSKSSIU);
DISABLE_BITS16(VRCmuRegs.cmuclkmsk, MSKSSIU);
return TRUE;
}
// And we didn't save the Divisor Reg, so set baud rate
HWSetBaudRate( pHWHead, pHWHead->dcb.BaudRate );
if (pHWHead->IrMode) {
ENABLE_BITS16(VRGiuRegs.giupiod, IRPWR);
}
// Set a flag to indicate to caller.
pHWHead->fPowerOff = 1;
SetInterruptEvent (dwIntrId);
return retval;
}
// ****************************************************************
//
// @doc OEM
//
// @func VOID | HWClearDTR | This routine clears the DTR.
//
// @parm PVOID | pHead | PDD device context (returned from HWInit())
//
// @remark This function is called to Clear the DTR signal.
//
// @rdesc None.
//********************************************************************
VOID
HWClearDTR(PVOID pHead)
{
PPERP_IO_SER_INFO pHWHead = (PPERP_IO_SER_INFO)pHead;
DEBUGMSG(ZONE_FUNCTION, (TEXT("Serial PDD: Enter HWClearDTR\r\n")));
DISABLE_BITS8(ASICSiuRegs.siumc, SERIAL_MCR_DTR);
}
// ****************************************************************
//
// @doc OEM
//
// @func VOID | HWSetDTR | This routine sets DTR.
//
// @parm PVOID | pHead | PDD device context (returned from HWInit())
//
// @remark This function is called to Set the DTR signal.
//
// @rdesc None.
//******************************************************************
VOID
HWSetDTR(PVOID pHead)
{
PPERP_IO_SER_INFO pHWHead = (PPERP_IO_SER_INFO)pHead;
DEBUGMSG(ZONE_FUNCTION, (TEXT("Serial PDD: Enter HWSetDTR\r\n")));
ENABLE_BITS8(ASICSiuRegs.siumc, SERIAL_MCR_DTR);
DEBUGMSG(ZONE_FUNCTION, (TEXT("SIUMC = 0x%x\r\n"), ASICSiuRegs.siumc));
}
// ****************************************************************
//
// @doc OEM
//
// @func VOID | HWClearRTS | This routine clears the RTS.
//
// @parm PVOID | pHead | PDD device context (returned from HWInit())
//
// @rdesc None.
//******************************************************************
VOID
HWClearRTS(PVOID pHead)
{
PPERP_IO_SER_INFO pHWHead = (PPERP_IO_SER_INFO)pHead;
DEBUGMSG(ZONE_FUNCTION, (TEXT("Serial PDD: Enter HWClearRTS\r\n")));
if (!pHWHead->IrMode ) {
DISABLE_BITS8(ASICSiuRegs.siumc, SERIAL_MCR_RTS);
}
}
// ****************************************************************
//
// @doc OEM
//
// @func VOID | HWSetRTS | This routine sets RTS.
//
// @parm PVOID | pHead | PDD device context (returned from HWInit())
//
// @rdesc None.
//*****************************************************************
VOID
HWSetRTS(PVOID pHead)
{
PPERP_IO_SER_INFO pHWHead = (PPERP_IO_SER_INFO)pHead;
DEBUGMSG(ZONE_FUNCTION, (TEXT("Serial PDD: Enter HWSetRTS\r\n")));
if ( !pHWHead->IrMode ){
ENABLE_BITS8(ASICSiuRegs.siumc, SERIAL_MCR_RTS);
DEBUGMSG(ZONE_FUNCTION, (TEXT("SIUMC = 0x%x\r\n"), ASICSiuRegs.siumc));
}
}
// *********************************************************************
//
// @doc OEM
//
// @func VOID | HWEnableIR | This routine enables the ir serial interface.
//
// @parm PVOID | pHead | PDD device context (returned from HWInit())
// @parm ULONG | BaudRate | The baud rate to set.
//
// @remark This function will set the device into IR mode. This should
// return NULL if the device does not support IR mode.
//
// @rdesc Returns TRUE for success, FALSE for failure. If an error
// occurs the caller can return the error using GetLastError()
//**********************************************************************
BOOL
HWEnableIR(
PVOID pHead,
ULONG BaudRate
)
{
PPERP_IO_SER_INFO pHWHead = (PPERP_IO_SER_INFO)pHead;
DEBUGMSG(ZONE_FUNCTION, (TEXT("Serial PDD: Enter HWEnableIR\r\n")));
DEBUGMSG(ZONE_FUNCTION, (TEXT("ir\r\n")));
ENABLE_BITS16(VRGiuRegs.giupiod, IRPWR);
REG8(ASICSiuRegs.siuirsel) = IRMSEL_HP | SIRSEL;
REG8(ASICSiuRegs.siucsel) = 0;
DISABLE_BITS8(ASICSiuRegs.siumc, SERIAL_MCR_RTS);
//ENABLE_BITS8(ASICSiuRegs.siuiid_fc, SERIAL_FCR_ENABLE | SERIAL_8_BYTE_HIGH_WATER |
// SERIAL_FCR_RCVR_RESET | SERIAL_FCR_TXMT_RESET);
REG8(ASICSiuRegs.siuiid_fc) = pHWHead->FCR;
pHWHead->IrMode = TRUE;
return TRUE;
}
// ****************************************************************
//
// @doc OEM
//
// @func VOID | HWDisableIR | This routine disables the ir serial interface.
//
// @parm PVOID | pHead | PDD device context (returned from HWInit())
//
// @rdesc Returns TRUE for success, FALSE for failure. If an error
// occurs the caller can return the error using GetLastError()
//*****************************************************************
BOOL
HWDisableIR(
PVOID pHead
)
{
PPERP_IO_SER_INFO pHWHead = (PPERP_IO_SER_INFO)pHead;
DEBUGMSG(ZONE_FUNCTION, (TEXT("Serial PDD: Enter HWDisableIR\r\n")));
if (!pHWHead->IrMode) {
SetLastError (ERROR_INVALID_PARAMETER);
return FALSE;
}
REG8(ASICSiuRegs.siuirsel) &= ~SIRSEL;
DISABLE_BITS16(VRGiuRegs.giupiod, IRPWR);
//ENABLE_BITS8(ASICSiuRegs.siuiid_fc, SERIAL_FCR_ENABLE | SERIAL_8_BYTE_HIGH_WATER |
// SERIAL_FCR_RCVR_RESET | SERIAL_FCR_TXMT_RESET);
REG8(ASICSiuRegs.siuiid_fc) = pHWHead->FCR;
pHWHead->IrMode = FALSE;
return TRUE;
}
// ****************************************************************
//
// @doc OEM
//
// @func VOID | HWClearBreak | This routine clears the break.
//
// @parm PVOID | pHead | PDD device context (returned from HWInit())
//
// @rdesc None.
//*****************************************************************
VOID
HWClearBreak(PVOID pHead)
{
PPERP_IO_SER_INFO pHWHead = (PPERP_IO_SER_INFO)pHead;
DEBUGMSG(ZONE_FUNCTION, (TEXT("Serial PDD: Enter HWClearBreak\r\n")));
DISABLE_BITS8(ASICSiuRegs.siulc, SERIAL_LCR_BREAK);
}
// ****************************************************************
//
// @doc OEM
//
// @func VOID | HWSetBreak | This routine sets the break.
//
// @parm PVOID | pHead | PDD device context (returned from HWInit())
//
// @rdesc None.
//*****************************************************************
VOID
HWSetBreak(PVOID pHead)
{
PPERP_IO_SER_INFO pHWHead = (PPERP_IO_SER_INFO)pHead;
DEBUGMSG(ZONE_FUNCTION, (TEXT("Serial PDD: Enter HWSetBreak\r\n")));
ENABLE_BITS8(ASICSiuRegs.siulc, SERIAL_LCR_BREAK);
}
// ****************************************************************
//
// @doc OEM
//
// @func BOOL | HWXmitComChar | Transmit a single character.
//
// @parm PVOID | pHead | PDD device context (returned from HWInit())
// @parm UCHAR | ComChar | The character to transmit
//
// @rdesc Returns TRUE if successful, FALSE if error.
//
// @remark If possible the PDD should transmit this character
// as soon as possible (i.e. before any buffered data). This
// is called by the user (TransmitComChar()) or by the MDD layer
// (usually for XON/XOFF processing).
//*******************************************************************
BOOL
HWXmitComChar(
PVOID pHead,
UCHAR ComChar
)
{
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