init.c

WinCE 3.0 BSP, 包含Inter SA1110, Intel_815E, Advantech_PCM9574 等

/*++
THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
PARTICULAR PURPOSE.
Copyright (c) 1995, 1996, 1997  Microsoft Corporation
Copyright (c) 1998  NEC Electronics Inc.

Module Name:  

    init.c

Abstract:  

    This file implements the PCMCIA platform dependent initialization function.

Functions:

    PDCardInitServices()

Notes:


--*/

#include <windows.h>
#include <types.h>
#include <cardserv.h>
#include <sockserv.h>
#include <sockpd.h>
//#include <nkintr.h>
//#include <oalintr.h>
#include <windowsx.h>
#include <excpt.h>
#include <memory.h>
#include <kfuncs.h>
#include <ceddk.h>
#include <drvlib.h>

#define PCICONFDREG 0x0C14
#define PCICONFAREG 0x0C18
#define VRIO_SIZE   0x0400

DWORD gIntrPcmciaState;
DWORD gIntrPcmciaLevel;

volatile UINT8  *v_pPcmciaCSR1; // The CSR register(Slot#0)
volatile UINT8  *v_pPcmciaCSR2; // The CSR register(Slot#1)

static unsigned char    *pCardBusSockRegBaseAdd1;   // Virtual Address for Card Bus Socket Register1 Start Address
static unsigned char    *pCardBusSockRegBaseAdd2;   // Virtual Address for Card Bus Socket Register2 Start Address

CRITICAL_SECTION v_MemAccessCrit;
CRITICAL_SECTION g_PCIC_Crit;

const UINT8 ZeroInitRegisters[] = {
    INDEX_POWER_CONTROL,
    INDEX_INTERRUPT_AND_GENERAL_CONTROL,
    INDEX_MAPPING_ENABLE,
    INDEX_IO_WINDOW_CONTROL,

    INDEX_IO_MAP0_START_ADDRESS_LOW,
    INDEX_IO_MAP0_START_ADDRESS_HI,
    INDEX_IO_MAP0_END_ADDRESS_LOW,
    INDEX_IO_MAP0_END_ADDRESS_HI,

    INDEX_IO_MAP1_START_ADDRESS_LOW,
    INDEX_IO_MAP1_START_ADDRESS_HI,
    INDEX_IO_MAP1_END_ADDRESS_LOW,
    INDEX_IO_MAP1_END_ADDRESS_HI,

    INDEX_MEMORY_MAP0_START_ADDRESS_LOW,
    INDEX_MEMORY_MAP0_START_ADDRESS_HI,
    INDEX_MEMORY_MAP0_END_ADDRESS_LOW,
    INDEX_MEMORY_MAP0_END_ADDRESS_HI,
    INDEX_MEMORY_MAP0_ADDRESS_OFFSET_LOW,
    INDEX_MEMORY_MAP0_ADDRESS_OFFSET_HI,

    INDEX_MEMORY_MAP1_START_ADDRESS_LOW,
    INDEX_MEMORY_MAP1_START_ADDRESS_HI,
    INDEX_MEMORY_MAP1_END_ADDRESS_LOW,
    INDEX_MEMORY_MAP1_END_ADDRESS_HI,
    INDEX_MEMORY_MAP1_ADDRESS_OFFSET_LOW,
    INDEX_MEMORY_MAP1_ADDRESS_OFFSET_HI,

    INDEX_MEMORY_MAP2_START_ADDRESS_LOW,
    INDEX_MEMORY_MAP2_START_ADDRESS_HI,
    INDEX_MEMORY_MAP2_END_ADDRESS_LOW,
    INDEX_MEMORY_MAP2_END_ADDRESS_HI,
    INDEX_MEMORY_MAP2_ADDRESS_OFFSET_LOW,
    INDEX_MEMORY_MAP2_ADDRESS_OFFSET_HI,

    INDEX_MEMORY_MAP3_START_ADDRESS_LOW,
    INDEX_MEMORY_MAP3_START_ADDRESS_HI,
    INDEX_MEMORY_MAP3_END_ADDRESS_LOW,
    INDEX_MEMORY_MAP3_END_ADDRESS_HI,
    INDEX_MEMORY_MAP3_ADDRESS_OFFSET_LOW,
    INDEX_MEMORY_MAP3_ADDRESS_OFFSET_HI,

    INDEX_MEMORY_MAP4_START_ADDRESS_LOW,
    INDEX_MEMORY_MAP4_START_ADDRESS_HI,
    INDEX_MEMORY_MAP4_END_ADDRESS_LOW,
    INDEX_MEMORY_MAP4_END_ADDRESS_HI,
    INDEX_MEMORY_MAP4_ADDRESS_OFFSET_LOW,
    INDEX_MEMORY_MAP4_ADDRESS_OFFSET_HI,
};


//
// The main thing that gets initialized is the pointer to pcmciaReg, the PCMCIA
// status register.
//
STATUS
PDCardInitServices()
{
    int i;

    UINT16  ControllerNumber;
    BOOL    Ret;
    DWORD   CardBusRegBaseAddress1;
    DWORD   CardBusRegBaseAddress2;
    DWORD   IntrLine;

    PCI_SLOT_NUMBER     slotNumber;
    PCI_COMMON_CONFIG   pciConfig;
    int                 bus, device, function;
    int                 length;
    BOOL                bFoundIt;

    bFoundIt = FALSE;

    InitializeCriticalSection(&v_MemAccessCrit);
    InitializeCriticalSection(&g_PCIC_Crit);

    pCardBusSockRegBaseAdd1 = NULL;
    pCardBusSockRegBaseAdd2 = NULL;

    // PCI I/O register mapping.
    for (bus = 0, ControllerNumber = 0; bus < PCI_MAX_BUS; bus++) {
        for (device = 0; device < PCI_MAX_DEVICES; device++) {
            slotNumber.u.bits.DeviceNumber = device;
            for (function = 0; function < PCI_MAX_FUNCTION; function++) {
                slotNumber.u.bits.FunctionNumber = function;
                length = HalGetBusData(PCIConfiguration, bus, slotNumber.u.AsULONG,
                                       &pciConfig, sizeof(pciConfig) - 
                                       sizeof(pciConfig.DeviceSpecific));

                if (length == 0 || pciConfig.VendorID == 0xFFFF) 
                    break;

                if ((pciConfig.VendorID  == 0x1033) && (pciConfig.DeviceID  == 0x003E)) {
                    if(ControllerNumber) {
                        HalGetBusDataByOffset(PCIConfiguration, bus, device, 
                                             (PVOID)&CardBusRegBaseAddress2, 0x10, 4);
                        CardBusRegBaseAddress2 += 0xA0000000;
                        HalGetBusDataByOffset(PCIConfiguration, bus, device, 
                                             (PVOID)&IntrLine, 0x3c, 4);
                        gIntrPcmciaLevel = IntrLine & 0x000000FF;
                        bFoundIt = TRUE;
                    } else {
                        HalGetBusDataByOffset(PCIConfiguration, bus, device, 
                                             (PVOID)&CardBusRegBaseAddress1, 0x10, 4);
                        CardBusRegBaseAddress1 += 0xA0000000;
                        HalGetBusDataByOffset(PCIConfiguration, bus, device, 
                                             (PVOID)&IntrLine, 0x3c, 4);
                        gIntrPcmciaState = IntrLine & 0x000000FF;
                    }
                    ControllerNumber++;
                    break;
                }
                if (function == 0 && !(pciConfig.HeaderType & 0x80)) 
                    break;
            }
            if (bFoundIt || length == 0)
                break;
        }
        if (bFoundIt || (length == 0 && device == 0))
            break;
    }
    if (!bFoundIt) {
        DEBUGMSG(ZONE_ERROR, 
                (TEXT("R4173: Error, can't find PCMCIA Controller\r\n")));
        return FALSE;
    }

    //
    // Obtain virtual address to access to CPU configuration address
    //
    if (!MapVR4122intio())  // Virtual address of 0xAF000000 --> pVRIO
        return FALSE;

    //
    // Obtain PCIC1 card bus socket register virtual address
    //
    if (pCardBusSockRegBaseAdd1 == NULL) {
        pCardBusSockRegBaseAdd1 = VirtualAlloc(0, 0x1000, MEM_RESERVE, PAGE_NOACCESS);
        if (pCardBusSockRegBaseAdd1 == NULL) {
            RETAILMSG(1,(TEXT("PCMCIA1 Card Bus Register Enable: VirtualAlloc failed!\r\n")));
            DEBUGMSG( ZONE_ERROR, (TEXT( "PCMCIA1 Card Bus Register Enable: VirtualAlloc failed!\r\n" )) );
            return 2;       // HACK ALERT
        }
        Ret = VirtualCopy(pCardBusSockRegBaseAdd1, (LPVOID)CardBusRegBaseAddress1, 0x1000, PAGE_READWRITE 
                          | PAGE_NOCACHE);
        if (Ret == FALSE) {
            RETAILMSG(1,(TEXT("PCMCIA1 Card Bus Register Enable: VirtualCopy failed!\r\n")));
            DEBUGMSG( ZONE_ERROR, (TEXT( "PCMCIA1 Card Bus Register Enable: VirtualCopy failed!\r\n" )) );
            VirtualFree(pCardBusSockRegBaseAdd1, 0, MEM_RELEASE);
            pCardBusSockRegBaseAdd1 = NULL;
            return 2;       // HACK ALERT
        }
    }

    //
    // Obtain PCIC2 card bus socket register virtual address
    //
    if (pCardBusSockRegBaseAdd2 == NULL) {
        pCardBusSockRegBaseAdd2 = VirtualAlloc(0, 0x1000, MEM_RESERVE, PAGE_NOACCESS);
        if (pCardBusSockRegBaseAdd2 == NULL) {
            RETAILMSG(1,(TEXT("PCMCIA2 Card Bus Register Enable: VirtualAlloc failed!\r\n")));
            DEBUGMSG( ZONE_ERROR, (TEXT( "PCMCIA2 Card Bus Register Enable: VirtualAlloc failed!\r\n" )) );
            return 2;       // HACK ALERT
        }
        Ret = VirtualCopy(pCardBusSockRegBaseAdd2, (LPVOID)CardBusRegBaseAddress2, 0x1000, PAGE_READWRITE 
                          | PAGE_NOCACHE);
        if (Ret == FALSE) {
            RETAILMSG(1,(TEXT("PCMCIA2 Card Bus Register Enable: VirtualCopy failed!\r\n")));
            DEBUGMSG( ZONE_ERROR, (TEXT( "PCMCIA2 Card Bus Register Enable: VirtualCopy failed!\r\n" )) );
            VirtualFree(pCardBusSockRegBaseAdd2, 0, MEM_RELEASE);
            pCardBusSockRegBaseAdd2 = NULL;
            return 2;       // HACK ALERT
        }
    }

    v_pPcmciaCSR1 = ((PUINT8)pCardBusSockRegBaseAdd1);
    v_pPcmciaCSR2 = ((PUINT8)pCardBusSockRegBaseAdd2);

    //
    // Zero init a bunch of socket controller registers
    //
    for (i = 0; i < sizeof(ZeroInitRegisters); i++) {
        PD365Write2(ZeroInitRegisters[i],0);
        PD365Write1(ZeroInitRegisters[i],0);
    }

    PD365Write1(INDEX_MANAGEMENT_INTERRUPT_CONFIGURATION,
               DATA_CARD_DETECT_ENABLE|
               DATA_BATTERY_WARNING_ENABLE|
               DATA_BATTERY_DEAD_STSCHG_ENABLE);

    PD365Write2(INDEX_MANAGEMENT_INTERRUPT_CONFIGURATION,
               DATA_CARD_DETECT_ENABLE|
               DATA_BATTERY_WARNING_ENABLE|
               DATA_BATTERY_DEAD_STSCHG_ENABLE);

// Set CLKRUN
//    RETAILMSG(1,(TEXT("Enable PCICLK stoppage.\r\n")));
    REG32(v_pPcmciaCSR1 + SKT_CNT) |= STP_CLK_EN;
    REG32(v_pPcmciaCSR2 + SKT_CNT) |= STP_CLK_EN;

// Set Memory Window Upper Address(A[31:24]) to ExCA Extended Index:0x00
    PD365Write1( MEM_WIN0_SAU, 0x10 );      // PCIC #1 Window0
    PD365Write1( MEM_WIN1_SAU, 0x10 );      // PCIC #1 Window1
    PD365Write1( MEM_WIN2_SAU, 0x10 );      // PCIC #1 Window2
    PD365Write1( MEM_WIN3_SAU, 0x10 );      // PCIC #1 Window3
    PD365Write1( MEM_WIN4_SAU, 0x10 );      // PCIC #1 Window4
    PD365Write2( MEM_WIN0_SAU, 0x10 );      // PCIC #2 Window0
    PD365Write2( MEM_WIN1_SAU, 0x10 );      // PCIC #2 Window1
    PD365Write2( MEM_WIN2_SAU, 0x10 );      // PCIC #2 Window2
    PD365Write2( MEM_WIN3_SAU, 0x10 );      // PCIC #2 Window3
    PD365Write2( MEM_WIN4_SAU, 0x10 );      // PCIC #2 Window4

   return CERR_SUCCESS;
}