📄 window.c
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{ Socket0CommonMemoryWindowRegisters2,
sizeof(Socket0CommonMemoryWindowRegisters2),
DATA_MEMORY_MAP3_ENABLE
},
{ Socket1CommonMemoryWindowRegisters1,
sizeof(Socket1CommonMemoryWindowRegisters1),
DATA_MEMORY_MAP2_ENABLE
},
{ Socket1CommonMemoryWindowRegisters2,
sizeof(Socket1CommonMemoryWindowRegisters2),
DATA_MEMORY_MAP3_ENABLE
},
{ Socket0CommonMemoryWindowRegisters3,
sizeof(Socket0CommonMemoryWindowRegisters3),
DATA_MEMORY_MAP4_ENABLE
},
{ Socket0IOMemoryWindowRegisters,
sizeof(Socket0IOMemoryWindowRegisters),
DATA_IO_MAP0_ENABLE
},
{ Socket1CommonMemoryWindowRegisters3,
sizeof(Socket1CommonMemoryWindowRegisters3),
DATA_MEMORY_MAP4_ENABLE
},
{ Socket1IOMemoryWindowRegisters,
sizeof(Socket1IOMemoryWindowRegisters),
DATA_IO_MAP0_ENABLE
},
{ Socket0IOMemoryWindowRegisters,
sizeof(Socket0IOMemoryWindowRegisters),
DATA_IO_MAP1_ENABLE
},
{ Socket1IOMemoryWindowRegisters,
sizeof(Socket1IOMemoryWindowRegisters),
DATA_IO_MAP1_ENABLE
}
};
//
// Memory and I/O window capabilities
//
PDCARD_WINDOW_INFO v_WinInfo[PCMCIA_NUM_WINDOWS] = {
{ // This first entry describes the capabilities of all the memory windows
1, // bit representation of socket 0
WIN_CAP_ATTRIBUTE,
MEM_CAP_8BIT, // memory capabilities
0, // I/O capabilities
PCMCIA0_8_ATTR_WIN_BASE,
PCMCIA0_8_ATTR_WIN_BASE + PCMCIA0_8_ATTR_WIN_SIZE - 1,
4096, // min size of 1 page.
PCMCIA0_8_ATTR_WIN_SIZE, // max size
4096, // granularity of 1 page.
0, // base address alignment
0, // card offset alignment
0, // I/O first byte
0, // I/O last byte
0, // I/O min size
0, // I/O max size
0, // I/O granularity
0, // I/O address lines
WIN_SPEED_EXP_10MS | WIN_SPEED_MANT_12| WIN_SPEED_USE_WAIT, // mem slowest
WIN_SPEED_EXP_1NS | WIN_SPEED_MANT_12| WIN_SPEED_USE_WAIT, // mem fastest
},
{ // This first entry describes the capabilities of all the memory windows
1, // bit representation of socket 0
WIN_CAP_ATTRIBUTE,
MEM_CAP_16BIT, // memory capabilities
0, // I/O capabilities
PCMCIA0_16_ATTR_WIN_BASE,
PCMCIA0_16_ATTR_WIN_BASE + PCMCIA0_16_ATTR_WIN_SIZE - 1,
4096, // min size of 1 page.
PCMCIA0_16_ATTR_WIN_SIZE, // max size
4096, // granularity of 1 page.
0, // base address alignment
0, // card offset alignment
0, // I/O first byte
0, // I/O last byte
0, // I/O min size
0, // I/O max size
0, // I/O granularity
0, // I/O address lines
WIN_SPEED_EXP_10MS | WIN_SPEED_MANT_12| WIN_SPEED_USE_WAIT, // mem slowest
WIN_SPEED_EXP_1NS | WIN_SPEED_MANT_12| WIN_SPEED_USE_WAIT, // mem fastest
},
{ // This first entry describes the capabilities of all the memory windows
2, // bit representation of socket 1
WIN_CAP_ATTRIBUTE,
MEM_CAP_8BIT, // memory capabilities
0, // I/O capabilities
PCMCIA1_8_ATTR_WIN_BASE,
PCMCIA1_8_ATTR_WIN_BASE + PCMCIA1_8_ATTR_WIN_SIZE - 1,
4096, // min size of 1 page.
PCMCIA1_8_ATTR_WIN_SIZE, // max size
4096, // granularity of 1 page.
0, // base address alignment
0, // card offset alignment
0, // I/O first byte
0, // I/O last byte
0, // I/O min size
0, // I/O max size
0, // I/O granularity
0, // I/O address lines
WIN_SPEED_EXP_10MS | WIN_SPEED_MANT_12| WIN_SPEED_USE_WAIT, // mem slowest
WIN_SPEED_EXP_1NS | WIN_SPEED_MANT_12| WIN_SPEED_USE_WAIT, // mem fastest
},
{ // This first entry describes the capabilities of all the memory windows
2, // bit representation of socket 1
WIN_CAP_ATTRIBUTE,
MEM_CAP_16BIT, // memory capabilities
0, // I/O capabilities
PCMCIA1_16_ATTR_WIN_BASE,
PCMCIA1_16_ATTR_WIN_BASE + PCMCIA1_16_ATTR_WIN_SIZE - 1,
4096, // min size of 1 page.
PCMCIA1_16_ATTR_WIN_SIZE, // max size
4096, // granularity of 1 page.
0, // base address alignment
0, // card offset alignment
0, // I/O first byte
0, // I/O last byte
0, // I/O min size
0, // I/O max size
0, // I/O granularity
0, // I/O address lines
WIN_SPEED_EXP_10MS | WIN_SPEED_MANT_12| WIN_SPEED_USE_WAIT, // mem slowest
WIN_SPEED_EXP_1NS | WIN_SPEED_MANT_12| WIN_SPEED_USE_WAIT, // mem fastest
},
{ // This first entry describes the capabilities of all the memory windows
1, // bit representation of socket 0
WIN_CAP_COMMON,
MEM_CAP_8BIT, // memory capabilities
0, // I/O capabilities
PCMCIA0_MEM1_WIN_BASE,
PCMCIA0_MEM1_WIN_BASE + PCMCIA0_MEM1_WIN_SIZE - 1,
4096, // min size of 1 page.
PCMCIA0_MEM1_WIN_SIZE, // max size
4096, // granularity of 1 page.
0, // base address alignment
0, // card offset alignment
0, // I/O first byte
0, // I/O last byte
0, // I/O min size
0, // I/O max size
0, // I/O granularity
0, // I/O address lines
WIN_SPEED_EXP_10MS | WIN_SPEED_MANT_12| WIN_SPEED_USE_WAIT, // mem slowest
WIN_SPEED_EXP_1NS | WIN_SPEED_MANT_12| WIN_SPEED_USE_WAIT, // mem fastest
},
{ // This first entry describes the capabilities of all the memory windows
1, // bit representation of socket 0
WIN_CAP_COMMON,
MEM_CAP_8BIT|MEM_CAP_PRG_BASE|MEM_CAP_16BIT, // memory capabilities
0, // I/O capabilities
PCMCIA0_MEM2_WIN_BASE,
PCMCIA0_MEM2_WIN_BASE + PCMCIA0_MEM2_WIN_SIZE - 1,
4096, // min size of 1 page.
PCMCIA0_MEM2_WIN_SIZE, // max size
4096, // granularity of 1 page.
0, // base address alignment
0, // card offset alignment
0, // I/O first byte
0, // I/O last byte
0, // I/O min size
0, // I/O max size
0, // I/O granularity
0, // I/O address lines
WIN_SPEED_EXP_10MS | WIN_SPEED_MANT_12| WIN_SPEED_USE_WAIT, // mem slowest
WIN_SPEED_EXP_1NS | WIN_SPEED_MANT_12| WIN_SPEED_USE_WAIT, // mem fastest
},
{ // This first entry describes the capabilities of all the memory windows
2, // bit representation of socket 1
WIN_CAP_COMMON,
MEM_CAP_8BIT, // memory capabilities
0, // I/O capabilities
PCMCIA1_MEM1_WIN_BASE,
PCMCIA1_MEM1_WIN_BASE + PCMCIA1_MEM1_WIN_SIZE - 1,
4096, // min size of 1 page.
PCMCIA1_MEM1_WIN_SIZE, // max size
4096, // granularity of 1 page.
0, // base address alignment
0, // card offset alignment
0, // I/O first byte
0, // I/O last byte
0, // I/O min size
0, // I/O max size
0, // I/O granularity
0, // I/O address lines
WIN_SPEED_EXP_10MS | WIN_SPEED_MANT_12| WIN_SPEED_USE_WAIT, // mem slowest
WIN_SPEED_EXP_1NS | WIN_SPEED_MANT_12| WIN_SPEED_USE_WAIT, // mem fastest
},
{ // This first entry describes the capabilities of all the memory windows
2, // bit representation of socket 1
WIN_CAP_COMMON,
MEM_CAP_8BIT|MEM_CAP_PRG_BASE|MEM_CAP_16BIT, // memory capabilities
0, // I/O capabilities
PCMCIA1_MEM2_WIN_BASE,
PCMCIA1_MEM2_WIN_BASE + PCMCIA1_MEM2_WIN_SIZE - 1,
4096, // min size of 1 page.
PCMCIA1_MEM2_WIN_SIZE, // max size
4096, // granularity of 1 page.
0, // base address alignment
0, // card offset alignment
0, // I/O first byte
0, // I/O last byte
0, // I/O min size
0, // I/O max size
0, // I/O granularity
0, // I/O address lines
WIN_SPEED_EXP_10MS | WIN_SPEED_MANT_12| WIN_SPEED_USE_WAIT, // mem slowest
WIN_SPEED_EXP_1NS | WIN_SPEED_MANT_12| WIN_SPEED_USE_WAIT, // mem fastest
},
{ // This first entry describes the capabilities of all the memory windows
1, // bit representation of socket 0
WIN_CAP_COMMON,
MEM_CAP_8BIT|MEM_CAP_PRG_BASE|MEM_CAP_16BIT, // memory capabilities
0, // I/O capabilities
PCMCIA0_MEM3_WIN_BASE,
PCMCIA0_MEM3_WIN_BASE + PCMCIA0_MEM3_WIN_SIZE - 1,
4096, // min size of 1 page.
PCMCIA0_MEM3_WIN_SIZE, // max size
4096, // granularity of 1 page.
0, // base address alignment
0, // card offset alignment
0, // I/O first byte
0, // I/O last byte
0, // I/O min size
0, // I/O max size
0, // I/O granularity
0, // I/O address lines
WIN_SPEED_EXP_10MS | WIN_SPEED_MANT_12| WIN_SPEED_USE_WAIT, // mem slowest
WIN_SPEED_EXP_1NS | WIN_SPEED_MANT_12| WIN_SPEED_USE_WAIT, // mem fastest
},
{ // This entry describes the capabilities of all the I/O windows
1, // bit representation of socket 0
WIN_CAP_IO | WIN_CAP_WAIT,
0, // memory capabilities
IO_CAP_PRG_BASE|IO_CAP_8BIT|IO_CAP_16BIT, // I/O capabilities
0, // memory first byte
0, // memory last byte
0, // min size
0, // max size
0, // granularity of 1 page.
0, // base address alignment
0, // card offset alignment
PCMCIA0_IO0_WIN_BASE, // I/O first byte
PCMCIA0_IO0_WIN_BASE+PCMCIA0_IO0_WIN_SIZE-1, // I/O last byte
4096, // I/O min size
PCMCIA0_IO0_WIN_SIZE, // I/O max size
4096, // I/O granularity
0, // I/O address lines
0, // mem slowest
0, // mem fastest
},
{ // This first entry describes the capabilities of all the memory windows
2, // bit representation of socket 1
WIN_CAP_COMMON,
MEM_CAP_8BIT|MEM_CAP_PRG_BASE|MEM_CAP_16BIT, // memory capabilities
0, // I/O capabilities
PCMCIA1_MEM3_WIN_BASE,
PCMCIA1_MEM3_WIN_BASE + PCMCIA1_MEM3_WIN_SIZE - 1,
4096, // min size of 1 page.
PCMCIA1_MEM3_WIN_SIZE, // max size
4096, // granularity of 1 page.
0, // base address alignment
0, // card offset alignment
0, // I/O first byte
0, // I/O last byte
0, // I/O min size
0, // I/O max size
0, // I/O granularity
0, // I/O address lines
WIN_SPEED_EXP_10MS | WIN_SPEED_MANT_12| WIN_SPEED_USE_WAIT, // mem slowest
WIN_SPEED_EXP_1NS | WIN_SPEED_MANT_12| WIN_SPEED_USE_WAIT, // mem fastest
},
{ // This entry describes the capabilities of all the I/O windows
2, // bit representation of socket 1
WIN_CAP_IO | WIN_CAP_WAIT,
0, // memory capabilities
IO_CAP_PRG_BASE|IO_CAP_8BIT|IO_CAP_16BIT, // I/O capabilities
0, // memory first byte
0, // memory last byte
0, // min size
0, // max size
0, // granularity of 1 page.
0, // base address alignment
0, // card offset alignment
PCMCIA1_IO0_WIN_BASE, // I/O first byte
PCMCIA1_IO0_WIN_BASE+PCMCIA1_IO0_WIN_SIZE-1, // I/O last byte
4096, // I/O min size
PCMCIA1_IO0_WIN_SIZE, // I/O max size
4096, // I/O granularity
0, // I/O address lines
0, // mem slowest
0, // mem fastest
},
{ // This entry describes the capabilities of all the I/O windows
1, // bit representation of socket 0
WIN_CAP_IO | WIN_CAP_WAIT,
0, // memory capabilities
IO_CAP_PRG_BASE|IO_CAP_8BIT|IO_CAP_16BIT, // I/O capabilities
0, // memory first byte
0, // memory last byte
0, // min size
0, // max size
0, // granularity of 1 page.
0, // base address alignment
0, // card offset alignment
PCMCIA0_IO1_WIN_BASE, // I/O first byte
PCMCIA0_IO1_WIN_BASE+PCMCIA0_IO1_WIN_SIZE-1, // I/O last byte
4096, // I/O min size
PCMCIA0_IO1_WIN_SIZE, // I/O max size
4096, // I/O granularity
0, // I/O address lines
0, // mem slowest
0, // mem fastest
},
{ // This entry describes the capabilities of all the I/O windows
2, // bit representation of socket 1
WIN_CAP_IO | WIN_CAP_WAIT,
0, // memory capabilities
IO_CAP_PRG_BASE|IO_CAP_8BIT|IO_CAP_16BIT, // I/O capabilities
0, // memory first byte
0, // memory last byte
0, // min size
0, // max size
0, // granularity of 1 page.
0, // base address alignment
0, // card offset alignment
PCMCIA1_IO1_WIN_BASE, // I/O first byte
PCMCIA1_IO1_WIN_BASE+PCMCIA1_IO1_WIN_SIZE-1, // I/O last byte
4096, // I/O min size
PCMCIA1_IO1_WIN_SIZE, // I/O max size
4096, // I/O granularity
0, // I/O address lines
0, // mem slowest
0, // mem fastest
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