dispdrvr.h

来自「WinCE 3.0 BSP, 包含Inter SA1110, Intel_815」· C头文件 代码 · 共 218 行

/* 
    File     : Dispdrvr.h

    Copyright (c) 1995, 1996, 1997  Microsoft Corporation
    Copyright 1997 Motorola. All Rights Reserved.

    Content  : Definitions and structures for supported Liquid Crystal
               Displays (LCD's) as used by the WinCE LCD device driver.

    Notes    : The WindowsCE color LCD driver has been tested with
               NEC NL6448AC33-10 640x480, 8bpp, color, non-split, TFT panel

               The WindowsCE color LCD driver has also been tested with
               NEC NL6448BC20-08 640x480, color, non-split, TFT panel.
*/

//#include <dma.h>
#include <wtypes.h>

/* Misc. WinCE definitions. */
typedef volatile BYTE   *PVBYTE;
typedef volatile DWORD  *PVDWORD;
typedef volatile UINT32 *PVUINT32;
typedef volatile UINT16 *PVUINT16;

/*  
  * ADS board and NEC NL6448AC33-10 Panel Connection:
  *
  *             |              |             |
  *LCD Connector| Signal Name  |ADS Connector|Signal Name
  *             |              |             |
  *---------------------------------------------------------
  *  34             GND             P11-22      GND
  *  33             VCCOFFO         p10-D3      VCC
  *  32             MODE            P11-20      GND
  *  31             DE              ------      NC
  *  30             GNDB            P11-18      GND
  *  29             GNDB            P11-16      GND
  *  28             N.C.            ------      NC
  *  27             VDD             P10-D2      VCC
  *  26             VDD             P10-D1      VCC
  *  25             VCC             P10-C2      VCC
  *  24             GND             P11-14      GND
  *  23             BLOFFO          P10-C1      VCC
  *  22             ACA             P11-12      GND
  *  21             GND             P11-11      GND
  *  20             B3              P11-25      LD6
  *  19             B2              P11-27      LD7
  *  18             B1              P11-29      LD8
  *  17             B0              ------      NC
  *  16             GND             P11-10      GND
  *  15             G3              P11-19      LD3
  *  14             G2              P11-21      LD4
  *  13             G1              P11-23      LD5
  *  12             G0              ------      NC          
  *  11             GND             P11-8       GND
  *  10             R3              P11-13      LD0
  *   9             R2              P11-15      LD1
  *   8             R1              P11-17      LD2
  *   7             R0              ------      NC
  *   6             GND             P11-4       GND
  *   5             V-SYNC          P11-9       V-SYNC
  *   4             H-SYNC          P11-7       H-SYNC
  *   3             GND             P11-3       GND
  *   2             GND             P11-2       GND
  *   1             CLK             P11-1       SHIFT_C
  *
  */

/* This section contains LCD specifics. */
/*
#if (defined(MOTO_FADS))
#define NEC_NL6448AC33_10
#endif
#if (defined(SDB_HIOX))
#define NEC_NL6448BC20_08
#endif

// The display config parameters for a NEC NL6448AC33-10 LCD.
// 640x480, 8bpp, color, TFT, not-split. 
#ifdef NEC_NL6448AC33_10
#define COLUMNS   640   
#define ROWS      480
#define NBR_BITS    9
#define WAIT_BETWEEN_LINES  138 
#define WAIT_BETWEEN_FRAMES 34
#define V_SYNC_PULSE    2
#define BITS_PER_PIXEL  8
#define SCREEN_HORZSIZE 211
#define SCREEN_VERTSIZE 158
#define FRAME_BUFFER_SIZE 0x50000
#endif
// The display config parameters for a NEC NL6448BC20-08 LCD.
#ifdef NEC_NL6448BC20_08
#define COLUMNS   640
#define ROWS      480
#define NBR_BITS    9
// WAIT_BETWEEN_LINES = Thp (HSync pulse width) + Thb (Horiz. back porch)
// Based on the data sheet, the typical value of Thp + Thb = 144.  Therefore,
// WAIT_BETWEEN_LINES was initially set to 144, but adjusted to 139 after
// lab experimentation.
#define WAIT_BETWEEN_LINES  139
// WAIT_BETWEEN_FRAMES = Tvp (VSync pulse width) + Tvb (Vert. back porch)
#define WAIT_BETWEEN_FRAMES 33
#define V_SYNC_PULSE    2 // Vertical synchronous pulse width (Tvp) 
#define BITS_PER_PIXEL  8
#define SCREEN_HORZSIZE 132
#define SCREEN_VERTSIZE 99
#endif
*/
extern USHORT usCOLUMNS;
extern USHORT usROWS;
extern USHORT usNBR_BITS   ;
extern USHORT usWAIT_BETWEEN_LINES  ;
extern USHORT usWAIT_BETWEEN_FRAMES ;
extern USHORT usV_SYNC_PULSE    ;
extern UCHAR  ubBITS_PER_PIXEL  ;
extern USHORT usSCREEN_HORZSIZE ;
extern USHORT usSCREEN_VERTSIZE ;
extern DWORD dwADS_PHYS_FRAME_BUFF_ADDR;

#define FRAME_BUFFER_SIZE 0x50000

// A structure that details the LCD specific information
typedef struct {
    /* Bit-mask defines to use with the following field. */
        #define LCD_DEFAULT_DISPLAY 0x00
        #define LCD_SPLIT_DISPLAY   0x01
        #define LCD_TFT_DISPLAY     0x02
        #define LCD_COLOR_DISPLAY   0x04
        #define LCD_MONO_8BIT       0x08
    /* Display type information used to program the CPM. */
    uchar   LCD_Type;

    /* Number of Columns on the LCD. */
    ushort  Columns;

    /* Number of Rows on the LCD. */
    ushort  Rows;

    /* Screen physical width */
    ushort  Width;

    /* Screen physical height */
    ushort  Height;

    /* Number of data bus bits. */
    ushort  Nbr_data_bits;

    /* Wait period between lines (panel clock cycles). */
    ushort  Wait_between_lines;

    /* Wait period between frames (in lines). */
    ushort  Wait_between_frames;

    /* Vertical sync pulse width, use with TFT displays */
    ushort  Vertical_sync_pulse;

    /* Number of bits per pixel. */
    uchar   Bits_per_pixel;

    /* The physical address of the frame-buffer. */
    uint    Frame_buffer_addr;
    
} LCD_Info_Type;

// MPC821 LCD controller configuration information
#define LCD_TURN_PANEL_ON   0x0001
#define LCD_NBR_COLOR_RAM_ENTRIES   256
#define LCD_PORT_D_SETTING  0x1DFF
#define BO_AT_SETTING   0x01E00000
#define BPIX    0x60
#define COLOR 0x4
#define TFT 0x2
/*************** End MPC821 CPM LCD register definitions ****************/

/******************* Begin Misc. Macros. ********************************/

/* This macro can be used with the above bit masks to generate
   the appropriate position for the specified value. */
#define GENERATE_REGISTER_FIELD(value, mask)    \
    {uint tmp = mask;                           \
      while (!(tmp & 0x1)) do {                 \
        leftshift++;                            \
        tmp >>= 1;                              \
        value <<= 1;                            \
      }                                         \
      value &= mask;                            \
    }
        
/******************* End Misc. Macros.   ********************************/

#define PIXELS_PER_BYTE     1
/* Given a pointer to the begining of a bitmap and x and y coordinates, return 
    the pointer to the byte containing that coordinate. */
#define Pointer(p, x, y, bpl) ((UINT8*)(p) + (y) * bpl + (x) / PIXELS_PER_BYTE)


#define shft(x) ((3-((x)%4))*2)
#define GetAPixel(p,x,y,bpl) ((*Pointer(p,x,y,bpl) >> shft(x)) & 3)
#define NewPixel(p,x,y,v,bpl) ((*Pointer(p,x,y,bpl) & ~(3 << shft(x))) | ((v) << shft(x)))
#define SetAPixel(p,x,y,v,bpl) (*Pointer(p,x,y,bpl) = NewPixel(p,x,y,v,bpl))

typedef struct  
{
    const UINT8 *pb;
    int         ipixel;
    UINT8       rgpixel[4];
} READPTR;

typedef struct  
{
    UINT8   *pb;
    int     cbitShift;
    int     cbPerLine;
    BYTE    bMask;
} WRITEPTR;