1284comm.c

WinCE 3.0 BSP, 包含Inter SA1110, Intel_815E, Advantech_PCM9574 等

/*++
THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
PARTICULAR PURPOSE.
Copyright (c) 1995-1998  Microsoft Corporation

Module Name:

1284comm.c

Abstract:
P1284 protocol negotiation functions

Notes:

 DESCRIBED IN                 IEEE-1284 Standard Signaling Method
                              for a Bi-directional Parallel Peripheral
                              Interface for Personal Computer

--*/
#include  <windows.h>
#include  <ceddk.h>
#include  "pardbg.h"
#include    "1284comm.h"
#include    "tmtick.h"
#include "cc.h"
/****************************************************************************
 * End of Modification done by Naresh Gupta
 ****************************************************************************/
//---------------------------------------------------------------------------
// Constant definitions
//---------------------------------------------------------------------------

// Port Setting for Protocol negotiation.
// The following bitmask show the bit positions for each signal.
//      lptBase+1   = Status
//          -----XXX    Not Used
//          ----X---    nDataAvail (nFault)
//          ---X----    XFlag (Select)
//          --X-----    AckDataReq (Perror)
//          -X------    PtrClk (nAck)
//          X-------    Inverted PtrBusy (Busy)
//
//      lptBase+2  = Control
//          -------X    Inverted HostClk (nStrobe)
//          ------X-    Inverted HostAck (nAutoFd)
//          -----X--    nReverseRequest (nInit)
//          ----X---    Inverted 1284 Active (nSelectIn)
//          ---X----    nAck interrupt (nAckEn)
//          --X-----    Direction
//          XXX-----    Not Used

// The following defines are for data we write to the control port.
// Negotiation
#define CLEAR_MASK          0x40    // 0100 0000
                                    // shut off b7:autostrobe; stay in forward direction:b5.

#define INIT_MASK           0x0C    //  0000 1100
                                    //             ~Init HI, Autofd hi, Strobe HI
//The following defines are for data we read from the status port
// Negotiation
#define P_STATE2_MASK       0x78
#define P_STATE2_VALUE      0x38

#define P_STATE5_MASK       0x50    // 0101 0000
#define PN_STATE5_VALUE     0x40    // 0100 0000  XFlag Lo
#define P_STATE5_VALUE      0x50    // 0000 0000  PError Lo

#define PE_STATE6           0xD8
#define ECP_DSR_MASK        0xF8

// Termination
#define P_STATE24_MASK      0x50    // x1x1 x000
#define PN_STATE24_VALUE    0x10    // 0001 0000  Select Hi, nAck Lo
#define PBE_STATE24_VALUE   0x00    // 0000 0000  Select Lo, nAck Lo

#define P_STATE27_MASK      0x40    // 0100 0000
#define P_STATE27_VALUE     0x40    // 0100 0000  nAck Hi

// time constant
//#define P1284_MS            35
#define P1284_MS            140
#define LMK_MS              0x200

// mode constant
#define NIBBLE_MODE         0x00
#define ECP_MODE            0x10

// Multiplier used to access the printer registers.
extern unsigned dwPrinterRegMultiplier;

//---------------------------------------------------------------------------
VOID
P1284Terminate
(
    ULONG   ulBase,
    BOOL    Indicator   //=> TRUE if Nibble mode, FALSE elsewhere.
)
// PURPOSE
//  Terminate a P1284 mode protocol and return to compatibility mode.
//
// ASSUMPTIONS & ASSERTIONS
//  1)If any step during termination fails, drive control port to state 22
//    (0xEC) to abort, returns TRUE.
//
// INTERNAL STRUCTURES
//
// UNRESOLVED ISSUES
//
// RETURNS
//  1)TRUE -> success
//  2)FALSE -> I/O pending
//---------------------------------------------------------------------------
{
    unsigned     uStatusPort;
    unsigned     uControlPort;
    BYTE         bData;

    // Initialize the Port variables
    uStatusPort  = (unsigned)(ulBase + 1 * dwPrinterRegMultiplier);
    uControlPort = (unsigned)(ulBase + 2 * dwPrinterRegMultiplier);

    // preserve bit 6 (0x40) of control register
    bData = (BYTE)(READ_PORT_UCHAR((PUCHAR)uControlPort) & CLEAR_MASK);

    // Set dcr (1,1,0,0) state 22
    WRITE_PORT_UCHAR((PUCHAR)uControlPort, (BYTE)(bData | 0x0C));
     DEBUGMSG(ZONE_MAXIO,(TEXT("[P1284Terminate] Event 22 is set\r\n")));

    //Try for up to T(l) to get to state 24.
    //wait for 35 ms, get dsr
    if (Indicator)
    {
        // nibble mode, expect XFlag high (x,0,x,1,x)
        if (!CheckPort(uStatusPort, P_STATE24_MASK, PN_STATE24_VALUE, P1284_MS))
        {
               DEBUGMSG(ZONE_ERROR,(TEXT("[P1284Terminate] Timeout at State 24\r\n")));
            goto abortnow;
        }
    }
    else
    {
        // all other modes, expect XFlag low (x,0,x,0,x)
        if (!CheckPort(uStatusPort, P_STATE24_MASK, PBE_STATE24_VALUE, P1284_MS))
        {
               DEBUGMSG(ZONE_ERROR,(TEXT("[P1284Terminate] Timeout at State 24\r\n")));
            goto abortnow;
        }
    }
    DEBUGMSG(ZONE_IO,(TEXT("[P1284Terminate] State 25\r\n")));
    // Set state 25 (1,1,1,0), drop HostBusy (nAutoFd)
    WRITE_PORT_UCHAR((PUCHAR)uControlPort,(BYTE)(bData | 0x0E));    //nAutoFd Low

    //Try for up to T(l) to get to state 27.
    if (!CheckPort(uStatusPort, P_STATE27_MASK, P_STATE27_VALUE, P1284_MS))
    {
          DEBUGMSG(ZONE_ERROR,(TEXT("[P1284Terminate] Timeout at State 27 read\r\n")));
        goto abortnow;
    }

    DEBUGMSG(ZONE_IO,(TEXT("[P1284Terminate] State 28\r\n")));
    // Set state 28 (1,1,0,0).  This puts us back into compatiblity mode
    WRITE_PORT_UCHAR((PUCHAR)uControlPort, (BYTE)(bData | 0x0C));

    CheckPort(uStatusPort, 0x80, 0x80, P1284_MS);
    // CheckPort(uStatusPort, 0x80, 0x80, LMK_MS);

    return;

abortnow:
    WRITE_PORT_UCHAR((PUCHAR)uControlPort, (BYTE)(bData | 0x08));    //nInit Low
    WRITE_PORT_UCHAR((PUCHAR)uControlPort, (BYTE)(bData | 0x08));    //nInit Low
    WRITE_PORT_UCHAR((PUCHAR)uControlPort, (BYTE)(bData | 0x0C));
    return;
}
//---------------------------------------------------------------------------
DWORD
P1284Negotiate
(
    ULONG       ulBase,
    BYTE        bExtenByte
)
// PURPOSE
//  Negotiate channel to requested mode with request extension value.
//
// ASSUMPTIONS & ASSERTIONS
//  current mode is set to be the mode to negotiate with; if fails at event 2
//  should be set back to appropriate mode; if fails at event 6, P1284Terminate
//  will take care of this.
//  1) This code ASSUMES a ISA parallel port implementation,
//  2) current mode and phase are lpt/elpt mode, forward idle phase.
//
// INTERNAL STRUCTURES
//
// UNRESOLVED ISSUES
//
// RETURNS
//  1)PD_SUCCESS -> success
//  2)PD_NOTP1284
//  3)PD_UNSUPPORTED
//---------------------------------------------------------------------------
{
    ULONG uDataPort;
    ULONG uStatusPort;
    ULONG uControlPort;
    BYTE  bData;
    BYTE  bTemp = 0x00;

     DEBUGMSG(ZONE_IO,(TEXT("[P1284Negotiate] ExtenByte = %Xh\r\n"),bExtenByte));

    // Initialize the LPT Port variables
    uDataPort    = ulBase;
    uStatusPort  = (unsigned)(ulBase + 1 * dwPrinterRegMultiplier);
    uControlPort = (unsigned)(ulBase + 2 * dwPrinterRegMultiplier);

    bData = READ_PORT_UCHAR((PUCHAR)uStatusPort);
     DEBUGMSG(ZONE_IO,(TEXT("[P1284Negotiate] DSR = %Xh  "),bData));
    bData = READ_PORT_UCHAR((PUCHAR)uControlPort);
     DEBUGMSG(ZONE_IO,(TEXT("DCR = %Xh\r\n"),bData));

    // Initialize at state 0  (1,1,0,0)
    bData = (BYTE)(READ_PORT_UCHAR((PUCHAR)uControlPort) & CLEAR_MASK);    //0x40
    WRITE_PORT_UCHAR ((PUCHAR)uControlPort, (BYTE)(bData | INIT_MASK));            //0x0C

    // Drive Extensibility byte to the data lines, and set the control
    // port to state 1 (0,1,1,0) at least after .5us
    WRITE_PORT_UCHAR((PUCHAR)uDataPort, bExtenByte);

    WRITE_PORT_UCHAR((PUCHAR)uControlPort, (BYTE)(bData | 0x06));

    //get status (x,0,1,1,1)         //0x78        //0x38
    if (!CheckPort(uStatusPort, P_STATE2_MASK, P_STATE2_VALUE, P1284_MS))
    {
        DEBUGMSG(ZONE_ERROR,(TEXT("[P1284Negotiate] Timeout at E2 read\r\n")));
        // Remove stimulus at State 1
        // Remove the stimulus dcr (0,1,1,0)
        WRITE_PORT_UCHAR((PUCHAR)uControlPort, (BYTE)(bData | INIT_MASK));
        return (PD_NOTP1284);
    }

    //in 1 sec, set state 3 (0,1,1,1)
    WRITE_PORT_UCHAR((PUCHAR)uControlPort, (BYTE)(bData | 0x07));
    WRITE_PORT_UCHAR((PUCHAR)uControlPort, (BYTE)(bData | 0x07));

    // Wait .5 us, set state 4 (0,1,0,0)
    WRITE_PORT_UCHAR((PUCHAR)uControlPort, (BYTE)(bData | 0x04));
    WRITE_PORT_UCHAR((PUCHAR)uControlPort, (BYTE)(bData | 0x04));

    // wait 35ms , state 5 & 6
    if (bExtenByte == NIBBLE_MODE)
    {
        DEBUGMSG(ZONE_IO,(TEXT("[P1284Negotiate] E5/E6 read for nibble mode\r\n")));
       // nibble, expect (x,1,x,0,x)   //0x50         //0x40
       if (CheckPort(uStatusPort, P_STATE5_MASK, PN_STATE5_VALUE, P1284_MS))
          return (PD_SUCCESS);
    }
    else if (bExtenByte == ECP_MODE ||
             bExtenByte == (ECP_MODE | PN_REQ_DEVID))
    {
        DEBUGMSG(ZONE_IO,(TEXT("[P1284Negotiate] E5/E6 read for ECP mode\r\n")));
       // ECP mode, expect (1,1,0,1,1)            //0x40
       if (CheckPort(uStatusPort, ECP_DSR_MASK, PE_STATE6, P1284_MS))
          return (PD_SUCCESS);
    }
    else