ct69000.h

WinCE 3.0 BSP, 包含Inter SA1110, Intel_815E, Advantech_PCM9574 等

//-----------------------------------------------------------------------
//
//  THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
//  ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
//  THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
//  PARTICULAR PURPOSE.
//  Copyright (c) 1999  Microsoft Corporation
//
//  written by:     ESG Solution Center Munich
//
//  Module Name:    ct69000.h
//    
//  abstract:       Windows CE display driver for C&T 69000
//                  hardware related definitions
//    
//-----------------------------------------------------------------------


#ifndef __CT69000_H__
#define __CT69000_H__

#include "gpe.h"

//
//  emulate a PocketPC display on a larger screen
//
#define EMULATE_PPCDISPLAY  0

#define PPC_WIDTH    240
#define PPC_HEIGHT   320

// fixed palette will use a 332 palette instead of the default
// palette to allow the driver to implement font smoothing on 8bpp

#define FIXED_PALETTE 0

//
//  if BIOSSETUP is used, there is no additional chip 
//  initialization done in the driver. This might be useful
//  if user has a new flatpanel which the driver doesn't support,
//
//  The VESA video mode MUST be setup in loadcepc and passed to the driver
//  in the structure described in bootarg.h
//
//  In DEBUG mode, the debugger spews out the initialization values for the 
//  chip, which can then be add to vomdes.h as a seperate video mode.
//

#define BIOSSETUP 0

#if !BIOSSETUP
//
//  define default videomode and bpp here!
//  this mode will be used if there is no
//  other registry entry
//

//
//  0 - 640x480
//  1 - 800x600
//  2 - 1024x768
//
//#define VIDEOMODE   min(2,N_GPEMODES-1)
#define	VIDEOMODE	1

//
//  default refresh rate - 60, 75, 85
//  default is 60 Hz
//
#define REFRESHRATE 72


//
//  select 8, 16 or 24 bit modes...or set environment var
//
#ifndef FBBPP
#define FBBPP       16
#endif

#if DXPAK
#if FBBPP!=16
#error "this driver supports only 16 bit modes with DXPAK"  
#endif
#endif

#if FBBPP==8
#define BYTESPERPIXEL(x) (x)
#elif FBBPP==16
#define BYTESPERPIXEL(x) ((x)<<1)
#elif FBBPP==24
#define BYTESPERPIXEL(x) (((x)<<1)+(x))
#else
#error environment variable FBBPP should be set to 8, 16 or 24
#endif

#else //!BIOSSETUP

//
//  video mode setup is done via BIOS!
//  always assume VIDEOMODE 0 and Refreshrate 60Hz
//

#define VIDEOMODE   0
#define REFRESHRATE 60
#define BYTESPERPIXEL(x) ((x)*m_nScreenBytesPerPixel)

#endif//!BIOSSETUP


#define CURSORDEBUG 0       // allow debugging using cursor

//
// to use multiple ct69000 boards in one system,
// set N_DISPLAY to 1,2,..n for the n-th board
// and SCAN_PCIBUS to 1
//
#define N_DISPLAY   1 
#define SCAN_PCIBUS 0

// some definitions of VGA registers
#define VGA_STATUS_REG0 (0x3c2)
#define VGA_STATUS_REG1 (0x3da) 
#define VGA_SETUP_REG   ((PUCHAR)0x3c3) 
#define VGA_MSR_REG     (0x3c2) 

// dac rw helper addresses
#define VGA_DAC_WR_AD  (0x3c8)
#define VGA_DAC_DATA   (0x3c9)

#define VGA_SR_BASE    ((PUCHAR)0x3c4)
#define VGA_GR_BASE    ((PUCHAR)0x3ce)
#define VGA_AR_BASE    ((PUCHAR)0x3c0)
#define VGA_CR_BASE    ((PUCHAR)0x3d4)
#define VGA_XR_BASE    ((PUCHAR)0x3d6)
#define VGA_FR_BASE    ((PUCHAR)0x3d0)

// some CT69000 chip constants

#define CT69000_VENDORID 0x102c
#define CT69000_DEVICEID 0xc0

#define CT69030_VENDORID 0x102c
#define CT69030_DEVICEID 0xc30

// 2MB frame buffer (little endian) for 69000
#define CT69000_VIDEOMEMORYSIZE (1024L*1024L*2)     

// 4MB frame buffer (little endian) for 69030
#define CT69030_VIDEOMEMORYSIZE (1024L*1024L*4)     

// 128 kb of control registers in FB at offset 4MB
#define CT69000_CTRLREGOFFSET       (1024L*1024L*4L)            
#define CT69000_CTRLREGSIZE     (1024L*128L)            

// offset of palette registers in FB window
#define CT69000_PALETTE_MASK        0x78c
#define CT69000_PALETTE_STATE       0x78d
#define CT69000_PALETTE_READINDEX   0x78d
#define CT69000_PALETTE_WRITEINDEX  0x790
#define CT69000_PALETTE_DATA        0x791

// define BR (blitter) register set base
#define CT69000_BR                  0x0

// offset in frame buffer of extension registers
#define CT69000_CRINDEX 0x7a8
#define CT69000_CRDATA  0x7a9

// offset in frame buffer of extension registers
#define CT69000_XRINDEX 0x7ac
#define CT69000_XRDATA  0x7ad

// offset in frame buffer of multimedia registers
#define CT69000_MRINDEX 0x7a4
#define CT69000_MRDATA  0x7a5

#define CT69000_BITBLT_DATA 0x10000

// definitions for XR register indexes

#define CT69000_PPCONF0                     0x80

// control registers for Cursor 1
// names are taken from databook
#define CT69000_CURSOR1_CONTROL             0xa0
#define CT69000_CURSOR1_VERTICALEXTENSION   0xa1
#define CT69000_CURSOR1_BASEADDRESSLOW      0xa2
#define CT69000_CURSOR1_BASEADDRESSHIGH     0xa3
#define CT69000_CURSOR1_XPOSITIONLOW        0xa4
#define CT69000_CURSOR1_XPOSITIONHIGH       0xa5
#define CT69000_CURSOR1_YPOSITIONLOW        0xa6
#define CT69000_CURSOR1_YPOSITIONHIGH       0xa7

// control registers for Cursor 2
// names are taken from databook
#define CT69000_CURSOR2_CONTROL             0xa8
#define CT69000_CURSOR2_VERTICALEXTENSION   0xa9
#define CT69000_CURSOR2_BASEADDRESSLOW      0xaa
#define CT69000_CURSOR2_BASEADDRESSHIGH     0xab
#define CT69000_CURSOR2_XPOSITIONLOW        0xac
#define CT69000_CURSOR2_XPOSITIONHIGH       0xad
#define CT69000_CURSOR2_YPOSITIONLOW        0xae
#define CT69000_CURSOR2_YPOSITIONHIGH       0xaf

// size of cursor ram space (4kb)
#define CT69000_CURSOR_SPACE    0x1000
#define CT69000_CURSOR_REGIONS  4
#define CT69000_CURSOR_REGION_SIZE  (CT69000_CURSOR_SPACE/CT69000_CURSOR_REGIONS)

// size for pattern data
// max. is 24bpp pattern, occupies 256 bytes
#define CT69000_PATTERN_SPACE   0x100

//
//  clock of reference oscillator
//
#define CT69000_REF_CLOCK       14318180L

#define CT69000_OVLFORMAT_RGB565    1
#define CT69000_OVLFORMAT_RGB555    2
#define CT69000_OVLFORMAT_YUV       3

#define CT69000_VGABASE             0x3c0
//
// message levels (driver internally)
//

#ifndef DEBUG
#undef  DEBUGZONE
#define DEBUGZONE(x) 1
#define DBGBLTPARMS( level, parms) /**/
#else
#define DBGBLTPARMS( level, parms) DbgBltParms( level, parms)
#endif

#define CT69K_ZONE_ERROR        DEBUGZONE(16)
#define CT69K_ZONE_WARNING      DEBUGZONE(17)
#define CT69K_ZONE_PERF         DEBUGZONE(18)
#define CT69K_ZONE_TEMP         DEBUGZONE(19)
#define CT69K_ZONE_FUNCTION     DEBUGZONE(20)
#define CT69K_ZONE_INIT         DEBUGZONE(21)
#define CT69K_ZONE_BLTLO        DEBUGZONE(22)
#define CT69K_ZONE_BLTHI        DEBUGZONE(23)
#define CT69K_ZONE_SURF         DEBUGZONE(24)
#define CT69K_ZONE_FLIP         DEBUGZONE(25)
#define CT69K_ZONE_LINE         DEBUGZONE(26)
#define CT69K_ZONE_HW           DEBUGZONE(27)
#define CT69K_ZONE_POLYGON      DEBUGZONE(28)
#define CT69K_ZONE_CURSOR       DEBUGZONE(29)
#define CT69K_ZONE_DDRAW        DEBUGZONE(30)

#define CT69K_MSG_ERROR     (1L<<16)
#define CT69K_MSG_WARNING   (1L<<17)
#define CT69K_MSG_PERF      (1L<<18)
#define CT69K_MSG_TEMP      (1L<<19)
#define CT69K_MSG_FUNCTION  (1L<<20)
#define CT69K_MSG_INIT      (1L<<21)
#define CT69K_MSG_BLTLO     (1L<<22)
#define CT69K_MSG_BLTHI     (1L<<23)
#define CT69K_MSG_SURF      (1L<<24)
#define CT69K_MSG_FLIP      (1L<<25)
#define CT69K_MSG_LINE      (1L<<26)
#define CT69K_MSG_HW        (1L<<27)
#define CT69K_MSG_POLYGON   (1L<<28)
#define CT69K_MSG_CURSOR    (1L<<29)
#define CT69K_MSG_DDRAW     (1L<<30)

#define GPE_MSG_ERROR      (1L<<0)
#define GPE_MSG_WARNING    (1L<<1)
#define GPE_MSG_PERF       (1L<<2)
#define GPE_MSG_TEMP       (1L<<3)
#define GPE_MSG_ENTER      (1L<<4)
#define GPE_MSG_INIT       (1L<<5)
#define GPE_MSG_BLT_HI     (1L<<6)
#define GPE_MSG_BLT_LO     (1L<<7)
#define GPE_MSG_CREATE     (1L<<8)
#define GPE_MSG_FLIP       (1L<<9)
#define GPE_MSG_LINE       (1L<<10)
#define GPE_MSG_HW         (1L<<11)
#define GPE_MSG_POLY       (1L<<12)
#define GPE_MSG_CURSOR     (1L<<13)

#define GPE_SPECIAL_SURFACE 0x100
#define GPE_DDRAW_SURFACE   0x200

#define DEBUGENTER(func)\
{\
    DEBUGMSG( CT69K_ZONE_DDRAW, (TEXT("DD:Enter %s\r\n"),TEXT(#func)));\
}

#define DEBUGLEAVE(func)\
{\
    DEBUGMSG( CT69K_ZONE_DDRAW, (TEXT("DD:Leave %s\r\n"),TEXT(#func)));\
}

//
//	was undefined in DXPAK 1.0
//
#ifndef FOURCC_YUYV422
#define FOURCC_YUYV422 MAKEFOURCC('Y','U','Y','V')
#endif

//
// some addresses where to find vendor/device id
// and pci bus mapping
//


#define CT69000_XRPORTINDEX  ((PUCHAR)0x3d6)
#define CT69000_XRPORTDATA   ((PUCHAR)0x3d7)

#define ESCSETDEBUGMODE 100000

#if !DEBUG
#define  SetBR( ulIndex, ulData)\
    ((volatile PULONG)m_pCtrlRegister)[CT69000_BR+(ulIndex)]=(ulData)

#endif

typedef struct tagVGAPortData {
    WORD wAddress;
    BYTE bIndex;
    BYTE bData;
} VGAPortData, *PVGAPortData;

class CT69000Surf;

class CT69000  : public GPE
{
private:
    static ULONG VGAtoLinear[];

    // physical address of the frame buffer
    ULONG               m_ulPhysFrameBuffer;

    // pointer to video memory and ctrl registers
    volatile PUCHAR     m_pFrameBuffer;
    volatile PUCHAR     m_pCtrlRegister;

    // Size in bytes of video RAM total
    ULONG               m_ulVideoMemorySize;    
    INT                 m_nScreenStride;        // Stride of 2d memory in bytes