gfx_regs.h

WinCE 3.0 BSP, 包含Inter SA1110, Intel_815E, Advantech_PCM9574 等

#define SC1400_CB_MISC_CONFIG               0x0034     

/* MISCELLANEOUS CONFIG REGISTER BIT DEFINITIONS */

#define SC1400_MCR_GENLOCK_SINGLE           0x00000004  
#define SC1400_MCR_VPIN_CCIR656             0x00000010
#define SC1400_MCR_VPOUT_MODE               0x00000020 
#define SC1400_MCR_VPOUT_CK_SELECT          0x00004000 
#define SC1400_MCR_VPOUT_CK_SOURCE          0x00008000
#define SC1400_MCR_GENLOCK_SYNC_FALLING     0x00010000
#define SC1400_MCR_GENLOCK_CRT_FALLING      0x00020000  
#define SC1400_MCR_GENLOCK_CONTINUE         0x00040000  
#define SC1400_MCR_GENLOCK_TIMEOUT_ENABLE   0x00080000  

/*----------*/
/*  SC1200  */
/*----------*/

/* SC1200 VIDEO REGISTER DEFINITIONS */

#define SC1200_VIDEO_CONFIG                 0x000
#define SC1200_DISPLAY_CONFIG               0x004
#define SC1200_VIDEO_X_POS                  0x008
#define SC1200_VIDEO_Y_POS                  0x00C
#define SC1200_VIDEO_SCALE                  0x010
#define SC1200_VIDEO_COLOR_KEY              0x014
#define SC1200_VIDEO_COLOR_MASK             0x018
#define SC1200_PALETTE_ADDRESS              0x01C
#define SC1200_PALETTE_DATA                 0x020
#define SC1200_VID_MISC                     0x028
#define SC1200_VID_CLOCK_SELECT             0x02C
#define SC1200_VID_CRC                      0x044
#define SC1200_DEVICE_ID                    0x048
#define SC1200_VID_ALPHA_CONTROL            0x04C
#define SC1200_CURSOR_COLOR_KEY             0x050
#define SC1200_CURSOR_COLOR_MASK            0x054
#define SC1200_CURSOR_COLOR_1               0x058
#define SC1200_CURSOR_COLOR_2               0x05C
#define SC1200_ALPHA_XPOS_1                 0x060
#define SC1200_ALPHA_YPOS_1                 0x064
#define SC1200_ALPHA_COLOR_1                0x068
#define SC1200_ALPHA_CONTROL_1              0x06C
#define SC1200_ALPHA_XPOS_2                 0x070
#define SC1200_ALPHA_YPOS_2                 0x074
#define SC1200_ALPHA_COLOR_2                0x078
#define SC1200_ALPHA_CONTROL_2              0x07C
#define SC1200_ALPHA_XPOS_3                 0x080
#define SC1200_ALPHA_YPOS_3                 0x084
#define SC1200_ALPHA_COLOR_3                0x088
#define SC1200_ALPHA_CONTROL_3              0x08C
#define SC1200_TVOUT_HORZ_TIM               0x800
#define SC1200_TVOUT_HORZ_SYNC              0x804
#define SC1200_TVOUT_VERT_SYNC              0x808
#define SC1200_TVOUT_LINE_END               0x80C
#define SC1200_TVOUT_VERT_DOWNSCALE         0x810
#define SC1200_TVOUT_HORZ_SCALING           0x814
#define SC1200_TVOUT_EMMA_BYPASS            0x81C
#define SC1200_TVENC_TIM_CTRL_1             0xC00
#define SC1200_TVENC_TIM_CTRL_2             0xC04
#define SC1200_TVENC_TIM_CTRL_3             0xC08
#define SC1200_TVENC_SUB_FREQ               0xC0C
#define SC1200_TVENC_DISP_POS               0xC10
#define SC1200_TVENC_DISP_SIZE              0xC14
#define SC1200_TVENC_CC_DATA                0xC18
#define SC1200_TVENC_EDS_DATA               0xC1C
#define SC1200_TVENC_CGMS_DATA              0xC20
#define SC1200_TVENC_WSS_DATA               0xC24
#define SC1200_TVENC_CC_CONTROL             0xC28
#define SC1200_TVENC_DAC_CONTROL            0xC2C

/* "SC1200_VIDEO_CONFIG" BIT DEFINITIONS */

#define SC1200_VCFG_VID_EN                  0x00000001  
#define SC1200_VCFG_VID_REG_UPDATE          0x00000002  
#define SC1200_VCFG_VID_INP_FORMAT          0x0000000C  
#define SC1200_VCFG_8_BIT_4_2_0             0x00000004
#define SC1200_VCFG_16_BIT_4_2_0            0x00000008
#define SC1200_VCFG_GV_SEL                  0x00000010  
#define SC1200_VCFG_CSC_BYPASS              0x00000020  
#define SC1200_VCFG_X_FILTER_EN             0x00000040  
#define SC1200_VCFG_Y_FILTER_EN             0x00000080  
#define SC1200_VCFG_LINE_SIZE_LOWER_MASK    0x0000FF00  
#define SC1200_VCFG_INIT_READ_MASK          0x01FF0000  
#define SC1200_VCFG_EARLY_VID_RDY           0x02000000  
#define SC1200_VCFG_LINE_SIZE_UPPER         0x08000000  
#define SC1200_VCFG_4_2_0_MODE              0x10000000  
#define SC1200_VCFG_16_BIT_EN               0x20000000
#define SC1200_VCFG_HIGH_SPD_INT            0x40000000

/* "SC1200_DISPLAY_CONFIG" BIT DEFINITIONS */

#define SC1200_DCFG_DIS_EN                  0x00000001  
#define SC1200_DCFG_HSYNC_EN                0x00000002  
#define SC1200_DCFG_VSYNC_EN                0x00000004  
#define SC1200_DCFG_DAC_BL_EN               0x00000008  
#define SC1200_DCFG_DAC_PWDNX               0x00000020  
#define SC1200_DCFG_TVOUT_EN                0x000000C0  
#define SC1200_DCFG_CRT_HSYNC_POL           0x00000100  
#define SC1200_DCFG_CRT_VSYNC_POL           0x00000200  
#define SC1200_DCFG_FP_HSYNC_POL            0x00000400  
#define SC1200_DCFG_FP_VSYNC_POL            0x00000800  
#define SC1200_DCFG_XGA_FP                  0x00001000  
#define SC1200_DCFG_FP_DITH_EN              0x00002000  
#define SC1200_DCFG_CRT_SYNC_SKW_MASK       0x0001C000
#define SC1200_DCFG_CRT_SYNC_SKW_INIT       0x00010000
#define SC1200_DCFG_PWR_SEQ_DLY_MASK        0x000E0000
#define SC1200_DCFG_PWR_SEQ_DLY_INIT        0x00080000
#define SC1200_DCFG_VG_CK                   0x00100000
#define SC1200_DCFG_GV_PAL_BYP              0x00200000
#define SC1200_DCFG_DDC_SCL                 0x00400000
#define SC1200_DCFG_DDC_SDA                 0x00800000
#define SC1200_DCFG_DDC_OE                  0x01000000
#define SC1200_DCFG_16_BIT_EN               0x02000000

/* VIDEO DE-INTERLACING AND ALPHA CONTROL (REGISTER 0x4C) */

#define SC1200_ALPHA1_PRIORITY_POS          16
#define SC1200_ALPHA1_PRIORITY_MASK         0x00030000
#define SC1200_ALPHA2_PRIORITY_POS          18
#define SC1200_ALPHA2_PRIORITY_MASK         0x000C0000
#define SC1200_ALPHA3_PRIORITY_POS          20
#define SC1200_ALPHA3_PRIORITY_MASK         0x00300000

/* ALPHA CONTROL BIT DEFINITIONS (REGISTERS 0x6C, 0x7C, AND 0x8C) */

#define SC1200_ACTRL_WIN_ENABLE             0x00010000
#define SC1200_ACTRL_LOAD_ALPHA             0x00020000

/* SC1200 VIP REGISTER DEFINITIONS */

#define SC1200_VIP_CONFIG                   0x00000000
#define SC1200_VIP_CONTROL                  0x00000004
#define SC1200_VIP_STATUS                   0x00000008
#define SC1200_VIP_CURRENT_LINE             0x00000010
#define SC1200_VIP_LINE_TARGET              0x00000014
#define SC1200_VIP_ODD_BASE                 0x00000020
#define SC1200_VIP_EVEN_BASE                0x00000024
#define SC1200_VIP_PITCH                    0x00000028
#define SC1200_VBI_ODD_BASE                 0x00000040
#define SC1200_VBI_EVEN_BASE                0x00000044
#define SC1200_VBI_PITCH                    0x00000048

/* "SC1200_VIP_CONTROL" BIT DEFINITIONS */

#define SC1200_VIP_DATA_CAPTURE_EN          0x00000100
#define SC1200_VIP_VBI_CAPTURE_EN           0x00000200

/* SC1200 CONFIGURATION BLOCK */

#define SC1200_CB_BASE_ADDR                 0x9000   
#define SC1200_CB_MISC_CONFIG               0x0034     

/* MISCELLANEOUS CONFIG REGISTER BIT DEFINITIONS */

#define SC1200_MCR_GENLOCK_SINGLE           0x00000004  
#define SC1200_MCR_VPIN_CCIR656             0x00000010
#define SC1200_MCR_VPOUT_MODE               0x00000020 
#define SC1200_MCR_VPOUT_CK_SELECT          0x00004000 
#define SC1200_MCR_VPOUT_CK_SOURCE          0x00008000
#define SC1200_MCR_GENLOCK_SYNC_FALLING     0x00010000
#define SC1200_MCR_GENLOCK_CRT_FALLING      0x00020000  
#define SC1200_MCR_GENLOCK_CONTINUE         0x00040000  
#define SC1200_MCR_GENLOCK_TIMEOUT_ENABLE   0x00080000  

/*---------------------------------*/
/*  PHILIPS SAA7114 VIDEO DECODER  */
/*---------------------------------*/

#define SAA7114_CHIPADDR                    0x42

#define SAA7114_BRIGHTNESS                  0x0A
#define SAA7114_CONTRAST                    0x0B
#define SAA7114_SATURATION                  0x0C
#define SAA7114_HUE                         0x0D
#define SAA7114_HORZ_OFFSET_LO              0x94
#define SAA7114_HORZ_OFFSET_HI              0x95
#define SAA7114_HORZ_INPUT_LO               0x96
#define SAA7114_HORZ_INPUT_HI               0x97
#define SAA7114_VERT_OFFSET_LO              0x98
#define SAA7114_VERT_OFFSET_HI              0x99
#define SAA7114_VERT_INPUT_LO               0x9A
#define SAA7114_VERT_INPUT_HI               0x9B
#define SAA7114_HORZ_OUTPUT_LO              0x9C
#define SAA7114_HORZ_OUTPUT_HI              0x9D
#define SAA7114_VERT_OUTPUT_LO              0x9E
#define SAA7114_VERT_OUTPUT_HI              0x9F
#define SAA7114_HORZ_PRESCALER              0xA0
#define SAA7114_FILTER_CONTRAST             0xA5
#define SAA7114_FILTER_SATURATION           0xA6
#define SAA7114_HSCALE_LUMA_LO              0xA8
#define SAA7114_HSCALE_LUMA_HI              0xA9
#define SAA7114_HSCALE_CHROMA_LO            0xAC
#define SAA7114_HSCALE_CHROMA_HI            0xAD
#define SAA7114_VSCALE_LUMA_LO              0xB0
#define SAA7114_VSCALE_LUMA_HI              0xB1
#define SAA7114_VSCALE_CHROMA_LO            0xB2
#define SAA7114_VSCALE_CHROMA_HI            0xB3
#define SAA7114_VSCALE_CONTROL              0xB4

/* END OF FILE */