gxvideo.h
来自「WinCE 3.0 BSP, 包含Inter SA1110, Intel_815」· C头文件 代码 · 共 380 行 · 第 1/2 页
H
380 行
//unsigned long background );
// Misc.cpp:
virtual void WaitForNotBusy();
virtual int IsBusy();
void WaitForFIFO( int numParameters );
void SelectSolidColor( unsigned long color );
unsigned long GetBltSolidColor( GPEBltParms *pBltParms );
virtual void GetPhysicalVideoMemory(
unsigned long *pPhysicalMemoryBase,
unsigned long *pVideoMemorySize );
unsigned char gx_read_processor_id(void);
unsigned char gx_read_gcr(void);
void execute_cpu_write(unsigned long reg, unsigned long data);
unsigned long execute_cpu_read(unsigned long reg);
void ResetBB0(void);
void ResetBB1(void);
unsigned long GetDeviceId(void);
virtual void PowerHandler(BOOL bOff);
virtual SCODE GetModeInfo(
GPEMode *pMode,
int modeNo );
virtual int NumModes();
// Surf.cpp:
virtual SCODE AllocSurface(
GPESurf **ppSurf,
int width,
int height,
EGPEFormat format,
int surfaceFlags );
#ifdef DD_SUPPORT
virtual SCODE AllocSurface(
DDGPESurf **ppSurf,
int width,
int height,
EGPEFormat format,
EDDGPEPixelFormat pixelFormat,
int surfaceFlags );
virtual SCODE AllocOverlaySurface(
DDGPESurf **ppSurf,
int width,
int height,
EGPEFormat format,
EDDGPEPixelFormat pixelFormat,
int surfaceFlags ); //ullas
#endif //DD_SUPPORT
void CheckVisibleSurface();
virtual int SurfaceBusyFlipping( GxVideoSurf *pSurf );
virtual int FlipInProgress();
virtual void SetVisibleSurface( GPESurf *pSurf );
virtual void SetVisibleSurface(GPESurf *pSurf, BOOL bWaitForVBlank);
virtual void VBlankReceived(); // Called when VBlank is entered
// Line.cpp:
virtual SCODE Line(
GPELineParms *pLineParms,
EGPEPhase phase );
SCODE AcceleratedSolidLine(GPELineParms *pLineParms);
// Blt.cpp:
virtual SCODE BltPrepare( GPEBltParms *pBltParms );
virtual SCODE BltComplete( GPEBltParms *pBltParms );
SCODE AcceleratedFillRect( GPEBltParms *pBltParms );
SCODE AcceleratedFillRectDst( GPEBltParms *pBltParms );
SCODE AcceleratedSrcCopyBlt( GPEBltParms *pBltParms );
SCODE AcceleratedTextBlt( GPEBltParms *pBltParms );
SCODE AcceleratedBitmapScreenBlt( GPEBltParms *pBltParms );
SCODE AcceleratedBitmapScreenLookupBlt( GPEBltParms *pBltParms );
SCODE AcceleratedMaskCopyBlt( GPEBltParms *pBltParms );
SCODE AcceleratedPatternFill( GPEBltParms *pBltParms );
SCODE AcceleratedPatternLookupFill( GPEBltParms *pBltParms );
SCODE AcceleratedWxHPatternFill( GPEBltParms *pBltParms );
SCODE AcceleratedRedFill( GPEBltParms *pBltParms );
//flash.cpp
GxVideo(int Test);
SCODE SetTestMode( int modeId);
unsigned long GetDpyMode(GPEMode pMode );
void DisplayTestScreen(int width, int height, int depth, int freq);
void DisplayBitmapData( int Resoffset, int Freqoffset, int xpos, int ypos );
void DrawStraightLine( int x1, int y1, int x2, int y2 );
void DrawBorder( int wid, int ht );
void ToggleCursor( BOOL flag );
};
#ifdef DD_SUPPORT
class GxVideoSurf : public DDGPESurf
#else
class GxVideoSurf : public GPESurf
#endif //DD_SUPPORT
{
private:
Node2D *m_pNode2D;
public:
GxVideoSurf( // Create video-memory surface
int width,
int height,
unsigned long offset,
void *pBits, // virtual address of allocated bits
int stride,
EGPEFormat format,
Node2D *pNode );
#ifdef DD_SUPPORT
GxVideoSurf( // Create video-memory surface
int width,
int height,
unsigned long offset,
void *pBits, // virtual address of allocated bits
int stride,
EGPEFormat format,
EDDGPEPixelFormat pixelFormat,
Node2D *pNode );
#endif //DD_SUPPORT
virtual ~GxVideoSurf();
int Top() { return m_pNode2D->Top(); }
int Left() { return m_pNode2D->Left(); }
};
// Command types:
#define DRAW_LINE 0x02000
#define RECTANGLE_FILL 0x04000
#define CMD_BITBLT 0x0C000
// Move/draw:
#define DRAW 0x0010
// Read/write:
#define READ 0x0000
#define WRITE 0x0001
// Drawing direction bits:
#define PLUS_X 0x0020
#define PLUS_Y 0x0080
#define MAJOR_Y 0x0040
// Direct access non-standard VGA/GxVideo IO mapped registers
#define reg_SETUP (PORT_RW_8 m_VGAIOPort[PortId_3C3]) //Sleep mode (was optionally 46E8 in old revs of chip)
// Indexed registers and their aliases
//
#define reg_BKWD_3 reg_CR[0x34] // R/W Snoop control & CR3B enable
#define reg_LOCK_1 reg_CR[0x38] // R/W Write 0x48 here to unlock GX Reg set
#define reg_LOCK_2 reg_CR[0x39] // R/W Write 0xA0 here to enable CR68 & CR36[7:2]
#define reg_DT_EX_POS reg_CR[0x3B] // R/W Start display FIFO fetch(= -5+CR0)
#define reg_SYS_CNFG reg_CR[0x40] // R/W Enable enhanced reg access ( x2E8 )
#define reg_HGC_MODE reg_CR[0x45] // R/W Graphics cursor enable
#define reg_HWGC_ORGX_H reg_CR[0x46] // R/W Graphics cursor origin X high
#define reg_HWGC_ORGX_L reg_CR[0x47] // R/W Graphics cursor origin X low
#define reg_HWGC_ORGY_H reg_CR[0x48] // R/W Graphics cursor origin Y high
#define reg_HWGC_ORGY_L reg_CR[0x49] // R/W Graphics cursor origin Y low
#define reg_HWGC_FGSTK reg_CR[0x4A] // R/W Foreground color 3-entry stack
#define reg_HWGC_BGSTK reg_CR[0x4B] // R/W Background color 3-entry stack
#define reg_HWGC_STA_H reg_CR[0x4C] // R/W Cursor storage start addr high
#define reg_HWGC_STA_L reg_CR[0x4D] // R/W Cursor storage start addr low
#define reg_HWGC_DX reg_CR[0x4E] // R/W Offset (for cursors off left of screen)
#define reg_HWGC_DY reg_CR[0x4F] // R/W Offset (for cursors off top of screen)
#define reg_LAW_POS_H reg_CR[0x59] // R/W LAW address Bits 31:24
#define reg_LAW_POS_L reg_CR[0x5A] // R/W LAW address Bits 23:16
#define reg_EXT_MCTL_2 reg_CR[0x54] // R/W Number of mem access cyc avail
#define reg_EXT_MCTL_3 reg_CR[0x60] // R/W # 4 or 8 byte units / access grant
#define reg_PIXEL_CNTL reg_BEE8[0xA] // Select between mix registers
#define reg_MULT_MISC reg_BEE8[0xE] // Select MB starts, Enables compares, Select 32-bit command regs
#define reg_ERR_TERM (MM_RW_16 m_pMMIO[0x92E8] ) // R/W Initial error term for lines
#define reg_MAJ_AXIS_PCNT (MM_RW_16 m_pMMIO[0x96E8] ) // R/W Major axis pixel count
#define reg_GP_STAT (MM_RO_16 m_pMMIO[0x9AE8] ) // R FIFO Status & hardware busy
#define reg_CMD (MM_WO_16 m_pMMIO[0x9AE8] ) // W Drawing command, mode, ctrl
#define reg_FRGD_COLOR (MM_RW_16 m_pMMIO[0xA6E8] ) // R/W Foreground color
#define reg_COLOR_CMP (MM_RW_16 m_pMMIO[0xB2E8] ) // R/W Color compare value
#define reg_FRGD_MIX (MM_RW_16 m_pMMIO[0xBAE8] ) // R/W Foreground Mix (source & 4-bitROP)
// 32-bit WRITE ONLY concatenated accelerator registers (0..15), (16..32)
#define reg_ALT_CURXY (MM_WO_32 m_pMMIO[0x8100] ) // CUR_Y, CUR_X
#define reg_ALT_STEP (MM_WO_32 m_pMMIO[0x8108] ) // DESTY_AXSTP, DESTX_DIASTP
#define reg_ALT_PCNT (MM_WO_32 m_pMMIO[0x8148] ) // MIN_AXIS_PCNT, MAJ_AXIS_PCNT
#endif __GXVIDEO_H__
⌨️ 快捷键说明
复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?