📄 gpevga.cpp
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0x00000000, 0x00000640, 0x0012C000, // fb_start, cb_start, cur_start
0x00200200, 0x000000C8, // line delta, buffer size
0x0417031F, 0x0417031F, 0x037F033F, 0x037F033F, 1,// horizontal timings
0x02760257, 0x02760257, 0x025B0258, 0x025B0258, 1,// vertical timings
0x27AC6DFF, // CX5520 = 99.000 MHz
0x27E36802, // CX5530 = 99.000 MHz
0x02000002, // CX55xx VCFG initial value
},
{ { DDI_1024x768x8x60, 1024, 768, 8, 60, gpe8Bpp },
1024, 768, 8, 60, // display parameters
0x00006583, 0x0000006F, 0x00003005, // gcfg, tcfg, ocfg
0x00000000, 0x000C0000, 0x001FFF00, // fb_start, cb_start, cur_start
0x00040100, 0x00000080, // line delta, buffer size
0x053F03FF, 0x053F03FF, 0x049F0417, 0x049F0417, 0,// horizontal timings
0x032502FF, 0x032502FF, 0x03080302, 0x03080302, 0,// vertical timings
0x27585D7F, // CX5520 = 65.000 MHz
0x37911801, // CX5530 = 65.000 MHz
0x02000002, // CX55xx VCFG initial value
},
{ { DDI_1024x768x8x70, 1024, 768, 8, 70, gpe8Bpp },
1024, 768, 8, 70, // display parameters
0x00006583, 0x0000006F, 0x00003005, // gcfg, tcfg, ocfg
0x00000000, 0x000C0000, 0x001FFF00, // fb_start, cb_start, cur_start
0x00040100, 0x00000080, // line delta, buffer size
0x052F03FF, 0x052F03FF, 0x049F0417, 0x049F0417, 0,// horizontal timings
0x032502FF, 0x032502FF, 0x03080302, 0x03080302, 0,// vertical timings
0x270885FF, // CX5520 = 75.000 MHz
0x37E22801, // CX5530 = 75.000 MHz
0x02000002, // CX55xx VCFG initial value
},
{ { DDI_1024x768x8x75, 1024, 768, 8, 75, gpe8Bpp },
1024, 768, 8, 75, // display parameters
0x00006583, 0x0000006F, 0x00003005, // gcfg, tcfg, ocfg
0x00000000, 0x000C0000, 0x001FFF00, // fb_start, cb_start, cur_start
0x00040100, 0x00000080, // line delta, buffer size
0x051F03FF, 0x051F03FF, 0x046F040F, 0x046F040F, 1,// horizontal timings
0x031F02FF, 0x031F02FF, 0x03030300, 0x03030300, 1,// vertical timings
0x27915BFF, // CX5520 = 78.750 MHz
0x27915801, // CX5530 = 78.750 MHz
0x02000002, // CX55xx VCFG initial value
},
{ { DDI_1024x768x8x85, 1024, 768, 8, 85, gpe8Bpp },
1024, 768, 8, 85, // display parameters
0x00006583, 0x0000006F, 0x00003005, // gcfg, tcfg, ocfg
0x00000000, 0x000C0000, 0x000F0000, // fb_start, cb_start, cur_start
0x00040100, 0x00000080, // line delta, buffer size
0x055F03FF, 0x055F03FF, 0x048F042F, 0x048F042F, 1,// horizontal timings
0x032702FF, 0x032702FF, 0x03030300, 0x03030300, 1,// vertical timings
0x27915BFF, // CX5520 = 78.750 MHz
0x27EC4802, // CX5530 = 78.750 MHz
0x02000002, // CX55xx VCFG initial value
},
{ { DDI_NOT_SUPPORTED, 1024, 768, 15, 60, gpe16Bpp },
1024, 768, 15, 60, // display parameters
0x00006583, 0x0000006F, 0x00003006, // gcfg, tcfg, ocfg
0x00000000, 0x00180000, 0x001FFF00, // fb_start, cb_start, cur_start
0x00040200, 0x00000100, // line delta, buffer size
0x053F03FF, 0x053F03FF, 0x049F0417, 0x049F0417, 0,// horizontal timings
0x032502FF, 0x032502FF, 0x03080302, 0x03080302, 0,// vertical timings
0x27585D7F, // CX5520 = 65.000 MHz
0x37911801, // CX5530 = 65.000 MHz
0x02000002, // CX55xx VCFG initial value
},
{ { DDI_NOT_SUPPORTED, 1024, 768, 15, 70, gpe16Bpp },
1024, 768, 15, 70, // display parameters
0x00006583, 0x0000006F, 0x00003006, // gcfg, tcfg, ocfg
0x00000000, 0x00180000, 0x001FFF00, // fb_start, cb_start, cur_start
0x00040200, 0x00000100, // line delta, buffer size
0x052F03FF, 0x052F03FF, 0x049F0417, 0x049F0417, 0,// horizontal timings
0x032502FF, 0x032502FF, 0x03080302, 0x03080302, 0,// vertical timings
0x270885FF, // CX5520 = 75.000 MHz
0x37E22801, // CX5530 = 75.000 MHz
0x02000002, // CX55xx VCFG initial value
},
{ { DDI_NOT_SUPPORTED, 1024, 768, 15, 75, gpe16Bpp },
1024, 768, 15, 75, // display parameters
0x00006583, 0x0000006F, 0x00003006, // gcfg, tcfg, ocfg
0x00000000, 0x00180000, 0x001FFF00, // fb_start, cb_start, cur_start
0x00040200, 0x00000100, // line delta, buffer size
0x051F03FF, 0x051F03FF, 0x046F040F, 0x046F040F, 1,// horizontal timings
0x031F02FF, 0x031F02FF, 0x03030300, 0x03030300, 1,// vertical timings
0x27915BFF, // CX5520 = 78.750 MHz
0x27915801, // CX5530 = 78.750 MHz
0x02000002, // CX55xx VCFG initial value
},
{ { DDI_1024x768x16x60, 1024, 768, 16, 60, gpe16Bpp },
1024, 768, 16, 60, // display parameters
0x00006583, 0x0000006F, 0x00003004, // gcfg, tcfg, ocfg
0x00000000, 0x00180000, 0x001FFF00, // fb_start, cb_start, cur_start
0x00040200, 0x00000100, // line delta, buffer size
0x053F03FF, 0x053F03FF, 0x049F0417, 0x049F0417, 0,// horizontal timings
0x032502FF, 0x032502FF, 0x03080302, 0x03080302, 0,// vertical timings
0x27585D7F, // CX5520 = 65.000 MHz
0x37911801, // CX5530 = 65.000 MHz
0x02000002, // CX55xx VCFG initial value
},
{ { DDI_1024x768x16x70, 1024, 768, 16, 70, gpe16Bpp },
1024, 768, 16, 70, // display parameters
0x00006583, 0x0000006F, 0x00003004, // gcfg, tcfg, ocfg
0x00000000, 0x00180000, 0x001FFF00, // fb_start, cb_start, cur_start
0x00040200, 0x00000100, // line delta, buffer size
0x052F03FF, 0x052F03FF, 0x049F0417, 0x049F0417, 0,// horizontal timings
0x032502FF, 0x032502FF, 0x03080302, 0x03080302, 0,// vertical timings
0x270885FF, // CX5520 = 75.000 MHz
0x37E22801, // CX5530 = 75.000 MHz
0x02000002, // CX55xx VCFG initial value
},
{ { DDI_1024x768x16x75, 1024, 768, 16, 75, gpe16Bpp },
1024, 768, 16, 75, // display parameters
0x00006583, 0x0000006F, 0x00003004, // gcfg, tcfg, ocfg
0x00000000, 0x00180000, 0x001FFF00, // fb_start, cb_start, cur_start
0x00040200, 0x00000100, // line delta, buffer size
0x051F03FF, 0x051F03FF, 0x046F040F, 0x046F040F, 1,// horizontal timings
0x031F02FF, 0x031F02FF, 0x03030300, 0x03030300, 1,// vertical timings
0x27915BFF, // CX5520 = 78.750 MHz
0x27915801, // CX5530 = 78.750 MHz
0x02000002, // CX55xx VCFG initial value
},
{ { DDI_1024x768x16x85, 1024, 768, 16, 85, gpe16Bpp },
1024, 768, 16, 85, // display parameters
0x00006583, 0x0000006F, 0x00003004, // gcfg, tcfg, ocfg
0x00000000, 0x00180000, 0x001B0000, // fb_start, cb_start, cur_start
0x00040200, 0x00000100, // line delta, buffer size
0x055F03FF, 0x055F03FF, 0x048F042F, 0x048F042F, 1,// horizontal timings
0x032702FF, 0x032702FF, 0x03030300, 0x03030300, 1,// vertical timings
0x27915BFF, // CX5520 = 78.750 MHz
0x27EC4802, // CX5530 = 78.750 MHz
0x02000002, // CX55xx VCFG initial value
},
{ { DDI_1280x1024x8x60, 1280, 1024, 8, 60, gpe8Bpp },
1280, 1024, 8, 60, // display parameters
0x00006583, 0x0000006F, 0x00003005, // gcfg, tcfg, ocfg
0x00000000, 0x00000500, 0x001FFF00, // fb_start, cb_start, cur_start
0x00200200, 0x000000A0, // line delta, buffer size
0x069F04FF, 0x06970507, 0x05BF053F, 0x05BF053F, 1,// horizontal timings
0x042903FF, 0x042903FF, 0x04030400, 0x04030400, 1,// vertical timings
0x2710CAFF, // CX5520 = 108.00 MHz
0x2710C805, // CX5530 = 108.00 MHz
0x02000002, // CX55xx VCFG initial value
},
{ { DDI_1280x1024x8x75, 1280, 1024, 8, 75, gpe8Bpp },
1280, 1024, 8, 75, // display parameters
0x00006583, 0x0000006F, 0x00003005, // gcfg, tcfg, ocfg
0x00000000, 0x00000500, 0x001FFF00, // fb_start, cb_start, cur_start
0x00200200, 0x000000A0, // line delta, buffer size
0x069704FF, 0x069704FF, 0x059F050F, 0x059F050F, 1,// horizontal timings
0x042903FF, 0x042903FF, 0x04030400, 0x04030400, 1,// vertical timings
0x2FE22DFF, // CX5520 = 135.00 MHz
0x27316803, // CX5530 = 135.00 MHz
0x02000002, // CX55xx VCFG initial value
},
#ifdef DD_SUPPORT
#ifdef FB16BPP
{ { DDI_TV_NTSC, 640, 480, 16, 60, gpe16Bpp },
640, 480, 16, 60, // display parameters
0x00006543, 0x0000006F, 0x00003004, // gcfg, tcfg, ocfg
0x00000000, 0x00000500, 0x001FFF00, // fb_start, cb_start, cur_start
0x00200200, 0x000082A0, // line delta, buffer size
0x0317827F, 0x0317827F, 0x02EF828F, 0x02EF828F, 1,// horizontal timings
0x020C81DF, 0x020C81DF, 0x01EB81E9, 0x01EB81E9, 1,// vertical timings
0x37058AFF, // CX5520 = 50.350 MHz
0x23088801, // CX5530 = 50.350 MHz
0x02000002, // CX55xx VCFG initial value
// 0x00001001, // Dhruva Miscellaneous register value
// 0x0010170C, // Dhruva PLL clock register value
},
#else
{ { DDI_TV_NTSC, 640, 480, 8, 60, gpe8Bpp },
640, 480, 8, 60, // display parameters
0x00006543, 0x0000006F, 0x00003005, // gcfg, tcfg, ocfg
0x00000000, 0x00000280, 0x001FFF00, // fb_start, cb_start, cur_start
0x00100100, 0x00000050, // line delta, buffer size
0x031F027F, 0x03170287, 0x02E7028F, 0x02E7028F, 1,// horizontal timings
0x020C01DF, 0x020401E7, 0x01EB01E9, 0x01EB01E9, 1,// vertical timings
0x37058AFF, // CX5520 = 50.350 MHz
0x23088801, // CX5530 = 50.350 MHz
0x02000002, // CX55xx VCFG initial value
// 0x00001001, // Dhruva Miscellaneous register value
// 0x0010170C, // Dhruva PLL clock register value
},
#endif
{ { DDI_TV_PAL, 640, 480, 8, 60, gpe8Bpp },
640, 480, 8, 60, // display parameters
0x00006543, 0x0000006F, 0x00003005, // gcfg, tcfg, ocfg
0x00000000, 0x00000280, 0x001FFF00, // fb_start, cb_start, cur_start
0x00100100, 0x00000050, // line delta, buffer size
0x031F027F, 0x03170287, 0x02E7028F, 0x02E7028F, 1,// horizontal timings
0x020C01DF, 0x020401E7, 0x01EB01E9, 0x01EB01E9, 1,// vertical timings
0x37058AFF, // CX5520 = 50.350 MHz
0x23088801, // CX5530 = 50.350 MHz
0x02000002, // CX55xx VCFG initial value
// 0x00001001, // Dhruva Miscellaneous register value
// 0x0050600C, // Dhruva PLL clock register value
},
#endif //DD_SUPPORT
#else
{ { 5, 640, 480, 8, 60, gpe8Bpp }, // mode#0: 640 x 480 8Bpp 60Hz VESA mode 0x101
640, 480, 8, 60, // display parameters
0x00006543, 0x0000006F, 0x00003005, // gcfg, tcfg, ocfg
0x00000000, 0x00000280, 0x001FFF00, // memory organization
0x00100100, 0x00000050, // line delta, buffer size
0x031F027F, 0x03170287, 0x02E7028F, 0x02E7028F, 1,// horizontal timings
0x020C01DF, 0x020401E7, 0x01EB01E9, 0x01EB01E9, 1,// vertical timings
0x23088801 // CX5530 = 50.350 MHz
},
{ { 1, 640, 480, 16, 60, gpe16Bpp }, // mode#0: 640 x 480 16Bpp 60Hz VESA mode 0x111
640, 480, 16, 60, // display parameters
0x00006543, 0x0000006F, 0x00003004, // gcfg, tcfg, ocfg
0x00000000, 0x00000500, 0x001FFF00, // memory organization
0x00200200, 0x000000A0, // line delta, buffer size
0x031F027F, 0x03170287, 0x02E7028F, 0x02E7028F, 1,// horizontal timings
0x020C01DF, 0x020401E7, 0x01EB01E9, 0x01EB01E9, 1,// vertical timings
0x23088801 // CX5530 = 50.350 MHz
},
// LCD TURNON
//
// Gxvideo.8bpp
// *** Use these settings for CRT ***
{ { 2, 800, 600, 8, 60, gpe8Bpp }, // mode#0: 640 x 480 8Bpp 60Hz VESA mode 0x101
800, 600, 8, 60, // display parameters
0x00006543, 0x0000006F, 0x00003005, // gcfg, tcfg, ocfg
0x00000000, 0x00000320, 0x001FFF00, // memory organization
0x00100100, 0x00000064, // line delta, buffer size
0x041F031F, 0x04170327, 0x03CF0347, 0x03CF0347, 1,// horizontal timings
0x02730257, 0x02730257, 0x025C0258, 0x025C0258, 1,// vertical timings
0x37D8D802 // CX5530 = 80.000 MHz
},
#if 0
// Use these settings for flat panel (TFT) for 800x600
{ { 0, 800, 600, 8, 60, gpe8Bpp }, // mode#0: 640 x 480 8Bpp 60Hz VESA mode 0x101
800, 600, 8, 60, // display parameters
0x00006543, 0x0000006F, 0x00003005, // gcfg, tcfg, ocfg
0x00000000, 0x00000320, 0x001FFF00, // memory organization
0x00100100, 0x00000064, // line delta, buffer size
0x041f6b1f, 0x041f6b1f, 0x03c76b47, 0x03c76b47, 1,// horizontal timings
0x02736a57, 0x02736a57, 0x02666a62, 0x025b6a57, 1,// vertical timings
0x37D8D802 // CX5530 = 80.000 MHz
},
#endif
{ { 3, 800, 600, 16, 60, gpe16Bpp },
800, 600, 16, 60, // display parameters
0x00006543, 0x0000006F, 0x00003004, // gcfg, tcfg, ocfg
0x00000000, 0x00000640, 0x001FFF00, // memory organization
0x00200200, 0x000000C8, // line delta, buffer size
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