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📄 gpevga.cpp

📁 WinCE 3.0 BSP, 包含Inter SA1110, Intel_815E, Advantech_PCM9574 等
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/*
 * $Workfile: GPEVGA.CPP $
 * $Revision: 8 $
 * $Date: 4/07/00 8:50a $
 * $Modtime: 4/07/00 8:37a $
 * $Author: Sarma $
 *
 * Copyright (c) 1998 National Semiconductor Corporation.
 * All Rights Reserved.
 *
 * This software is the confidential and proprietary information of National 
 * Semiconductor Corporation. ("Confidential Information").
 * You shall not disclose such Confidential Information and shall use it only
 * in accordance with the terms of the license agreement you entered into
 * with National Semiconductor Corporation.
 * This code is supplied as is.
 *
 */

/*
 *$Log: /CE/Platform/Nsc/Drivers/Video/gxvideo/base/GPEVGA.CPP $
 * 
 * 8     4/07/00 8:50a Sarma
 * Removed Cyrix Corporation from the legal/confidentail information.
 * 
 * 7     3/29/00 9:32a Sarma
 * Added New structure for TVout numbers in mode setting, The 640x480 and
 * 800x600 for 16 bit are changed as per bSqure driver, do we really need
 * it - jatinder.
 * 
 * 6     9/14/99 11:25a Sarma
 * Use appropraite Horiz/Vert Sync polarity as per the VESA document
 * "Monitor Timing Specifications V1.0 Rev 0.8". Now we have a seperate
 * filed in each resolution data having this information, which will be
 * used in setmode.
 * 
 * 5     8/11/99 4:15p Sarma
 * Added support for 85Hx resoulution for 640x480, 800x600, 1024x768.
 * 1280x1024 dosen't support 85Hz as it is not sable.
 * 
 * 4     11/13/98 11:32a Sarma
 * 85 Hz needs to be removed as its not being supported.
 * 
 * 3     11/12/98 3:46p Sarma
 * Added Confidential copyright to files with VSS keywords for
 * log/history.
 *$History: GPEVGA.CPP $
 * 
 * *****************  Version 8  *****************
 * User: Sarma        Date: 4/07/00    Time: 8:50a
 * Updated in $/CE/Platform/Nsc/Drivers/Video/gxvideo/base
 * Removed Cyrix Corporation from the legal/confidentail information.
 * 
 * *****************  Version 7  *****************
 * User: Sarma        Date: 3/29/00    Time: 9:32a
 * Updated in $/CE/Platform/Nsc/Drivers/Video/gxvideo/base
 * Added New structure for TVout numbers in mode setting, The 640x480 and
 * 800x600 for 16 bit are changed as per bSqure driver, do we really need
 * it - jatinder.
 * 
 * *****************  Version 6  *****************
 * User: Sarma        Date: 9/14/99    Time: 11:25a
 * Updated in $/wince/v2.1/gxvideo
 * Use appropraite Horiz/Vert Sync polarity as per the VESA document
 * "Monitor Timing Specifications V1.0 Rev 0.8". Now we have a seperate
 * filed in each resolution data having this information, which will be
 * used in setmode.
 * 
 * *****************  Version 5  *****************
 * User: Sarma        Date: 8/11/99    Time: 4:15p
 * Updated in $/wince/v2.1/gxvideo
 * Added support for 85Hx resoulution for 640x480, 800x600, 1024x768.
 * 1280x1024 dosen't support 85Hz as it is not sable.
 * 
 * *****************  Version 4  *****************
 * User: Sarma        Date: 11/13/98   Time: 11:32a
 * Updated in $/wince/v2.1/gxvideo
 * 85 Hz needs to be removed as its not being supported.
 * 
 * *****************  Version 3  *****************
 * User: Sarma        Date: 11/12/98   Time: 3:46p
 * Updated in $/wince/v2.1/gxvideo
 * Added Confidential copyright to files with VSS keywords for
 * log/history.
*/


#include "precomp.h"

#define INSTANTIATE_MODE_INIT

DISPLAYMODE DisplayParams[NUMBEROFMODES] = {

#if 1
{ { DDI_NOT_SUPPORTED, 320, 200, 8, 70, gpe8Bpp },
  320, 200, 8, 70,									// display parameters
  0x01006543, 0x0000806F, 0x00003005, 				// gcfg, tcfg, ocfg
  0x00000000, 0x00000140, 0x001FFF00, 				// fb_start, cb_start, cur_start
  0x00100100, 0x00000028, 							// line delta, buffer size
  0x031F027F, 0x03170287, 0x02EF028F, 0x02EF028F, 1,// horizontal timings
  0x01C0018F, 0x01B90196, 0x019D019B, 0x019D019B, 1,// vertical timings
  0x37058AFF, 										// CX5520 = 50.350 MHz
  0x23088801, 										// CX5530 = 50.350 MHz
  0x02000002, 										// CX55xx VCFG initial value
},

{ { DDI_NOT_SUPPORTED, 320, 200, 15, 70, gpe16Bpp },
  320, 200, 15, 70,									// display parameters
  0x01006543, 0x0000806F, 0x00003006, 				// gcfg, tcfg, ocfg
  0x00000000, 0x00000280, 0x001FFF00, 				// fb_start, cb_start, cur_start
  0x00100100, 0x00000050, 							// line delta, buffer size
  0x031F027F, 0x03170287, 0x02EF028F, 0x02EF028F, 1,// horizontal timings
  0x01C0018F, 0x01B90196, 0x019D019B, 0x019D019B, 1,// vertical timings
  0x37058AFF, 										// CX5520 = 50.350 MHz
  0x23088801, 										// CX5530 = 50.350 MHz
  0x02000002, 										// CX55xx VCFG initial value
},

{ { DDI_NOT_SUPPORTED, 320, 200, 16, 70, gpe16Bpp },
  320, 200, 16, 70,									// display parameters
  0x01006543, 0x0000806F, 0x00003004, 				// gcfg, tcfg, ocfg
  0x00000000, 0x00000280, 0x001FFF00, 				// fb_start, cb_start, cur_start
  0x00100100, 0x00000050, 							// line delta, buffer size
  0x031F027F, 0x03170287, 0x02EF028F, 0x02EF028F, 1,// horizontal timings
  0x01C0018F, 0x01B90196, 0x019D019B, 0x019D019B, 1,// vertical timings
  0x37058AFF, 										// CX5520 = 50.350 MHz
  0x23088801, 										// CX5530 = 50.350 MHz
  0x02000002, 										// CX55xx VCFG initial value
},

{ { DDI_NOT_SUPPORTED, 320, 200, 8, 75, gpe8Bpp },
  320, 240, 8, 75,									// display parameters
  0x01006543, 0x0000806F, 0x00003005, 				// gcfg, tcfg, ocfg
  0x00000000, 0x00000140, 0x001FFF00, 				// fb_start, cb_start, cur_start
  0x00100100, 0x00000028, 							// line delta, buffer size
  0x0347027F, 0x0347027F, 0x02CF028F, 0x02CF028F, 1,// horizontal timings
  0x01F301DF, 0x01F301DF, 0x01E301E0, 0x01E301E0, 1,// vertical timings
  0x27444DFF, 										// CX5520 = 63.000 MHz
  0x23EC4801, 										// CX5530 = 63.000 MHz
  0x02000002, 										// CX55xx VCFG initial value
},

{ { DDI_NOT_SUPPORTED, 320, 200, 15, 75, gpe16Bpp },
  320, 240, 15, 75,									// display parameters
  0x01006543, 0x0000806F, 0x00003006, 				// gcfg, tcfg, ocfg
  0x00000000, 0x00000280, 0x001FFF00, 				// fb_start, cb_start, cur_start
  0x00100100, 0x00000050, 							// line delta, buffer size
  0x0347027F, 0x0347027F, 0x02CF028F, 0x02CF028F, 1,// horizontal timings
  0x01F301DF, 0x01F301DF, 0x01E301E0, 0x01E301E0, 1,// vertical timings
  0x27444DFF, 										// CX5520 = 63.000 MHz
  0x23EC4801, 										// CX5530 = 63.000 MHz
  0x02000002, 										// CX55xx VCFG initial value
},

{ { DDI_NOT_SUPPORTED, 320, 200, 16, 70, gpe16Bpp },
  320, 240, 16, 75,									// display parameters
  0x01006543, 0x0000806F, 0x00003004, 				// gcfg, tcfg, ocfg
  0x00000000, 0x00000280, 0x001FFF00, 				// fb_start, cb_start, cur_start
  0x00100100, 0x00000050, 							// line delta, buffer size
  0x0347027F, 0x0347027F, 0x02CF028F, 0x02CF028F, 1,// horizontal timings
  0x01F301DF, 0x01F301DF, 0x01E301E0, 0x01E301E0, 1,// vertical timings
  0x27444DFF, 										// CX5520 = 63.000 MHz
  0x23EC4801, 										// CX5530 = 63.000 MHz
  0x02000002, 										// CX55xx VCFG initial value
},

{ { DDI_NOT_SUPPORTED, 400, 300, 8, 75, gpe8Bpp },
  400, 300, 8, 75,									// display parameters
  0x01006543, 0x0000806F, 0x00003005, 				// gcfg, tcfg, ocfg
  0x00000000, 0x00000190, 0x001FFF00, 				// fb_start, cb_start, cur_start
  0x00100100, 0x00000032, 							// line delta, buffer size
  0x041F031F, 0x041F031F, 0x037F032F, 0x037F032F, 1,// horizontal timings
  0x02700257, 0x02700257, 0x025B0258, 0x025B0258, 1,// vertical timings
  0x27AC6DFF,									    // CX5520 = 99.000 MHz
  0x27AC6803,									    // CX5530 = 99.000 MHz
  0x02000002, 										// CX55xx VCFG initial value
},

{ { DDI_NOT_SUPPORTED, 400, 300, 15, 75, gpe16Bpp },
  400, 300, 15, 75,									// display parameters
  0x01006543, 0x0000806F, 0x00003006, 				// gcfg, tcfg, ocfg
  0x00000000, 0x00000320, 0x001FFF00, 				// fb_start, cb_start, cur_start
  0x00100100, 0x00000064, 							// line delta, buffer size
  0x041F031F, 0x041F031F, 0x037F032F, 0x037F032F, 1,// horizontal timings
  0x02700257, 0x02700257, 0x025B0258, 0x025B0258, 1,// vertical timings
  0x27AC6DFF,									    // CX5520 = 99.000 MHz
  0x27AC6803,									    // CX5530 = 99.000 MHz
  0x02000002, 										// CX55xx VCFG initial value
},

{ { DDI_NOT_SUPPORTED, 400, 300, 16, 75, gpe16Bpp },
  400, 300, 16, 75,									// display parameters
  0x01006543, 0x0000806F, 0x00003004, 				// gcfg, tcfg, ocfg
  0x00000000, 0x00000320, 0x001FFF00, 				// fb_start, cb_start, cur_start
  0x00100100, 0x00000064, 							// line delta, buffer size
  0x041F031F, 0x041F031F, 0x037F032F, 0x037F032F, 1,// horizontal timings
  0x02700257, 0x02700257, 0x025B0258, 0x025B0258, 1,// vertical timings
  0x27AC6DFF,									    // CX5520 = 99.000 MHz
  0x27AC6803,									    // CX5530 = 99.000 MHz
  0x02000002, 										// CX55xx VCFG initial value
},

{ { DDI_NOT_SUPPORTED, 512, 384, 8, 75, gpe8Bpp },
  512, 384, 8, 75,									// display parameters
  0x01006583, 0x0000806F, 0x00003005, 				// gcfg, tcfg, ocfg
  0x00000000, 0x00000200, 0x001FFF00, 				// fb_start, cb_start, cur_start
  0x00100100, 0x00000040, 							// line delta, buffer size
  0x051F03FF, 0x051F03FF, 0x046F040F, 0x046F040F, 1,// horizontal timings
  0x031F02FF, 0x031F02FF, 0x03030300, 0x03030300, 1,// vertical timings
  0x27915BFF,									    // CX5520 = 78.750 MHz
  0x27915801,									    // CX5530 = 78.750 MHz
  0x02000002, 										// CX55xx VCFG initial value
},

{ { DDI_NOT_SUPPORTED, 512, 384, 15, 75, gpe16Bpp },
  512, 384, 15, 75,									// display parameters
  0x01006583, 0x0000806F, 0x00003006, 				// gcfg, tcfg, ocfg
  0x00000000, 0x000C0000, 0x001FFF00, 				// fb_start, cb_start, cur_start
  0x00040100, 0x00000080, 							// line delta, buffer size
  0x051F03FF, 0x051F03FF, 0x046F040F, 0x046F040F, 1,// horizontal timings
  0x031F02FF, 0x031F02FF, 0x03030300, 0x03030300, 1,// vertical timings
  0x27915BFF,									    // CX5520 = 78.750 MHz
  0x27915801,									    // CX5530 = 78.750 MHz
  0x02000002, 										// CX55xx VCFG initial value
},

{ { DDI_NOT_SUPPORTED, 512, 384, 16, 75, gpe16Bpp },
  512, 384, 16, 75,									// display parameters
  0x01006583, 0x0000806F, 0x00003004, 				// gcfg, tcfg, ocfg
  0x00000000, 0x000C0000, 0x001FFF00, 				// fb_start, cb_start, cur_start
  0x00040100, 0x00000080, 							// line delta, buffer size
  0x051F03FF, 0x051F03FF, 0x046F040F, 0x046F040F, 1,// horizontal timings
  0x031F02FF, 0x031F02FF, 0x03030300, 0x03030300, 1,// vertical timings
  0x27915BFF,									    // CX5520 = 78.750 MHz
  0x27915801,									    // CX5530 = 78.750 MHz
  0x02000002, 										// CX55xx VCFG initial value
},

{ { DDI_NOT_SUPPORTED, 640, 400, 8, 70, gpe8Bpp },
  640, 400, 8, 70,									// display parameters
  0x00006543, 0x0000006F, 0x00003005, 				// gcfg, tcfg, ocfg
  0x00000000, 0x00000140, 0x001FFF00, 				// fb_start, cb_start, cur_start
  0x00100100, 0x00000050, 							// line delta, buffer size
  0x031F027F, 0x03170287, 0x02EF028F, 0x02EF028F, 1,// horizontal timings
  0x01C0018F, 0x01B90196, 0x019D019B, 0x019D019B, 1,// vertical timings
  0x37058AFF, 										// CX5520 = 50.350 MHz
  0x23088801, 										// CX5530 = 50.350 MHz
  0x02000002, 										// CX55xx VCFG initial value
},

{ { DDI_NOT_SUPPORTED, 640, 400, 15, 70, gpe16Bpp },
  640, 400, 15, 70,									// display parameters
  0x00006543, 0x0000006F, 0x00003006, 				// gcfg, tcfg, ocfg
  0x00000000, 0x00000280, 0x001FFF00, 				// fb_start, cb_start, cur_start
  0x00200200, 0x000000A0, 							// line delta, buffer size
  0x031F027F, 0x03170287, 0x02EF028F, 0x02EF028F, 1,// horizontal timings
  0x01C0018F, 0x01B90196, 0x019D019B, 0x019D019B, 1,// vertical timings
  0x37058AFF, 										// CX5520 = 50.350 MHz
  0x23088801, 										// CX5530 = 50.350 MHz
  0x02000002, 										// CX55xx VCFG initial value
},

{ { DDI_NOT_SUPPORTED, 640, 400, 16, 70, gpe16Bpp },
  640, 400, 16, 70,									// display parameters
  0x00006543, 0x0000006F, 0x00003004, 				// gcfg, tcfg, ocfg

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