mapx20t.h

WinCE 3.0 BSP, 包含Inter SA1110, Intel_815E, Advantech_PCM9574 等

; -*-Text-*-
;
; $Revision: 1.7 $
;   $Author: kwelton $
;     $Date: 2000/04/02 23:09:36 $
;
;      TITLE("Integrator Firmware Initialization")
;++
;
; Copyright (c) 1998  Microsoft Corporation
; Copyright (c) 1999, 2000 ARM Limited
; All Rights Reserved
;
; Module Name:
;
;    mapx20t.h
;
; Abstract:
;
;   This module contains the OEM memory map for the ARMX20T (X = 7, 9, 10)
;
;--


;
; OEMAddressTable defines the mapping from the 4GB physical address space
; to the kernel's 512MB "un-mapped" spaces.  The kernel will create two ranges
; of virtual addresses from this table. One from 0x80000000 to 0x9FFFFFFF which
; has caching & buffering enabled and one from 0xA0000000 to 0xBFFFFFFF which
; has the cache & buffering disabled.
;
; Each entry in the table consists of the Virtual Base Address to map to,
; the Physical Base Address to map from, and the number of megabytes to map.
;
; The order of the entries is arbitrary, but DRAM should be placed first for
; optimal performance. The table is zero-terminated, so the last entry MUST
; be all zeroes.
;
; XXX
;
; Note that, when the comments above talk about the two ranges of virtual
; addresses, it means that each entry in OEMAddressTable is put into BOTH
; ranges. Yes, I know this is daft, but it's no more than I expect.
;
        INCLUDE platform.s

;
; Note these Windows CE virtual addresses are replicated in board.h for
; use with C and C++.
;
; Remember that bits[31:29] of these entries are ignored by KernelStart(),
; but we keep this file consistent with the defines made in board.h
;

;
; System Flash
;
VA_FLASH_BASE      EQU  0x80000000              ; Flash, 16Mb

;
; Include entries for those devices which are (potentially) used in
; the OAL
;
VA_HDR_BASE     EQU     0xa1000000              ; Header card registers, 1Mb
VA_CT_BASE      EQU     0xa1100000              ; Counter/Timers, 1Mb
VA_IC_BASE      EQU     0xa1200000              ; Interrupt Control, 1Mb
VA_UART0_BASE   EQU     0xa1300000              ; UART 0, 1Mb
VA_UART1_BASE   EQU     0xa1400000              ; UART 1, 1Mb
VA_DBG_BASE     EQU     0xa1500000              ; LEDs and Switches, 1Mb
VA_RTC_BASE     EQU     0xa1600000              ; Real-time clock, 1MB


;
; The various PCI windows. Most windows (the V3 itself, I/O and Config
; windows) are all put into the lower 256Mb of the available 512Mb range.
; The PCI Memory window takes up all of the upper 256Mb, and is defined
; lower down (to keep memory layout at least partially obvious)
;
; NOTE: the way the V3 is programmed means that the Config Window must
; start on a 16Mb boundary!
;
VA_PCI_V3_BASE  EQU     0xa1800000              ; V3 PCI Controller, 1Mb
;
;       0x?1900000 -> 0x?1ffffff unused
;
VA_PCI_IO_BASE  EQU     0xa2000000              ; PCI I/O Window, 16Mb
VA_PCI_CFG_BASE EQU     0xa3000000              ; PCI Config Window, 16Mb

;
;       0x?4100000 -> 0x?7ffffff unused
;
; TODO - VA_SC_BASE couldn't go to 0xa1700000
VA_SC_BASE      EQU     0xa4000000              ; System controller regs, 1MB

;
; Allow space for the RAM to grow up 128Mb. NOTE, however, that we
; can only declare RAM for the minimum amount of memory possible in
; a system, 'cause the kernel uses the very top of RAM for its own
; structures
;
VA_RAM_BASE     EQU     0x88000000

;
; The PCI Memory Window
;
VA_PCI_MEM_BASE EQU     0xb0000000              ; PCI Memory Window, 256Mb

; **********************************************************************

    EXPORT      OEMAddressTable[DATA]

OEMAddressTable
    ;;;-------------------------------------------------------------
    ;;; Virt Addr         Phys Addr               MB
    ;;;-------------------------------------------------------------
    DCD VA_RAM_BASE,      0x00000000,             32
    DCD VA_FLASH_BASE,    FLASH_BASE,             16

    DCD VA_HDR_BASE,      INTEGRATOR_HDR_BASE,     1
    DCD VA_CT_BASE,       INTEGRATOR_CT_BASE,      1
    DCD VA_IC_BASE,       INTEGRATOR_IC_BASE,      1
    DCD VA_UART0_BASE,    INTEGRATOR_UART0_BASE,   1
    DCD VA_UART1_BASE,    INTEGRATOR_UART1_BASE,   1
    DCD VA_DBG_BASE,      INTEGRATOR_DBG_BASE,     1
    DCD VA_RTC_BASE,      INTEGRATOR_RTC_BASE,     1

    DCD VA_PCI_V3_BASE,   PHYS_PCI_V3_BASE,        1
    DCD VA_PCI_IO_BASE,   PHYS_PCI_IO_BASE,       16
    DCD VA_PCI_CFG_BASE,  PHYS_PCI_CONFIG_BASE,   16

    DCD VA_SC_BASE,       INTEGRATOR_SC_BASE,      1

    DCD VA_PCI_MEM_BASE,  PHYS_PCI_MEM_BASE,     256
;
; End of Table (MUST BE ZERO!)
;
    DCD 0,                0,                     0

    END

; EOF mapx20t.h