disasm.c

来自「WinCE 3.0 BSP, 包含Inter SA1110, Intel_815」· C语言 代码 · 共 738 行 · 第 1/2 页

   {0},
   {HEX_0, HEX_0, HEX_1, HEX_B}},
  {"STC",
   {A_SR, A_REG_N},
   {HEX_0, REG_N, HEX_0, HEX_2}},
  {"STC",
   {A_GBR, A_REG_N},
   {HEX_0, REG_N, HEX_1, HEX_2}},
  {"STC",
   {A_VBR, A_REG_N},
   {HEX_0, REG_N, HEX_2, HEX_2}},
  {"STC",
   {A_SSR, A_REG_N},
   {HEX_0, REG_N, HEX_3, HEX_2}},
  {"STC",
   {A_SPC, A_REG_N},
   {HEX_0, REG_N, HEX_4, HEX_2}},
  {"STC",
   {A_REG_B, A_REG_N},
   {HEX_0, REG_N, REG_B, HEX_2}},
  {"STC.L",
   {A_SR, A_DEC_N},
   {HEX_4, REG_N, HEX_0, HEX_3}},
  {"STC.L",
   {A_GBR, A_DEC_N},
   {HEX_4, REG_N, HEX_1, HEX_3}},
  {"STC.L",
   {A_VBR, A_DEC_N},
   {HEX_4, REG_N, HEX_2, HEX_3}},
  {"STC.L",
   {A_SSR, A_DEC_N},
   {HEX_4, REG_N, HEX_3, HEX_3}},
  {"STC.L",
   {A_SPC, A_DEC_N},
   {HEX_4, REG_N, HEX_4, HEX_3}},
  {"STC.L",
   {A_REG_B, A_DEC_N},
   {HEX_4, REG_N, REG_B, HEX_3}},
  {"STS",
   {A_MACH, A_REG_N},
   {HEX_0, REG_N, HEX_0, HEX_A}},
  {"STS",
   {A_MACL, A_REG_N},
   {HEX_0, REG_N, HEX_1, HEX_A}},
  {"STS",
   {A_PR, A_REG_N},
   {HEX_0, REG_N, HEX_2, HEX_A}},
  {"STS.L",
   {A_MACH, A_DEC_N},
   {HEX_4, REG_N, HEX_0, HEX_2}},
  {"STS.L",
   {A_MACL, A_DEC_N},
   {HEX_4, REG_N, HEX_1, HEX_2}},
  {"STS.L",
   {A_PR, A_DEC_N},
   {HEX_4, REG_N, HEX_2, HEX_2}},
  {"SUB",
   {A_REG_M, A_REG_N},
   {HEX_3, REG_N, REG_M, HEX_8}},
  {"SUBC",
   {A_REG_M, A_REG_N},
   {HEX_3, REG_N, REG_M, HEX_A}},
  {"SUBV",
   {A_REG_M, A_REG_N},
   {HEX_3, REG_N, REG_M, HEX_B}},
  {"SWAP.B",
   {A_REG_M, A_REG_N},
   {HEX_6, REG_N, REG_M, HEX_8}},
  {"SWAP.W",
   {A_REG_M, A_REG_N},
   {HEX_6, REG_N, REG_M, HEX_9}},
  {"TAS.B",
   {A_IND_N},
   {HEX_4, REG_N, HEX_1, HEX_B}},
  {"TRAPA",
   {A_IMM},
   {HEX_C, HEX_3, IMM_8}},
  {"TST",
   {A_IMM, A_R0},
   {HEX_C, HEX_8, IMM_8}},
  {"TST",
   {A_REG_M, A_REG_N},
   {HEX_2, REG_N, REG_M, HEX_8}},
  {"TST.B",
   {A_IMM, A_R0_GBR},
   {HEX_C, HEX_C, IMM_8}},
  {"XOR",
   {A_IMM, A_R0},
   {HEX_C, HEX_A, IMM_8}},
  {"XOR",
   {A_REG_M, A_REG_N},
   {HEX_2, REG_N, REG_M, HEX_A}},
  {"XOR.B",
   {A_IMM, A_R0_GBR},
   {HEX_C, HEX_E, IMM_8}},
  {"XTRCT",
   {A_REG_M, A_REG_N},
   {HEX_2, REG_N, REG_M, HEX_D}},
  {"MUL.L",
   {A_REG_M, A_REG_N},
   {HEX_0, REG_N, REG_M, HEX_7}},
  {"DT",
   {A_REG_N},
   {HEX_4, REG_N, HEX_1, HEX_0}},
  {"DMULS.L",
   {A_REG_M, A_REG_N},
   {HEX_3, REG_N, REG_M, HEX_D}},
  {"DMULU.L",
   {A_REG_M, A_REG_N},
   {HEX_3, REG_N, REG_M, HEX_5}},
  {"MAC.L",
   {A_INC_M, A_INC_N},
   {HEX_0, REG_N, REG_M, HEX_F}},
  {"BRAF",
   {A_REG_N},
   {HEX_0, REG_N, HEX_2, HEX_3}},
  {"BSRF",
   {A_REG_N},
   {HEX_0, REG_N, HEX_0, HEX_3}},

  {0}};









ADDR
Disasm (ADDR address, unsigned char *data, int pad)
{
  ADDR fetch_addr = 0;
  int fetch_size = 0;
  unsigned char nibs[4];

  int dword = *(short *) (data);
  int relmask = ~0;
  sh_opcode_info const *op;

#if 0
#if SH!=3
  int low = 1;
  int high = 0;
#else
  int low = 0;
  int high = 1;
#endif
#endif

	int low = 0;
	int high = 1;

  nibs[0] = (dword >> 12) & 0xf;
  nibs[1] = (dword >> 8) & 0xf;
  nibs[2] = (dword >> 4) & 0xf;
  nibs[3] = (dword >> 0) & 0xf;

  if (pad)
    printf ("%x " F_B F_B "  ", address, data[high], data[low]);

  for (op = sh_table; op->name; op++)
    {
      int n;
      int imm = 0;
      int rn = 0;
      int rm = 0;
      int rb = 0;
      for (n = 0; n < 4; n++)
	{
	  int i = op->nibbles[n];
	  if (i < 16)
	    {
	      if (nibs[n] == i)
		continue;
	      goto fail;
	    }
	  switch (i)
	    {
	    case BRANCH_8:
	      imm = (nibs[2] << 4) | (nibs[3]);
	      if (imm & 0x80)
		imm |= ~0xff;
	      imm = ((char) imm) * 2 + 4;
	      goto ok;

	    case BRANCH_12:
	      imm = ((nibs[1]) << 8) | (nibs[2] << 4) | (nibs[3]);
	      if (imm & 0x800)
		imm |= ~0xfff;
	      imm = imm * 2 + 4;
	      goto ok;
	    case IMM_4:
	      imm = nibs[3];
	      goto ok;
	    case IMM_4BY2:
	      imm = nibs[3] << 1;
	      goto ok;
	    case IMM_4BY4:
	      imm = nibs[3] << 2;
	      goto ok;
	    case IMM_8:
	      imm = (nibs[2] << 4) | nibs[3];
	      goto ok;
	    case PCRELIMM_8BY2:
	      imm = ((nibs[2] << 4) | nibs[3]) << 1;
	      fetch_size = 2;
	      relmask = ~1;
	      goto ok;
	    case PCRELIMM_8BY4:
	      imm = ((nibs[2] << 4) | nibs[3]) << 2;
	      fetch_size = 4;
	      relmask = ~3;
	      goto ok;

	    case IMM_8BY2:
	      imm = ((nibs[2] << 4) | nibs[3]) << 1;
	      goto ok;
	    case IMM_8BY4:
	      imm = ((nibs[2] << 4) | nibs[3]) << 2;
	      goto ok;
	    case DISP_8:
	      imm = (nibs[2] << 4) | (nibs[3]);
	      goto ok;
	    case DISP_4:
	      imm = nibs[3];
	      goto ok;
	    case REG_N:
	      rn = nibs[n];
	      break;
	    case REG_M:
	      rm = nibs[n];
	      break;
	    case REG_B:
	      rb = nibs[n] & 0x7;
	      break;
	    default:
	      ;
	    }

	}
    ok:
      printf ("\t%s\t", op->name);
      for (n = 0; n < 2 && op->arg[n] != A_END; n++)
	{
	  if (n && op->arg[1] != A_END)
	    printf (",");
	  switch (op->arg[n])
	    {
	    case A_IMM:
	      printf ("#%x", (char) (imm));
	      break;
	    case A_R0:
	      printf ("R0");
	      break;
	    case A_REG_N:
	      printf ("R%d", rn);
	      break;
	    case A_INC_N:
	      printf ("@R%d+", rn);
	      break;
	    case A_DEC_N:
	      printf ("@-R%d", rn);
	      break;
	    case A_IND_N:
	      printf ("@R%d", rn);
	      break;
	    case A_DISP_REG_N:
	      printf ("@(%x,R%d)", imm, rn);
	      break;
	    case A_REG_M:
	      printf ("R%d", rm);
	      break;
	    case A_INC_M:
	      printf ("@R%d+", rm);
	      break;
	    case A_REG_B:
	      printf ("R%d_BANK", rb & 0x7);
	      break;
	    case A_DEC_M:
	      printf ("@-R%d", rm);
	      break;
	    case A_IND_M:
	      printf ("@R%d", rm);
	      break;
	    case A_DISP_REG_M:
	      printf ("@(%d,R%d)", imm, rm);
	      break;
	    case A_DISP_PC:
	      printf ("@(%X,PC)", imm);
	      fetch_addr = (ADDR) (((SIZE_T) address & relmask) + imm + 4);
	      break;
	    case A_IND_R0_REG_N:
	      printf ("@(R0,R%d)", rn);
	      break;
	    case A_IND_R0_REG_M:
	      printf ("@(R0,R%d)", rm);
	      break;
	    case A_DISP_GBR:
	      printf ("@(%d,GBR)", imm);
	      break;
	    case A_R0_GBR:
	      printf ("@(R0,GBR)");
	      break;
	    case A_BDISP12:
	    case A_BDISP8:
	      printf ("%x", imm + address);
	      break;
	    case A_SR:
	      printf ("SR");
	      break;
	    case A_SPC:
	      printf ("SPC");
	      break;
	    case A_SSR:
	      printf ("SSR");
	      break;
	    case A_GBR:
	      printf ("GBR");
	      break;
	    case A_VBR:
	      printf ("VBR");
	      break;
	    case A_MACH:
	      printf ("MACH");
	      break;
	    case A_MACL:
	      printf ("MACL");
	      break;
	    case A_PR:
	      printf ("PR");
	      break;
	    default:
	      ;
	    }

	}

      if (fetch_size == 2)
	{
	  short int val;
	  memcpy (&val, fetch_addr, 2);
	  printf ("\t!%x:%H", fetch_addr, val);
	}
      if (fetch_size == 4)
	{
	  unsigned long val;
	  memcpy (&val, fetch_addr, 4);
	  printf ("\t!%x:%X", fetch_addr, val);
	}
      printf ("\n");
      return address + 2;
    fail:
      ;

    }
  printf ("\t.WORD " F_B F_B "\n", data[high], data[low]);
  return address + 2;
}

void
disatpc ()
{
  Disasm (get_pc (), (char *) get_pc (), 1);
}

int get_pc(void) {}