bigsur.inc

来自「WinCE 3.0 BSP, 包含Inter SA1110, Intel_815」· INC 代码 · 共 74 行

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;/******************************************************************************
; * File:		  bigsur.inc
; * Author:		  Naresh Gupta (nkgupta@hotmail.com)
; * Date:		  Tuesday July 10, 2000
; * Organization: Hitachi Semiconductor America Inc.
; * Purpose:	  Will contain all definitions specific to bigsur
; *
; * Copyright (C) 2000 Hitachi Semiconductor America Inc.
; ******************************************************************************/


;/******************************************************************************
; * Important Note:-
; * ===============
; *
; *   To properly view this file, you need to set tabstop=4 in your editor
; *****************************************************************************/

;// Base address of FPGA
FPGA_BASE					.equ		h'B0000000

;// LED Address
ALPHA_LED       			.equ		(FPGA_BASE + h'01FFFE00 + h'000000E0)
LED_ALPHA					.equ		ALPHA_LED

HD64465_BASE	   		 	.equ		FPGA_BASE  ;// HD64465
HD64464_BASE				.equ		FPGA_BASE  ;// HD64464 if present.
HD64463_BASE				.equ		FPGA_BASE  ;// Though no 463 present. No harm.

;// Common RAM area.: Driver Globals
DRAM_BASE					.equ		0x8C000000  ;// RAM
DRV_GLOBAL_OFFSET			.equ		0x00150000  ;// Driver Globals
DRV_GLOBAL_BASE				.equ		(DRAM_BASE + DRV_GLOBAL_OFFSET)

;// Value of TRUE/NULL
TRUE						.equ	1
NULL						.equ	0

;/************************** FPGA Interrupt Mask and Status Register **********/
INT_STAT0					.equ		(FPGA_BASE + h'01FDFA00)
INT_STAT1					.equ 		(FPGA_BASE + h'01FDF900)
INT_STAT2					.equ 		(FPGA_BASE + h'01FDF800)
INT_STAT3					.equ 		(FPGA_BASE + h'01FDF700)

INT_IMASK0					.equ 		(FPGA_BASE + h'01FDF600)
INT_IMASK1					.equ 		(FPGA_BASE + h'01FDF500)
INT_IMASK2					.equ 		(FPGA_BASE + h'01FDF400)
INT_IMASK3					.equ 		(FPGA_BASE + h'01FDF300)

FPGA_IMASK_AUTOINT			.equ h'01		

FPGA_IMASK_B4_INT			.equ h'01		
FPGA_IMASK_SH7751_INTA		.equ h'02		
FPGA_IMASK_A_INTA			.equ h'04		
FPGA_IMASK_A_INTB			.equ h'08		
FPGA_IMASK_A_INTC			.equ h'10		
FPGA_IMASK_A_INTD			.equ h'20		
FPGA_IMASK_IDE_INT			.equ h'40		
FPGA_IMASK_DBG_INT			.equ h'80		
FPGA_IMASK_INTP				.equ h'01		
FPGA_IMASK_INTS				.equ h'02		
FPGA_IMASK_INTA				.equ h'04		
FPGA_IMASK_INTB				.equ h'08		
FPGA_IMASK_INTC				.equ h'10		
FPGA_IMASK_INTD				.equ h'20		
FPGA_IMASK_DEG				.equ h'40		
FPGA_IMASK_ENUM				.equ h'80		

FPGA_IMASK_USC_INT			.equ h'01		
FPGA_IMASK_U465				.equ h'02		
FPGA_IMASK_U464				.equ h'04		
FPGA_IMASK_ENETINT			.equ h'08		

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