uart.h

来自「WinCE 3.0 BSP, 包含Inter SA1110, Intel_815」· C头文件 代码 · 共 204 行

/*++
THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
PARTICULAR PURPOSE.
Copyright (c) 1995-1998  Microsoft Corporation

Module Name:

   uart.h

Abstract:

    header file for uart functions

Notes:


--*/


#ifndef _UART_H_
#define _UART_H_

//
// Define serial port registers offset
//

#define RECEIVE_BUFFER      0x0     /* R DLAB=0 */
#define TRANSMIT_BUFFER     0x0     /* W DLAB=0 */
#define DIVISOR_LSB         0x0     /* R/W DLAB=1 */
#define INTERRUPT_ENABLE    0x1     /* R/W DLAB=0 */
#define DIVISOR_MSB         0x1     /* R/W DLAB=1 */
#define INTERRUPT_ID        0x2     /* R */
#define FIFO_CONTROL        0x2     /* W */
#define LINE_CONTROL        0x3     /* R/W */
#define MODEM_CONTROL       0x4     /* R/W */
#define LINE_STATUS         0x5     /* R/W */
#define MODEM_STATUS        0x6     /* R/W */
#define SCRATCH_PAD         0x7     /* R/W */

/*
** Define serial port interrupt enable register structure.
*/

typedef union _SP_INTERRUPT_ENABLE {
    struct {
        UCHAR ReceiveEnable : 1;
        UCHAR TransmitEnable : 1;
        UCHAR LineStatusEnable : 1;
        UCHAR ModemStatusEnable : 1;
        UCHAR Reserved1 : 4;
    };
    UCHAR Reg;
} SP_INTERRUPT_ENABLE, *PSP_INTERRUPT_ENABLE;

/*
** Define serial port interrupt id register structure.
*/

typedef union _SP_INTERRUPT_ID {
    struct {
        UCHAR InterruptPending : 1;
        UCHAR Identification : 3;
        UCHAR Reserved1 : 2;
        UCHAR FifoEnabled : 2;
    };
    UCHAR Reg;
} SP_INTERRUPT_ID, *PSP_INTERRUPT_ID;

/*
** Define serial port fifo control register structure.
*/

typedef union _SP_FIFO_CONTROL {
    struct {
        UCHAR FifoEnable : 1;
        UCHAR ReceiveFifoReset : 1;
        UCHAR TransmitFifoReset : 1;
        UCHAR DmaModeSelect : 1;
        UCHAR Reserved1 : 2;
        UCHAR ReceiveFifoLevel : 2;
    };
    UCHAR Reg;
} SP_FIFO_CONTROL, *PSP_FIFO_CONTROL;

/*
** Define serial port line control register structure.
*/

typedef union _SP_LINE_CONTROL {
    struct {
        UCHAR CharacterSize : 2;
        UCHAR StopBits : 1;
        UCHAR ParityEnable : 1;
        UCHAR EvenParity : 1;
        UCHAR StickParity : 1;
        UCHAR SetBreak : 1;
        UCHAR DivisorLatch : 1;
    };
    UCHAR Reg;
} SP_LINE_CONTROL, *PSP_LINE_CONTROL;

/*
** Define serial port modem control register structure.
*/

typedef union _SP_MODEM_CONTROL {
    struct {
        UCHAR DataTerminalReady : 1;
        UCHAR RequestToSend : 1;
        UCHAR Reserved1 : 1;
        UCHAR Interrupt : 1;
        UCHAR loopBack : 1;
        UCHAR Reserved2 : 3;
    };
    UCHAR Reg;
} SP_MODEM_CONTROL, *PSP_MODEM_CONTROL;

/*
** Define serial port line status register structure.
*/

typedef union _SP_LINE_STATUS {
    struct {
        UCHAR DataReady : 1;
        UCHAR OverrunError : 1;
        UCHAR ParityError : 1;
        UCHAR FramingError : 1;
        UCHAR BreakIndicator : 1;
        UCHAR TransmitHoldingEmpty : 1;
        UCHAR TransmitEmpty : 1;
        UCHAR ReceiveFifoError : 1;
    };
    UCHAR Reg;
} SP_LINE_STATUS, *PSP_LINE_STATUS;

/*
** Define serial port modem status register structure.
*/

typedef union _SP_MODEM_STATUS {
    struct {
        UCHAR DeltaClearToSend : 1;
        UCHAR DeltaDataSetReady : 1;
        UCHAR TrailingRingIndicator : 1;
        UCHAR DeltaReceiveDetect : 1;
        UCHAR ClearToSend : 1;
        UCHAR DataSetReady : 1;
        UCHAR RingIndicator : 1;
        UCHAR ReceiveDetect : 1;
    };
    UCHAR Reg;
} SP_MODEM_STATUS, *PSP_MODEM_STATUS;

//
// define parallel port register offsets
//

#define PARALLEL_DATA    0x0
#define PARALLEL_STATUS  0x1
#define PARALLEL_CONTROL 0x2

/*
** Define parallel status register structure.
*/

typedef union _PP_STATUS {
   struct {
      UCHAR Timeout : 1;             /* EPP Mode only */
      UCHAR : 1;
      UCHAR InterruptPending_N : 1;
      UCHAR Error_N : 1;
      UCHAR PrinterSelected : 1;
      UCHAR PaperEnd : 1;
      UCHAR Acknowledge_N : 1;
      UCHAR Busy_N : 1;
   };
   UCHAR Reg;
} PP_STATUS, *PPP_STATUS;

/*
** Define parallel control register structure.
*/

typedef union _PP_CONTROL {
   struct {
      UCHAR Strobe : 1;
      UCHAR AutoFeed: 1;
      UCHAR InitiateOutput : 1;
      UCHAR PrinterSelectInput : 1;
      UCHAR InterruptRequestEnable : 1;
      UCHAR ControlDirection : 1;
      UCHAR : 2;
   };
   UCHAR Reg;
} PP_CONTROL, *PPP_CONTROL;

#define PP_CONTROL_STROBE     0x01
#define PP_CONTROL_AUTOFEED   0x02
#define PP_CONTROL_CONTROLDIR 0x20

#endif /* _UART_H_ */