vector.s

来自「WinCE 3.0 BSP, 包含Inter SA1110, Intel_815」· S 代码 · 共 819 行 · 第 1/2 页

    j       SoftwareInterrupt0          // 0011
    nop

    j       ExternalInterrupt0          // 0100
    nop

    j       ExternalInterrupt0          // 0101
    nop

    j       ExternalInterrupt0          // 0110
    nop

    j       ExternalInterrupt0          // 0111
    nop

    j       ExternalInterrupt1          // 1000
    nop

    j       ExternalInterrupt1          // 1001
    nop

    j       ExternalInterrupt1          // 1010
    nop

    j       ExternalInterrupt1          // 1011
    nop

    j       ExternalInterrupt0          // 1100
    nop

    j       ExternalInterrupt0          // 1101
    nop

    j       ExternalInterrupt0          // 1110
    nop

    j       ExternalInterrupt0          // 1111
    nop

MoreIPChk:

    la      t3,ExtIPTable               // get extended IP table base
    addu    t2,t3,t2

    jalr    t3                          // jump to the IP routine
    nop
    b       ExitOtherException
    nop


ExtIPTable:

    j       SoftwareInterrupt0          // 0000 No interrupt, error
    nop

    j       ExternalInterrupt2          // 0001
    nop

    j       ExternalInterrupt3          // 0010
    nop

    j       ExternalInterrupt2          // 0011
    nop

    j       ExternalInterrupt4          // 0100
    nop

    j       ExternalInterrupt2          // 0101
    nop

    j       ExternalInterrupt3          // 0110
    nop

    j       ExternalInterrupt2          // 0111
    nop

    j       CPUTimerInterrupt           // 1000
    nop

    j       ExternalInterrupt2          // 1001
    nop

    j       ExternalInterrupt3          // 1010
    nop

    j       ExternalInterrupt2          // 1011
    nop

    j       ExternalInterrupt4          // 1100
    nop

    j       ExternalInterrupt2          // 1101
    nop

    j       ExternalInterrupt3          // 1110
    nop

    j       ExternalInterrupt2          // 1111
    nop


    .end    InterruptException


/////////////////////////////////////////////////////////////////
//
// Save additional register
//
// Some registers on save into the stack immediately after
// entering exception. The rest of register can also be saved
// by calling this routine.
//
LEAF_ENTRY(SaveRegisterInstance)

    sw      zero,zeroRegTable(a0)
    sw      s0,s0RegTable(a0)
    sw      s1,s1RegTable(a0)
    sw      s2,s2RegTable(a0)
    sw      s3,s3RegTable(a0)
    sw      s4,s4RegTable(a0)
    sw      s5,s5RegTable(a0)
    sw      s6,s6RegTable(a0)
    sw      s7,s7RegTable(a0)
    sw      s8,s8RegTable(a0)

    //
    //  Store coprocessor1 registers.
    //
    //cfc1    v0,fsr
    //sdc1    f0,f0RegTable(a0)
    //sdc1    f2,f2RegTable(a0)
    //sdc1    f4,f4RegTable(a0)
    //sdc1    f6,f6RegTable(a0)
    //sdc1    f8,f8RegTable(a0)
    //sdc1    f10,f10RegTable(a0)
    //sdc1    f12,f12RegTable(a0)
    //sdc1    f14,f14RegTable(a0)
    //sdc1    f16,f16RegTable(a0)
    //sdc1    f18,f18RegTable(a0)
    //sdc1    f20,f20RegTable(a0)
    //sdc1    f22,f22RegTable(a0)
    //sdc1    f24,f24RegTable(a0)
    //sdc1    f26,f26RegTable(a0)
    //sdc1    f28,f28RegTable(a0)
    //sdc1    f30,f30RegTable(a0)
    //sw      v0,fsrRegTable(a0)

    //
    //  Store cop0 registers.
    //
    mfc0    v1,index
    mfc0    v0,random
    sw      v1,indexRegTable(a0)
    sw      v0,randomRegTable(a0)
    mfc0    v1,entrylo0
    nop
    mfc0    v0,entrylo1
    sw      v1,entrylo0RegTable(a0)
    sw      v0,entrylo1RegTable(a0)
    mfc0    v1,context
    mfc0    v0,pagemask
    sw      v1,contextRegTable(a0)
    sw      v0,pagemaskRegTable(a0)
    mfc0    v1,wired
    mfc0    v0,badvaddr
    sw      v1,wiredRegTable(a0)
    sw      v0,badvaddrRegTable(a0)
    mfc0    v1,count
    mfc0    v0,entryhi
    sw      v1,countRegTable(a0)
    sw      v0,entryhiRegTable(a0)
    mfc0    v1,compare
    mfc0    v0,psr
    sw      v1,compareRegTable(a0)
    sw      v0,psrRegTable(a0)
    mfc0    v1,cause
    mfc0    v0,epc
    sw      v1,causeRegTable(a0)
    sw      v0,epcRegTable(a0)
    mfc0    v1,prid
    mfc0    v0,config
    sw      v1,pridRegTable(a0)
    sw      v0,configRegTable(a0)
    mfc0    v1,lladdr
    mfc0    v0,watchlo
    sw      v1,lladdrRegTable(a0)
    sw      v0,watchloRegTable(a0)
    mfc0    v1,watchhi
    mfc0    v0,ecc
    sw      v1,watchhiRegTable(a0)
    sw      v0,eccRegTable(a0)
    mfc0    v1,cacheerr
    mfc0    v0,taglo
    sw      v1,cacheerrorRegTable(a0)
    sw      v0,tagloRegTable(a0)
    mfc0    v1,taghi
    mfc0    v0,errorepc
    sw      v1,taghiRegTable(a0)
    sw      v0,errorepcRegTable(a0)

    j       ra
    nop

    .end    SaveRegisterInstance

#ifdef BOOT_MONITOR
/////////////////////////////////////////////////////////////////
//
// Firmware monitor entry point
//
// Argument: DWORD* - register table base
//           DWORD  - cause of the entry
//
LEAF_ENTRY(FwMonitor)

    .set    noreorder
    .set    noat

    li      t1,COMMON_EXCEPTION
    beq     t1,a1,ComExceptEntry
    nop

    li      t1,NMI_EXCEPTION
    beq     t1,a1,NMIExceptEntry
    nop

//
// User select entry
//
    sw      sp,(spRegTable-RegisterTableSize)(sp)
    subu    sp,sp,RegisterTableSize

    sw      t1,t1RegTable(sp)
    sw      t2,t2RegTable(sp)
    sw      t3,t3RegTable(sp)
    sw      t4,t4RegTable(sp)
    sw      t5,t5RegTable(sp)
    sw      t6,t6RegTable(sp)
    sw      t7,t7RegTable(sp)
    sw      t8,t8RegTable(sp)
    sw      t9,t9RegTable(sp)
    sw      a0,a0RegTable(sp)
    sw      a1,a1RegTable(sp)
    sw      a2,a2RegTable(sp)
    sw      a3,a3RegTable(sp)
    sw      t0,t0RegTable(sp)
    sw      AT,atRegTable(sp)
    sw      v0,v0RegTable(sp)
    sw      v1,v1RegTable(sp)
    sw      k0,k0RegTable(sp)
    sw      k1,k1RegTable(sp)
    sw      gp,gpRegTable(sp)
    sw      ra,raRegTable(sp)

    move    a0,sp                       // pass regTable base address

    jal     SaveRegisterInstance
    nop

    jal     Monitor
    nop

    lw      ra,raRegTable(sp)

    j       ra
    addu    sp,sp,RegisterTableSize

//
// Common & NMI exception entry
//
NMIExceptEntry:
ComExceptEntry:


    subu    sp,sp,4
    sw      ra,0(sp)                    // Save return address

    jal     Monitor
    nop

    lw      ra,0(sp)                    // Restore return address

    j       ra
    addu    sp,sp,4

    .end    FwMonitor

/////////////////////////////////////////////////////////////////
//
// Firmware monitor entry point
//
// Argument: DWORD* - register table base
//           DWORD  - cause of the entry
//
LEAF_ENTRY(FMonitor)

    .set    noreorder
    .set    noat

    li      t1,COMMON_EXCEPTION
    beq     t1,a1,ComExceptEntry1
    nop

    li      t1,NMI_EXCEPTION
    beq     t1,a1,NMIExceptEntry1
    nop

//
// User select entry
//
    sw      sp,(spRegTable-RegisterTableSize)(sp)
    subu    sp,sp,RegisterTableSize

    sw      t1,t1RegTable(sp)
    sw      t2,t2RegTable(sp)
    sw      t3,t3RegTable(sp)
    sw      t4,t4RegTable(sp)
    sw      t5,t5RegTable(sp)
    sw      t6,t6RegTable(sp)
    sw      t7,t7RegTable(sp)
    sw      t8,t8RegTable(sp)
    sw      t9,t9RegTable(sp)
    sw      a0,a0RegTable(sp)
    sw      a1,a1RegTable(sp)
    sw      a2,a2RegTable(sp)
    sw      a3,a3RegTable(sp)
    sw      t0,t0RegTable(sp)
    sw      AT,atRegTable(sp)
    sw      v0,v0RegTable(sp)
    sw      v1,v1RegTable(sp)
    sw      k0,k0RegTable(sp)
    sw      k1,k1RegTable(sp)
    sw      gp,gpRegTable(sp)
    sw      ra,raRegTable(sp)

    move    a0,sp                       // pass regTable base address

    jal     SaveRegisterInstance
    nop

    jal     DispMem
    nop

    lw      ra,raRegTable(sp)

    j       ra
    addu    sp,sp,RegisterTableSize

//
// Common & NMI exception entry
//
NMIExceptEntry1:
ComExceptEntry1:


    subu    sp,sp,4
    sw      ra,0(sp)                    // Save return address

    jal     DispMem
    nop

    lw      ra,0(sp)                    // Restore return address

    j       ra
    addu    sp,sp,4

    .end    FMonitor

#endif

/////////////////////////////////////////////////////////////////
//
// Increment epc by 4
//
LEAF_ENTRY(AddEPC)

    .set noreorder

    mfc0    t0,epc
    addu    t0,t0,4                 // increment epc by 4
    mtc0    t0,epc

    jr      ra
    nop

    .end    AddEPC


/////////////////////////////////////////////////////////////////
//
// Enable external interrupt
//
LEAF_ENTRY(EnableExtInt)

    mfc0    t0,cause                // get cause register
    li      t1,(1<<CAUSE_IV)
    or      t0,t0,t1                // enable dedicated interrupt vector loc
    mtc0    t0,cause                // store bit back

    mfc0    t0,psr                  // get currrent status register
    or      t0,t0,(1<<(PSR_INTMASK+2)) |(1 << PSR_IE)
    mtc0    t0,psr                  // ext. interrupt is enabled now

    jr      ra
    nop

    .end    EnableExtInt0