intctrl.c

来自「WinCE 3.0 BSP, 包含Inter SA1110, Intel_815」· C语言 代码 · 共 476 行 · 第 1/2 页

/*++
THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
PARTICULAR PURPOSE.
Copyright (c) 1995, 1996, 1997  Microsoft Corporation

Module Name:

   intctrl.c

Abstract:

   This interrupt control constants and functions.

Notes:

--*/


#include <windows.h>
#include <nkintr.h>
#include <altoona.h>
#include <hal.h>
#include <oalio.h>
#include <oalintr.h>
#include <wdmhal.h>
#include "ethernet.h"
#include <eglobal.h>

/*
** Interrupt control default value
*/

ULONG DefIControlLow = 

   INT_LEVEL_NMI << INTCTRLL_CPCEPRI    |  1 << INTCTRLL_CPCEEN  |
   INT_LEVEL_NMI << INTCTRLL_CNTDPRTI   |  1 << INTCTRLL_CNTDEN  |
   INT_LEVEL_NMI << INTCTRLL_MCEPRI     |  1 << INTCTRLL_MCEEN   |
   INT_LEVEL0    << INTCTRLL_DMAPRI     |  0 << INTCTRLL_DMAEN   |
   INT_LEVEL0    << INTCTRLL_UARTPRI    |  0 << INTCTRLL_UARTEN  |
   INT_LEVEL_NMI << INTCTRLL_WDOGPRI    |  1 << INTCTRLL_WDOGEN  |
   INT_LEVEL4    << INTCTRLL_GPTPRI     |  1 << INTCTRLL_GPTEN   |
   INT_LEVEL_NMI << INTCTRLL_LBRTDPRI   |  1 << INTCTRLL_LBRTDEN;

ULONG DefIControlHigh = 

   INT_LEVEL3    << INTCTRLH_INTAPRI    |  0 << INTCTRLH_INTAEN  |	
   INT_LEVEL2    << INTCTRLH_INTBPRI    |  0 << INTCTRLH_INTBEN  |// DEC21140
   INT_LEVEL1    << INTCTRLH_INTCPRI    |  1 << INTCTRLH_INTCEN  |// From 1543
   INT_LEVEL0    << INTCTRLH_INTDPRI    |  0 << INTCTRLH_INTDEN  |
   INT_LEVEL_NMI << INTCTRLH_PCISPRI    |  1 << INTCTRLH_PCISEN  |
   INT_LEVEL_NMI << INTCTRLH_PCIEPRI    |  1 << INTCTRLH_PCIEEN;


ULONG DefIPolarityLow =

   ACTIVE_LOW  << INTPPESL_INTAPOL     |  LEVEL_SENSITIVE << INTPPESL_INTAEDGE |
   ACTIVE_LOW  << INTPPESL_INTBPOL     |  LEVEL_SENSITIVE << INTPPESL_INTBEDGE |
   ACTIVE_HIGH  << INTPPESL_INTCPOL    |  LEVEL_SENSITIVE << INTPPESL_INTCEDGE |
   ACTIVE_LOW  << INTPPESL_INTDPOL     |  LEVEL_SENSITIVE << INTPPESL_INTDEDGE;
  

#define IoPortBase  ((PUCHAR)(PHYS_ADDR_IO_SPACE_BASE | KSEG1_BASE))

extern ULONG Intr0ISR(void);
extern ULONG Intr1ISR(void);
extern ULONG Intr2ISR(void);
extern ULONG Intr3ISR(void);
extern ULONG Intr4ISR(void);


void InitPCISlotInts(void);

/*
** Initialize hardware interrrupt system
*/
VOID InitInterrupts()
{

    ULONG nCnt = 0;
    UCHAR nFilledSlots = 0;

    // Initialize interrupt to/from system interrupt mapping arrays.
    for(nCnt = 0 ; nCnt < ALNINTR_MAX ; nCnt++)
        IMAP_Aln2Sys[nCnt] = SYSINTR_NOP;

    for(nCnt = 0 ; nCnt < SYSINTR_MAX ; nCnt++)
        IMAP_Sys2Aln[nCnt] = ALNINTR_NULL;

    // Set up static interrupt vector to sysintr mappings...

    // The ALI 1543 uses INTC for ISA interrupts.
    IMAP_Aln2Sys[ALNINTR_PCI_INTC] = SYSINTR_ISA_GROUP;    // Special...


    // PS/2 Keyboard:
    IMAP_Aln2Sys[ALNINTR_IRQ1] = SYSINTR_KEYBOARD;
    IMAP_Sys2Aln[SYSINTR_KEYBOARD] = ALNINTR_IRQ1;

    // PS/2 Mouse:
    IMAP_Aln2Sys[ALNINTR_IRQ12] = SYSINTR_MOUSE;
    IMAP_Sys2Aln[SYSINTR_MOUSE] = ALNINTR_IRQ12;

    // Serial 1:
    IMAP_Aln2Sys[ALNINTR_IRQ4] = SYSINTR_SERIAL1;
    IMAP_Sys2Aln[SYSINTR_SERIAL1] = ALNINTR_IRQ4;

    // IDE:
    IMAP_Aln2Sys[ALNINTR_IRQ14] = SYSINTR_IDE;
    IMAP_Sys2Aln[SYSINTR_IDE] = ALNINTR_IRQ14;

    // USB (OHCI):
    IMAP_Aln2Sys[ALNINTR_IRQ5] = SYSINTR_USB;
    IMAP_Sys2Aln[SYSINTR_USB] = ALNINTR_IRQ5;

    // Ethernet:
    // Get the Ethernet Card IRQ number from ether globals.
    if (pDriverGlobals->EbootMagicNum == PUZZLE_BOOT_MAGIC_NUM)
    {	
        //RETAILMSG (1, (TEXT("Embedded NIC using: \r\n")));
        //RETAILMSG (1, (TEXT("IRQ = %d\r\n"), pDriverGlobals->EtherIntrNumber & CLEAN_UP));
        //RETAILMSG (1, (TEXT("Sys = %d\r\n"), SYSINTR_ETHER));

        IMAP_Aln2Sys[(UCHAR)(pDriverGlobals->EtherIntrNumber & CLEAN_UP)] = SYSINTR_ETHER;
        IMAP_Sys2Aln[SYSINTR_ETHER] = (UCHAR)(pDriverGlobals->EtherIntrNumber & CLEAN_UP);

        // Bootloader must detect all services again...
        pDriverGlobals->EbootMagicNum = 0;
    }
    else 
        RETAILMSG (1, (TEXT("No ethernet card detected !!!\r\n")));

    // Initialize the 8259's.
    InitPICs();

    // Set up interrupt to sysintr mappings and set 5476 INTCTRL bits for
    // any plug-in cards found.
    // NOTE: from an interrupt perspective, we only support single-function 
    // PCI cards.
    InitPCISlotInts();

    // Init Vrc5476 PCI interrupt enables.  Note that the interrupts should
    // generally be enabled when the device's driver calls OEMInterruptEnable
    // via InterruptInitialize.
    pVRC5074->INTCTRL.Low = DefIControlLow;
    pVRC5074->INTCTRL.High = DefIControlHigh;

    //RETAILMSG (1, (TEXT(" Setting INTCTRL.low = 0x%x --- High = 0x%x\r\n"),
		                         //DefIControlLow, DefIControlHigh));
    //RETAILMSG (1, (TEXT(" Reading back INTCTRL.low = 0x%x --- High = 0x%x\r\n"),
		                //pVRC5074->INTCTRL.Low, pVRC5074->INTCTRL.High));

    pVRC5074->INTPPES.Low = DefIPolarityLow;
    pVRC5074->INTSTAT1.High |= 0x001f0000;

    // Hook interrupts for Int0:3 so kernel has an ISR to call.
    HookInterrupt(0, (void *)Intr0ISR);
    HookInterrupt(1, (void *)Intr1ISR);
    HookInterrupt(2, (void *)Intr2ISR);
    HookInterrupt(3, (void *)Intr3ISR);

}



// Enable Mastering Interrupts.
VOID SYSEnableInterrupt(UCHAR ucInterrupt, BOOL bEnabled)
{
    ULONG ulMask = 0;

    if (ucInterrupt <= (ALNINTR_BUS_TIMEOUT - MASTERINTR_VECTOR))
    {
        ulMask = 1 << ((ucInterrupt << 2) + 3);

        if (bEnabled) 
            pVRC5074->INTCTRL.Low |= ulMask;
        else  
            pVRC5074->INTCTRL.Low &= ~ulMask;

    }
    else if (ucInterrupt <= (ALNINTR_PCI_ERR - MASTERINTR_VECTOR))
    {
        ulMask = 1 << (((ucInterrupt - 8) << 2) + 3);

        if (bEnabled) 
            pVRC5074->INTCTRL.High |= ulMask;
        else
            pVRC5074->INTCTRL.High &= ~ulMask;

    }

}


// Mastering Interrupt Finished.
VOID SYSDoneInterrupt(UCHAR ucInterrupt)
{
    ULONG ulMask = 0;

    if (ucInterrupt <= (ALNINTR_BUS_TIMEOUT - MASTERINTR_VECTOR))
    {
        ulMask = 1 << ((ucInterrupt << 2) + 3);
        pVRC5074->INTCTRL.Low |= ulMask;
        pVRC5074->INTCLR.Low = 1 << ucInterrupt;

    }
    else if (ucInterrupt <= (ALNINTR_PCI_ERR - MASTERINTR_VECTOR))
    {
        ulMask = 1 << (((ucInterrupt - 8) << 2) + 3);
        pVRC5074->INTCTRL.High |= ulMask;
        pVRC5074->INTCLR.Low = 1 << ucInterrupt;
    }

}



// Enable ISA interrupts
VOID PICEnableInterrupt(UCHAR ucInterrupt, BOOL bEnabled)
{

    PUCHAR  PICBase = NULL;
    UCHAR   PICMask = 0;
    UCHAR   ucActiveInterrupts = 0;

    if (ucInterrupt < 8)
    {
        PICBase = IoPortBase + IOBASE_PIC1 + 1;
        PICMask = 1 << ucInterrupt;
    }
    else
    {
        PICBase = IoPortBase + IOBASE_PIC2 + 1;
        PICMask = 1 << (ucInterrupt - 8);
    }

    INTERRUPTS_OFF();