igs2010.h

来自「WinCE 3.0 BSP, 包含Inter SA1110, Intel_815」· C头文件 代码 · 共 429 行 · 第 1/2 页

//
//  MGDI driver (for IGS2010)
//
//  Copyright (c) 1997, 1998 Microsoft Corportaion
//
//
//  Notes: 
//    ported from CT6555x driver  Dec.1997
//
#ifndef __IGS2010_H__
#define __IGS2010_H__

#include "gpevga.h"

#define DBG_SLEEP   0

    // TV registers located in the memory space
#define TV_MEMORY_OFFSET  (0x000B0000 | 0x00800000)
    // size of the TV register map
#define TV_REG_SIZE     0xE52C

    // accelerator registers located in the memory space
#define ACCEL_MEMORY_OFFSET  (0x000BF000 | 0x00800000)
    // size of the accelerator register map
#define ACCEL_REG_SIZE     0x0200

class IGS2010Surf;

class IGS2010  : public GPEVGA
{
private:
#if DDHAL
public:     // temporarily moved - will fix later
#endif
    // Ports and memory ranges  used to access registers
#ifdef ENABLE_ACCELERATION
    SubIndexedRegArray16 reg_BEE8;          // Indexed accelerator registers
#endif

    unsigned char   *m_pLAW;                // Linear access window
    unsigned char   *m_pMMIO;               // acceleration Memory Mapped IO range
    int             m_nVideoMemorySize;     // Size in bytes of video RAM total
    Node2D          *m_p2DVideoMemory;      // Base entry representing all video memory
    int             m_nScreenStride;        // Stride of 2d memory in bytes
    unsigned int    m_nTicksAtFlip;         // TickCount at time flip was requested
    unsigned int    m_nTicksAtResync;       // TickCount when we last waited for VBlank
    IGS2010Surf     *m_pOldVisibleSurface;  // Visible surface before flip
    IGS2010Surf     *m_pNewVisibleSurface;  // Visible surface after flip
    unsigned long   m_nLAWPhysical;

public:
    // Config.cpp:
                    IGS2010();
    void            DumpVGARegs();
    virtual SCODE   SetMode( int modeNo, HPALETTE *pPalette );

#ifdef FB16BPP
    void            SetMode640x480x16();
#else   // FB16BPP
    void            SetMode640x480x8();
#endif  // FB16BPP

    void            SetClock();

    virtual SCODE   GetModeInfo(
                    GPEMode *pMode,
                    int modeNo );
    virtual int     NumModes();

    // Cursor.cpp:
    virtual SCODE   SetPointerShape(
                        GPESurf *pMask,
                        GPESurf *pColorSurf,
                        int xHot,
                        int yHot,
                        int cx,
                        int cy );
    virtual SCODE   MovePointer(
                        int x,
                        int y );
    void            SetCursorColors(
                        unsigned long foreground,   // 0x00bbggrr format
                        unsigned long background );

    // Misc.cpp:
    virtual void    WaitForNotBusy();
    virtual int     IsBusy();
    void            WaitForFIFO( int numParameters );
#ifdef ENABLE_ACCELERATION
    void            SelectSolidColor( unsigned long color );
#endif
    virtual void    GetPhysicalVideoMemory(
                        unsigned long *pPhysicalMemoryBase,
                        unsigned long *pVideoMemorySize );

    // Surf.cpp:
    virtual SCODE   AllocSurface(
                        GPESurf **ppSurf,
                        int width,
                        int height,
                        EGPEFormat format,
                        int surfaceFlags );
    void            CheckVisibleSurface();
    virtual int     SurfaceBusyFlipping( IGS2010Surf *pSurf );
    virtual int     FlipInProgress();
    virtual void    SetVisibleSurface( GPESurf *pSurf );
    virtual void    VBlankReceived();	// Called when VBlank is entered

    // Line.cpp:
    virtual SCODE   Line(
                        GPELineParms *pLineParms,
                        EGPEPhase phase );
    SCODE           AcceleratedSolidLine( GPELineParms *pLineParms );

    // Blt.cpp:
    virtual SCODE   BltPrepare( GPEBltParms *pBltParms );
    virtual SCODE   BltComplete( GPEBltParms *pBltParms );
    SCODE           AcceleratedFillRect(
                        GPEBltParms *pBltParms );
    SCODE           AcceleratedSrcCopyBlt(
                        GPEBltParms *pBltParms );
#ifdef ENABLE_FILL_EMULATION
    SCODE           EmulatedFillRect(
                        GPEBltParms *pBltParms );
#endif
#ifdef ENABLE_TEXT_EMULATION
    SCODE           EmulatedTextBlt(
                        GPEBltParms *pBltParms );
#endif
#ifdef ENABLE_SRC_COPY_EMULATION
    SCODE           EmulatedSrcCopyBlt( 
                        GPEBltParms *pBltParms );
#endif

};

class IGS2010Surf : public GPESurf
{
private:
    Node2D          *m_pNode2D;
public:
                    IGS2010Surf(                // Create video-memory surface
                        int width,
                        int height,
                        unsigned long offset,
                        void *pBits,            // virtual address of allocated bits
                        int stride,
                        EGPEFormat format,
                        Node2D *pNode );
    virtual         ~IGS2010Surf();
    int             Top() { return m_pNode2D->Top(); }
    int             Left() { return m_pNode2D->Left(); }
};


// Command types:

#define DRAW_LINE                       0x02000
#define RECTANGLE_FILL                  0x04000
#define POLYGON_SOLID                   0x06000
#define FOUR_POINT_TRAPEZOID_SOLID      0x08000
#define BRESENHAM_TRAPEZOID_SOLID       0x0A000
#define CMD_BITBLT                      0x0C000
#define PATTERN_FILL                    0x0E000
#define CMD_POLYLINE                    0x02800
#define POLYGON_PATTERN                 0x06800
#define FOUR_POINT_TRAPEZOID_PATTERN    0x08800
#define BRESENHAM_TRAPEZOID_PATTERN     0x0A800
#define ROPBLT                          0x0C800

// Move/draw:

#define MOVE                            0x0000
#define DRAW                            0x0010

// Read/write:

#define READ                            0x0000
#define WRITE                           0x0001

// Drawing direction bits:

#define PLUS_X                          0x0020
#define PLUS_Y                          0x0080
#define MAJOR_Y                         0x0040


// Direct access non-standard VGA/IGS2010 IO mapped registers
#define reg_SETUP_MD        (PORT_WO_8 m_VGAIOPort[PortId_46E8])    //Bit3:Addr decode enableBit4:Setup mode
#define reg_SETUP           (PORT_RW_8 m_VGAIOPort[PortId_3C3]) //Sleep mode (was optionally 46E8 in old revs of chip)
#define reg_RAMDACMASK      (PORT_RW_8 m_VGAIOPort[PortId_3C6])

// Indexed registers and their aliases
//
#define reg_EXT_SR_D        reg_SR[0xD]     //  R/W Feature connector & DPMS
#define reg_CHIP_ID_REV     reg_CR[0x30]    //  R Revision status
#define reg_MEM_CNFG        reg_CR[0x31]    //  R/W Enable large memory etc.
#define reg_BKWD_1          reg_CR[0x32]    //  R/W Interrupt enable & 256k Wrap control
#define reg_BKWD_2          reg_CR[0x33]    //  R/W Border blank, RAMDAC lock
#define reg_BKWD_3          reg_CR[0x34]    //  R/W Snoop control & CR3B enable
#define reg_CRTR_LOCK       reg_CR[0x35]    //  R/W Old CPU base addr, H/V Timing lock
#define reg_CONFG_REG1      reg_CR[0x36]    //  R/W Mem & Bus size & strappings
#define reg_CONFG_REG2      reg_CR[0x37]    //  R/W Strapped ramdac,bus,bios control
#define reg_LOCK_1          reg_CR[0x38]    //  R/W Write 0x48 here to unlock S3 Reg set
#define reg_LOCK_2          reg_CR[0x39]    //  R/W Write 0xA0 here to enable CR68 & CR36[7:2] 
#define reg_MISC_1          reg_CR[0x3A]    //  R/W Refresh, >8bit, and PCI burst control
#define reg_DT_EX_POS       reg_CR[0x3B]    //  R/W Start display FIFO fetch(= -5+CR0)
#define reg_IL_RTSTART      reg_CR[0x3C]    //  R/W Interlace retrace start
//
#define reg_SYS_CNFG        reg_CR[0x40]    //  R/W Enable enhanced reg access ( x2E8 )
#define reg_BIOS_FLAG       reg_CR[0x41]    //  R/W BIOS flags
#define reg_MODE_CTL        reg_CR[0x42]    //  R/W Interlace enable
#define reg_EXT_MODE        reg_CR[0x43]    //  R/W Bit 8 of CR13, and Hor Ctr x2

#define reg_HWGC_FGSTK      reg_CR[0x4A]    //  R/W Foreground color 3-entry stack