gpevga.cpp

来自「WinCE 3.0 BSP, 包含Inter SA1110, Intel_815」· C++ 代码 · 共 642 行 · 第 1/2 页

/*--
    Copyright (c) 1995, 1996, 1997, 1998  Microsoft Corporation

Module Name:  

Abstract:  
      GDI driver (for IGS2010)
      
Functions:


Notes: 


--*/


#include "precomp.h"
INSTANTIATE_MODE_INIT

#ifdef USE_MEMORY_MAPPED_PORTS
#define CP2010_VENDOR_ID     0x10EA
#define CP2010_DEVICE_ID     0x2010

static BOOL PciFindDevice
(
    IN USHORT wVendorId,
    IN USHORT wDeviceId,
    OUT PULONG pdwBusNumber,
    OUT PPCI_SLOT_NUMBER ppPciSlotNumber,
    OUT PPCI_COMMON_CONFIG pPciCommonConfig
);
#define MEMORY_IO  0x00800000 /*memory mapped I/O control bit: bit 23*/ 
        // LinearBaseAddress is used globally in CONFIG.CPP
        // because XR35 register does not seem to return the correct
        // value when using memory mapped registers
ULONG LinearBaseAddress = NULL; /*linear frame buffer pointer base address*/

#define MEMORY_MAPPED_PORT_OFFSET (LinearBaseAddress | MEMORY_IO)
#else  //USE_MEMORY_MAPPED_PORTS
#define MEMORY_MAPPED_PORT_OFFSET  0
#endif //USE_MEMORY_MAPPED_PORTS


//
//  GPEVGA - constructor
//  inputs:  
//  outputs: none
//
GPEVGA::GPEVGA()
{
    DEBUGMSG( GPE_ZONE_INIT,(TEXT("GPEVGA::GPEVGA\r\n")));

#ifdef USE_MEMORY_MAPPED_PORTS
    DWORD       dwBusNumber;
    DWORD       dwSlotNumber;
    PCI_SLOT_NUMBER         sPciSlotNumber; // defined in ceddk.h
    PCI_COMMON_CONFIG       sPciConfig;
        // find the card and get its memory mapped base address
    if (!PciFindDevice(CP2010_VENDOR_ID, CP2010_DEVICE_ID,
        &dwBusNumber, &sPciSlotNumber, &sPciConfig)) {
            // we are hosed if we can't find the card, since we can't really
            // return an error from here
        DEBUGMSG( GPE_ZONE_ERROR,(TEXT("IGS2010 Display Not Found - fatal error\r\n")));
        return;
    }
    dwSlotNumber = sPciSlotNumber.u.AsULONG;

    DEBUGMSG(GPE_ZONE_ERROR,(TEXT("IGS2010 Device %04x %04x found in bus %d, slot%d\r\n"),
                            CP2010_VENDOR_ID,
                            CP2010_DEVICE_ID,
                            dwBusNumber,
                            dwSlotNumber));

        // Extract the important info from the PCI header
    if(sPciConfig.HeaderType != 0) {
        DEBUGMSG(GPE_ZONE_ERROR,(TEXT("IGS2010 Error: header type is %d, should be 0\r\n"),
                sPciConfig.HeaderType ));
        return;
    }
        // get the base address and save for global use
    LinearBaseAddress = (ULONG) (sPciConfig.u.type0.BaseAddresses[0] & ~0x0000000FL);
#endif //USE_MEMORY_MAPPED_PORTS

    m_pPortRanges = (PortRange *)NULL;

    // Reserve / Map in - standard VGA ports
    reg_POS.Map(0x102 | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges);
    m_VGAIOPort[PortId_3BA].Map(0x3BA | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges );
    m_VGAIOPort[PortId_3C0].Map(0x3C0 | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges );
    m_VGAIOPort[PortId_3C1].Map(0x3C1 | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges );
    m_VGAIOPort[PortId_3C2].Map(0x3C2 | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges );
    m_VGAIOPort[PortId_3C3].Map(0x3C3 | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges );
    m_VGAIOPort[PortId_3C4].Map(0x3C4 | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges );
    m_VGAIOPort[PortId_3C5].Map(0x3C5 | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges );
    m_VGAIOPort[PortId_3C6].Map(0x3C6 | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges );
    m_VGAIOPort[PortId_3C7].Map(0x3C7 | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges );
    m_VGAIOPort[PortId_3C8].Map(0x3C8 | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges );
    m_VGAIOPort[PortId_3C9].Map(0x3C9 | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges );
    m_VGAIOPort[PortId_3CA].Map(0x3CA | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges );
    m_VGAIOPort[PortId_3CC].Map(0x3CC | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges );
    m_VGAIOPort[PortId_3CE].Map(0x3CE | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges );
    m_VGAIOPort[PortId_3CF].Map(0x3CF | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges );
    m_VGAIOPort[PortId_3D0].Map(0x3D0 | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges );
    m_VGAIOPort[PortId_3D1].Map(0x3D1 | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges );
    m_VGAIOPort[PortId_3D2].Map(0x3D2 | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges );
    m_VGAIOPort[PortId_3D3].Map(0x3D3 | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges );
    m_VGAIOPort[PortId_3D4].Map(0x3D4 | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges );
    m_VGAIOPort[PortId_3D5].Map(0x3D5 | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges );
    m_VGAIOPort[PortId_3D6].Map(0x3D6 | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges );
    m_VGAIOPort[PortId_3D7].Map(0x3D7 | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges );
    m_VGAIOPort[PortId_3DA].Map(0x3DA | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges );
    m_VGAIOPort[PortId_46E8].Map(0x46E8 | MEMORY_MAPPED_PORT_OFFSET, m_pPortRanges );

    // Initialize access to registers which have different read ports from write ports
    DEBUGMSG( GPE_ZONE_INIT,(TEXT("Initialize access to registers\r\n")));

    reg_MISC.Init( m_VGAIOPort[PortId_3CC], m_VGAIOPort[PortId_3C2] );
    reg_FCR_WT.Init( m_VGAIOPort[PortId_3CA], m_VGAIOPort[PortId_3DA] );

    // Initialize access to indexed ranges of registers
    DEBUGMSG( GPE_ZONE_INIT,(TEXT("Initialize access to indexed ranges of registers\r\n")));

    DEBUGMSG( GPE_ZONE_INIT,(TEXT("Initialize access to SR[]\r\n")));
    reg_SR.Init( reg_SR_ADDR, reg_SR_DATA );
    DEBUGMSG( GPE_ZONE_INIT,(TEXT("Initialize access to CR[]\r\n")));
    reg_CR.Init( reg_CR_ADDR, reg_CR_DATA );
    DEBUGMSG( GPE_ZONE_INIT,(TEXT("Initialize access to GR[]\r\n")));
    reg_GR.Init( reg_GR_ADDR, reg_GR_DATA );
    DEBUGMSG( GPE_ZONE_INIT,(TEXT("Initialize access to AR[]\r\n")));
    reg_AR.Init( reg_AR_ADDR, reg_AR_DATA, reg_AR_RESET );
    DEBUGMSG( GPE_ZONE_INIT,(TEXT("Initialize access to XR[]\r\n")));
    reg_XR.Init( reg_XR_ADDR, reg_XR_DATA );
}

//
//  SetVGAMode - 
//  inputs:  
//  outputs: none
//
void GPEVGA::SetVGAMode( ModeInit *pMode )
{
    int i;
#ifdef DEBUG    
    UCHAR temp; 
#endif

    DEBUGMSG( GPE_ZONE_INIT,(TEXT("GPEVGA::SetVGAMode\r\n")));

    UnlockVGA();
    DEBUGMSG (GPE_ZONE_INIT, (TEXT("SR[0] 0x%02X\r\n"), temp = reg_RST_SYNC));

    DEBUGMSG (GPE_ZONE_INIT, (TEXT("Setting SR registers\r\n")));
    reg_SR[0] = 0x00;   // sequence clear
    for( i=0; i<=REG_SR_SIZE; i++ )  { // Set Sequencer registers SR[0..4]
        reg_SR[i] = pMode->Init_SR[i];
    }
    reg_MISC = 0xEF;    // don't know if this needs to be done here, from IGS sample
    reg_SR[0] = 0x03;   // sequence normal
    DEBUGMSG (GPE_ZONE_INIT, (TEXT("SR[0] 0x%02X\r\n"), temp = reg_RST_SYNC));

    Sleep (DBG_SLEEP);
    
    
    DEBUGMSG (GPE_ZONE_INIT, (TEXT("Setting GR registers\r\n")));
    for( i=0; i<=REG_GR_SIZE; i++ ) { // Set graphics controller regs GR[0..8]
        reg_GR[i] = pMode->Init_GR[i];
    }
    Sleep (DBG_SLEEP);
    DEBUGMSG (GPE_ZONE_INIT, (TEXT("Setting CR registers\r\n")));
    for( i=0; i<=REG_CR_SIZE; i++ ) { // Set CRTC controller regs CR[0..x18]
        reg_CR[i] = pMode->Init_CR[i];
    }
    Sleep (DBG_SLEEP);
    DEBUGMSG (GPE_ZONE_INIT, (TEXT("Setting XR registers\r\n")));
    for (i=0; i < REG_XR_SIZE; i++) {   // Set Extension Registers
        reg_XR[pMode->Init_XR[i].Index] = pMode->Init_XR[i].Data;
    }
    
  
    Sleep (DBG_SLEEP);
    DEBUGMSG (GPE_ZONE_INIT, (TEXT("Setting AR registers\r\n")));
    for( i=0; i<=REG_AR_SIZE; i++ ) { // Set attribute regs AR[0..x14]
        reg_AR[i] = pMode->Init_AR[i];
    }

    Sleep (DBG_SLEEP);
    
    DEBUGMSG (GPE_ZONE_INIT, (TEXT("Re-enabling the palette\r\n")));
    DEBUGMSG (GPE_ZONE_INIT, (TEXT("SR[0] 0x%02X\r\n"), temp = reg_RST_SYNC));
    
    reg_AR.ResetToAddr();       // Point back at address reg to enable following

    reg_AR_ADDR = 0x20;         // Re-enable the palette

    Sleep (DBG_SLEEP);
    LockVGA();
    DEBUGMSG( GPE_ZONE_INIT,(TEXT("Leaving GPEVGA::SetVGAMode\r\n")));
    DEBUGMSG (GPE_ZONE_INIT, (TEXT("SR[0] 0x%02X\r\n"), temp = reg_RST_SYNC));
}

//
//  DetermineScreenRefreshRate - 
//  inputs:  
//  outputs: none
//
void GPEVGA::DetermineScreenRefreshRate()
{
    DEBUGMSG( GPE_ZONE_INIT,(TEXT("GPEVGA::DetermineScreenRefreshRate\r\n")));
    WaitForVBlank();
    int i;
    unsigned long startTickCount = GetTickCount();
    for( i=0; i<20; i++ ) {
        WaitForVBlank();
    }
    m_nTicksPerFrame = ( GetTickCount() - startTickCount + 10 ) / 20;
    DEBUGMSG( GPE_ZONE_INIT, ( TEXT("Frame takes %d ticks\r\n"), m_nTicksPerFrame ));
}

//
//  InVBlank - 
//  inputs:  
//  outputs: none
//
int GPEVGA::InVBlank()
{
    return reg_STATUS_1 & 0x08;
}

void GPEVGA::WaitForVBlank()
{
    unsigned long i;

    DEBUGMSG (GPE_ZONE_INIT, (TEXT("GPEVGA::WaitForVBlank()\r\n")));
    

    // First wait to be out of vblank

    for (i = 0; i < 0x1000000; i++) {
        if( !(reg_STATUS_1 & 0x08 ) ) {
            break;
        }
    }

    // Wait to get into vblank
    for (; i < 0x1000000; i++) {
        if( reg_STATUS_1 & 0x08 ) {
            break;
        }
    }

    VBlankReceived();   // Reset counters etc
    DEBUGMSG (GPE_ZONE_INIT, (TEXT("Leaving GPEVGA::WaitForVBlank()\r\n")));
}

//
//  LockVGA - 
//  inputs:  
//  outputs: none
//
void GPEVGA::LockVGA()
{
    DEBUGMSG( GPE_ZONE_INIT,(TEXT("GPEVGA::LockVGA\r\n")));
    // disable writes to CR0..7
    reg_VRE = reg_VRE | 0x80;   // reg_CR[0x11]
}

//
//  UnlockVGA - 
//  inputs:  
//  outputs: none
//
void GPEVGA::UnlockVGA()
{
    DEBUGMSG( GPE_ZONE_INIT,(TEXT("GPEVGA::UnlockVGA\r\n")));
    // enable writes to CR0..7
    reg_VRE = reg_VRE & 0x7F;   // reg_CR[0x11]
}

//
//  SetPalette - 
//  inputs:  
//  outputs: none
//
SCODE GPEVGA::SetPalette(
    const PALETTEENTRY *src,
    unsigned short firstEntry,
    unsigned short numEntries )
{
    DEBUGMSG( GPE_ZONE_INIT,(TEXT("GPEVGA::SetPalette\r\n")));
    if( firstEntry < 0 || firstEntry + numEntries > 256 ) {
        return E_INVALIDARG;
    }

    for( ; numEntries; numEntries-- ) {
        reg_DAC_WR_AD = (unsigned char)(firstEntry++);
        reg_DAC_DATA = src->peRed >> 2;
        reg_DAC_DATA = src->peGreen >> 2;
        reg_DAC_DATA = src->peBlue >> 2;
        src++;
    }
    return S_OK;
}


#ifdef USE_MEMORY_MAPPED_PORTS
//
//  PciFindDevice - 
//  inputs:  
//  outputs: none
//
static BOOL PciFindDevice
(
    IN USHORT wVendorId,
    IN USHORT wDeviceId,
    OUT PULONG pdwBusNumber,
    OUT PPCI_SLOT_NUMBER ppPciSlotNumber,
    OUT PPCI_COMMON_CONFIG pPciCommonConfig
)
{
    PCI_SLOT_NUMBER     slotNumber;