s1xser.c

WinCE 3.0 BSP, 包含Inter SA1110, Intel_815E, Advantech_PCM9574 等

/* 
THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
PARTICULAR PURPOSE.
Copyright (c) 1995-2000  Microsoft Corporation

Module Name:  s1xser.c

Abstract:  

    based serial device.

Functions:  serial driver

*/
#include <windows.h>
#include <serhw.h>
#include <hw16550.h>
#include <serdbg.h>
#include <ceddk.h>
#include "sa11x0.h"
//#include "s1xuart.h"
#include "sa1xser.h"
#include "macros.h"
#include "sa11x0bd.h"
#include "sa11x1db.h"
#include "ser_pdd.h"
#include <nkintr.h>
#include "OALINTR.H"

extern HW_VTBL SerVTbl;

#ifdef SA1100_MODEM_CTRL
// Viersion with MODEM Signal enable
//
// Reading the MSR clears many of its bits.  So, we provide this wrapper,
// which reads the register, records any interesting values, and
// stores the current MSR contents in the shadow register.
// Note that we always have DDCD and DCTS enabled, so if someone
// wants to keep an eye on these lines, its OK to simply read the
// shadow register, since if the value changes, the interrupt
// will cause the shadow to be updated.
//
VOID
ReadSA1100MSR(
    PSER_HW_INFO  pHWHead
    )
{
    volatile struct SA1111DBRegisterBlock *v_pDCCTLReg=(struct SA1111DBRegisterBlock *)DC_NCR_BA;

    pHWHead->MSR |=SERIAL_MSR_DCD;

    if (pHWHead->dwIOBase==UART3_BASE_VIRTUAL) { // Modem signal 1 rout to UART 3.
        
        if (v_pDCCTLReg->mdm_ctl1[0].cts1==0) // low active
            pHWHead->MSR |= SERIAL_MSR_CTS;
        else
            pHWHead->MSR &= ~SERIAL_MSR_CTS;
        if (v_pDCCTLReg->mdm_ctl1[0].dsr1==0)
            pHWHead->MSR |=SERIAL_MSR_DSR;
        else
            pHWHead->MSR &=~SERIAL_MSR_DSR;
    }
    else
    if (pHWHead->dwIOBase==UART1_BASE_VIRTUAL) {
        if (v_pDCCTLReg->mdm_ctl1[0].cts2==0)
            pHWHead->MSR |= SERIAL_MSR_CTS;
        else
            pHWHead->MSR &= ~SERIAL_MSR_CTS;
        if (v_pDCCTLReg->mdm_ctl1[0].dsr2==0)
            pHWHead->MSR |=SERIAL_MSR_DSR;
        else
            pHWHead->MSR &=~SERIAL_MSR_DSR;
    }
    else { // Does not support this function
        pHWHead->MSR |= (SERIAL_MSR_CTS | SERIAL_MSR_DSR);
    }
}
VOID HW_SA1100ClearDTR(PVOID   pHead) 
{
    volatile struct SA1111DBRegisterBlock * v_pDCCTLReg=(struct SA1111DBRegisterBlock *)DC_NCR_BA;
    PSER_HW_INFO   pHWHead   = (PSER_HW_INFO)pHead;
    DEBUGMSG(ZONE_FUNCTION,(TEXT("\t**** HW_SA1100ClearDTR Modem Controls for port 0x%X******\r\n"),pHWHead->dwIOBase));
    if (pHWHead->dwIOBase==UART3_BASE_VIRTUAL) { // Modem signal 1 rout to UART 3.
        IOW_REG_FIELD(struct mdm_ctl0Bits, &v_pDCCTLReg->mdm_ctl0[0], dtr1, 1); //Active Low
    }
    else
    if (pHWHead->dwIOBase==UART1_BASE_VIRTUAL) {
        IOW_REG_FIELD(struct mdm_ctl0Bits, &v_pDCCTLReg->mdm_ctl0[0], dtr2, 1);
    }
}
VOID HW_SA1100SetDTR(PVOID   pHead) 
{
    volatile struct SA1111DBRegisterBlock * v_pDCCTLReg=(struct SA1111DBRegisterBlock *)DC_NCR_BA;
    PSER_HW_INFO   pHWHead   = (PSER_HW_INFO)pHead;
    DEBUGMSG(ZONE_FUNCTION,(TEXT("\t**** HW_SA1100SetDTR Modem Controls for port 0x%X ******\r\n"),pHWHead->dwIOBase));
    if (pHWHead->dwIOBase==UART3_BASE_VIRTUAL) { // Modem signal 1 rout to UART 3.
        IOW_REG_FIELD(struct mdm_ctl0Bits, &v_pDCCTLReg->mdm_ctl0[0], dtr1, 0);
    }
    else
    if (pHWHead->dwIOBase==UART1_BASE_VIRTUAL) {
        IOW_REG_FIELD(struct mdm_ctl0Bits, &v_pDCCTLReg->mdm_ctl0[0], dtr2, 0);
    }
}
VOID HW_SA1100ClearRTS(PVOID   pHead) 
{
    volatile struct SA1111DBRegisterBlock * v_pDCCTLReg=(struct SA1111DBRegisterBlock *)DC_NCR_BA;
    PSER_HW_INFO   pHWHead   = (PSER_HW_INFO)pHead;
    DEBUGMSG(ZONE_FUNCTION,(TEXT("\t**** HW_SA1100ClearRTS Modem Controls for port 0x%X******\r\n"),pHWHead->dwIOBase));
    if (pHWHead->dwIOBase==UART3_BASE_VIRTUAL) { // Modem signal 1 rout to UART 3.
        IOW_REG_FIELD(struct mdm_ctl0Bits, &v_pDCCTLReg->mdm_ctl0[0], rts1, 1);
    }
    else
    if (pHWHead->dwIOBase==UART1_BASE_VIRTUAL) {
        IOW_REG_FIELD(struct mdm_ctl0Bits, &v_pDCCTLReg->mdm_ctl0[0], rts2, 1);
    }
}
VOID HW_SA1100SetRTS(PVOID   pHead) 
{
    volatile struct SA1111DBRegisterBlock * v_pDCCTLReg=(struct SA1111DBRegisterBlock *)DC_NCR_BA;
    PSER_HW_INFO   pHWHead   = (PSER_HW_INFO)pHead;
    DEBUGMSG(ZONE_FUNCTION,(TEXT("\t**** HW_SA1100SetRTS Modem Controls for port 0x%X******\r\n"),pHWHead->dwIOBase));
    if (pHWHead->dwIOBase==UART3_BASE_VIRTUAL) { // Modem signal 1 rout to UART 3.
        IOW_REG_FIELD(struct mdm_ctl0Bits, &v_pDCCTLReg->mdm_ctl0[0], rts1, 0);
    }
    else
    if (pHWHead->dwIOBase==UART1_BASE_VIRTUAL) {
        IOW_REG_FIELD(struct mdm_ctl0Bits, &v_pDCCTLReg->mdm_ctl0[0], rts2, 0);
    }
}

//
// @doc OEM
// @func    VOID | HW_SA1100GetModemStatus | Retrieves modem status.
//
// @rdesc   None.
//
VOID
HW_SA1100GetModemStatus(
    PVOID   pHead,      // @parm PVOID returned by HWInit.
    PULONG  pModemStatus    // @parm PULONG passed in by user.
    )
{
    PSER_HW_INFO pHWHead = (PSER_HW_INFO)pHead;
    ULONG               win32status = 0;
	static UINT8 uPrevStatus=0;

    UINT8 ubModemStatus;
    DEBUGMSG (ZONE_FUNCTION,
              (TEXT("+HW_SA1100GetModemStatus 0x%X\r\n"), pHead));
    ReadSA1100MSR( pHWHead );
    ubModemStatus = pHWHead->MSR;
   
    if ( ubModemStatus & SERIAL_MSR_CTS ) {
        *pModemStatus |= MS_CTS_ON;
    }
    if ( ubModemStatus & SERIAL_MSR_DSR ) {
        *pModemStatus |= MS_DSR_ON;
    }
    if ( ubModemStatus & SERIAL_MSR_RI ) {
        *pModemStatus |= MS_RING_ON;
        win32status |= EV_RING;
    };
    if ( ubModemStatus & SERIAL_MSR_DCD ) {
        *pModemStatus |= MS_RLSD_ON;
    };

    if ( (ubModemStatus ^ uPrevStatus) & SERIAL_MSR_DCD ) {
        win32status |= EV_RLSD;
	}
    if ( (ubModemStatus ^ uPrevStatus) & SERIAL_MSR_CTS ) 
        win32status |=EV_CTS;

    if ( (ubModemStatus ^ uPrevStatus) & SERIAL_MSR_DSR )
        win32status |= EV_DSR;

    if (win32status)
        pHWHead->EventCallback( pHWHead->pMddHead, win32status );
	uPrevStatus=ubModemStatus;

    DEBUGMSG (ZONE_FUNCTION,
              (TEXT("-HW_SA1100GetModemStatus 0x%X\r\n"), pHead));
    return;
}
BOOL IsModemDsrOn( PVOID   pHead)
{
    PSER_HW_INFO   pHWHead  = (PSER_HW_INFO)pHead;
   // But we may want to discard it
    if( pHWHead->dcb.fDsrSensitivity) {
		ReadSA1100MSR(pHWHead);
		if (!(pHWHead->MSR & SERIAL_MSR_DSR))
 			return FALSE;
	};
	return TRUE;
}
BOOL IsModemCtsOn(PVOID   pHead)
{
    PSER_HW_INFO   pHWHead  = (PSER_HW_INFO)pHead;
	ReadSA1100MSR(pHWHead);
    if ( pHWHead->dcb.fOutxCtsFlow ) {
        ReadSA1100MSR( pHWHead );
        if(! (pHWHead->MSR & SERIAL_MSR_CTS) ) 
			return FALSE;
	};
	return TRUE;
}
//
// @doc OEM
// @func ULONG | HW_SA1100OtherIntr | This routine is called from the MDD
//   whenever INTR_MODEM is returned by HW_SA1100GetInterruptType.
// 
// @rdesc None
//
VOID
HW_SA1100OtherIntr(
    PVOID pHead                // Hardware Head
    )
{
    PSER_HW_INFO   pHWHead  = (PSER_HW_INFO)pHead;
    DWORD win32status=0;

//RETAILMSG(1,(TEXT("+HW_SA1100OtherIntr 0x%X\r\n"), pHead));
    DEBUGMSG (0,(TEXT("+HW_SA1100OtherIntr 0x%X\r\n"), pHead));

	HW_SA1100GetModemStatus(pHWHead,&win32status);
    
    try {
             // If we are currently flowed off via CTS or DSR, then
             // we better signal the TX thread when one of them changes
             // so that TX can resume sending.
        if (pHWHead->DSRFlowOff && (pHWHead->MSR & SERIAL_MSR_DSR)) {
            DEBUGMSG (ZONE_WRITE|ZONE_FLOW,
                      (TEXT("PutBytes, flowed on via DSR\n")));
            pHWHead->DSRFlowOff = FALSE;
             // DSR is set, so go ahead and resume sending
//            OUTB(pHWHead, pIER, IER_NORMAL_INTS | SERIAL_IER_THR); // Enable xmit intr.
            IOW_REG_FIELD (struct  utcr3Bits, &pHWHead->pUART->utcr3, tie, 1);

             // Then simulate a TX intr to get things moving
            pHWHead->AddTXIntr = TRUE;
        }
        if (pHWHead->CTSFlowOff && (pHWHead->MSR & SERIAL_MSR_CTS) ) {
            DEBUGMSG (ZONE_WRITE|ZONE_FLOW,
                      (TEXT("PutBytes, flowed on via CTS\n")));
            pHWHead->CTSFlowOff = FALSE;
             // CTS is set, so go ahead and resume sending
//            OUTB(pHWHead, pIER, IER_NORMAL_INTS | SERIAL_IER_THR); // Enable xmit intr.
            IOW_REG_FIELD (struct  utcr3Bits, &pHWHead->pUART->utcr3, tie, 1);
             // Then simulate a TX intr to get things moving
            pHWHead->AddTXIntr = TRUE;
        }
    }
    except (GetExceptionCode() == EXCEPTION_ACCESS_VIOLATION ?
            EXCEPTION_EXECUTE_HANDLER : EXCEPTION_CONTINUE_SEARCH) {
    }