poseidon.h

WinCE 3.0 BSP, 包含Inter SA1110, Intel_815E, Advantech_PCM9574 等

#define kSibSClkDiv_6				0x4
#define kSibSClkDiv_5				0x3
#define kSibSClkDiv_4				0x2
#define kSibSClkDiv_3				0x1
#define kSibSClkDiv_2				0x0
#define kSibSClkDivShift			24

#define SIB_SCLK_DIV_TO_MASK(div)	(((div) & 0x7) << kSibSclkDivShift)

/***** Values for kSibTelDivMask and kSibSoundDivMask fields - SIBSCLK = 9.216 MHz *****/
#define kSibFsDiv9216_7200			0x27	/* 39, div-by-40 */
#define kSibFsDiv9216_8000			0x23	/* 35, div-by-36 */
#define kSibFsDiv9216_9600			0x1d	/* 29, div-by-30 */
/*SSP, 960827: the number for 9216_11025 should be 0x19 (25, div by 26). why 0x1b? */
/*#define kSibFsDiv9216_11025			0x1b	/* 27, div-by-28 */
#define kSibFsDiv9216_11025			0x19	/* 25, div-by-26 */
#define kSibFsDiv9216_19200			0x0e	/* 14, div-by-15 */
#define kSibFsDiv9216_22050			0x0c	/* 12, div-by-13 */
#define kSibFsDiv9216_24000			0x0b	/* 11, div-by-12 */
#define kSibFsDiv9216_72000			0x03	/* 3,  div-by-4, fastest test mode */

#define kSibFsDivMask				0x7f	
#define kSibTelDivShift				16
#define kSibSoundDivShift			8

#define SIB_TEL_DIV_TO_MASK(div)	(((div) & kSibFsDivMask) << kSibTelDivShift)
#define SIB_SOUND_DIV_TO_MASK(div)	(((div) & kSibFsDivMask) << kSibSoundDivShift)

/***** SIB Sound Hold Register Equates (PoseidonModule.sibSoundHold) *****/
/***** SIB Tele Hold Register Equates (PoseidonModule.sibTelHold) *****/

/***** SIB SF0 Aux Register Equates (PoseidonModule.sibSf0Aux) *****/
/***** SIB SF1 Aux Register Equates (PoseidonModule.sibSf1Aux) *****/

/***** SIB SF0 Status Register Equates (PoseidonModule.sibSf0Status) *****/
/***** SIB SF1 Status Register Equates (PoseidonModule.sibSf1Status) *****/

/***** SIB DMA Control Register Equates (PoseidonModule.sibDMA) *****/
#define kSibSoundDmaOnceMask		0x80000000	/* 31 */
#define kSibSoundDmaLoopMask		0x40000000	/* 30 */
#define kSibSoundDmaPtrMask			0x3ffc0000 	/* 29:18 */
#define kSibEnSoundRxDmaMask		0x00020000	/* 17 */
#define kSibEnSoundTxDmaMask		0x00010000	/* 16 */
#define kSibTelDmaOnceMask			0x00008000	/* 15 */
#define kSibTelDmaLoopMask			0x00004000	/* 14 */
#define kSibTelDmaPtrMask			0x00003ffc	/* 13:2 */
#define kSibEnTelRxDmaMask			0x00000002	/* 1 */
#define kSibEnTelTxDmaMask			0x00000001	/* 0 */

#define kSibSoundDmaPtrShift		18
#define kSibTelDmaPtrShift			2


/***** IR Module Equates *****/
/***** Register Equates (PoseidonModule.irControl1) *****/
#define kIRCarDetPinMask			0x01000000	/* 24 */
#define kIRBaudMask					0x00ff0000	/* 23:16 */
#define kIRTestMask					0x00000010	/* 4 */
#define kIRDTInvertMask				0x00000008	/* 3 */
#define kIREnRXPwrMask				0x00000004	/* 2 */
#define kIREnCarDetStateMask 		0x00000002	/* 1 */
#define kIREnConsumerMask			0x00000001	/* 0 */

#define kIRBaudShift				16

/***** Register Equates (PoseidonModule.irControl2) *****/
#define kIRPeriodMask				0xff000000	/* 31:24 */
#define kIROnTimeMask				0x00ff0000	/* 23:16 */
#define kIRDelayMask				0x0000ff00	/* 15:8 */
#define kIRWaitMask					0x000000ff	/* 7:0 */

#define kIRPeriodShift				24
#define kIROnTimeShift				16
#define kIRDelayShift				8
#define kIRWaitShift				0

/***** Register Equates (PoseidonModule.irHold) *****/
#define kIRTxHoldMask				0x0000ffff	/* 15:0 */

#define kIRTxHoldShift				0


/***** UART Module Equates *****/
/***** Register Equates (PoseidonModule.uartA.control1 and PoseidonModule.uartB.control1) *****/
#define kUartEnabledStatusMask		0x80000000	/* 31 */
#define kUartEmptyMask				0x40000000	/* 30 */
#define kUartPRxHoldFullMask		0x20000000	/* 29 */
#define kUartRxHoldFullMask			0x10000000	/* 28 */
#define kUartEnDmaRxMask			0x00008000	/* 15 */
#define kUartEnDmaTxMask			0x00004000	/* 14 */
#define kUartEnHaltOnBreakMask		0x00001000	/* 12 */
#define kUartEnDmaLoopMask			0x00000400	/* 10 */
#define kUartPulseLow3ClockMask		0x00000200	/* 9 */
#define kUartPulseLow6CLockMask		0x00000100	/* 8 */
#define kUartDTInvertMask			0x00000080	/* 7 */
#define kUartDisableTxdMask			0x00000040	/* 6 */
#define kUartTwoStopsMask			0x00000020	/* 5 */
#define kUartLoopbackMask			0x00000010	/* 4 */
#define kUart7BitCharMask			0x00000008	/* 3 */
#define kUartEvenParityMask			0x00000004	/* 2 */
#define kUartEnParityMask			0x00000002	/* 1 */
#define kUartEnUartMask				0x00000001	/* 0 */

/***** Register Equates (PoseidonModule.uartA.control2 and PoseidonModule.uartB.control2) *****/
#define kUartBaudRateMask			0x000003ff	/* 9:0 */

/***** Register Equates (PoseidonModule.uartA.dmaControl1 and PoseidonModule.uartB.dmaControl1) *****/
#define kUartDmaStartAddrMask		0xfffffffc	/* 31:2 */
#define kUartDmaStartAddrShift		2

/***** Register Equates (PoseidonModule.uartA.dmaControl2 and PoseidonModule.uartB.dmaControl2) *****/
#define kUartDmaLengthMask			0x0000ffff	/* 15:0 */

/***** Register Equates (PoseidonModule.uartA.dmacnt and PoseidonModule.uartB.dmacnt) *****/
#define kUartDmaCountMask			0x0000ffff	/* 15:0 */

/***** Register Equates (PoseidonModule.uartA.hold and PoseidonModule.uartB.hold) *****/
#define kUartBreakMask				0x00000100	/* 8 */
#define kUartTxDataMask				0x000000ff	/* 7:0 */



/***** MagicBus Module Equates *****/
/***** Register Equates (PoseidonModule.mbusControl1) *****/
#define kMbusEnabledStatusMask		0x80000000	/* 31 */
#define kMbusEmptyStatusMask		0x40000000	/* 30 */
#define kMbusIntStatusMask			0x20000000	/* 29 */
#define kMbusEnDmaRxMask			0x00010000	/* 16 */
#define kMbusEnDmaTxMask			0x00008000	/* 15 */
#define kMbusEnDmaLoopMask			0x00002000	/* 13 */
#define kMbusLoopbackMask			0x00001000	/* 12 */
#define kMbusRxClockPolMask			0x00000800	/* 11 */
#define kMbusTxDataIdleMask			0x00000400	/* 10 */
#define kMbusEnByteDlyMask			0x00000200	/* 9 */
#define kMbusEnWordDlyMask			0x00000100	/* 8 */
#define kMbusDetRxPhasePolMask		0x00000080	/* 7 */
#define kMbusDetRxClockPolMask		0x00000040	/* 6 */
#define kMbusTxPhasePolMask			0x00000020	/* 5 */
#define kMbusTxClockPolMask			0x00000010	/* 4 */
#define kMbusSlaveMask				0x00000008	/* 3 */
#define kMbusForceSlaveMask			0x00000004	/* 2 */
#define kMbusLongMask				0x00000002	/* 1 */
#define kMbusEnMask					0x00000001	/* 0 */

/***** Register Equates (PoseidonModule.mbusControl2) *****/
#define kMbusDelayValMask			0xff000000	/* 31:24 */
#define kMbusBaudRateMask			0x00ff0000	/* 23:16 */

#define kMbusDelayValShift			24
#define kMbusBaudRateShift			16

/***** Register Equates (PoseidonModule.mbusDMAStartAddr) *****/
#define kMbusDmaStartAddrMask		0xfffffffc	/* 31:2 */
#define kMbusDmaStartAddrShift		2

/***** Register Equates (PoseidonModule.mbusDMALength) *****/
#define kMbusDmaLengthMask			0x000ffffc	/* 19:2 */
#define kMbusDmaLengthShift			2

/***** Register Equates (PoseidonModule.mbusDmaCount) *****/
#define kMbusDmaCountMask			0x000ffffc	/* 19:2 */
#define kMbusDmaCountShift			2

/***** Register Equates (PoseidonModule.mbusCommand) *****/
/***** Register Equates (PoseidonModule.mbusData) *****/


/***** Interrupt Module Equates *****/

#define interrupt1Clear interrupt1
#define interrupt2Clear interrupt2
#define interrupt3Clear interrupt3
#define interrupt4Clear interrupt4
#define interrupt5Clear interrupt5

#define PoseidonModule_interrupt1Clear PoseidonModule_interrupt1
#define PoseidonModule_interrupt2Clear PoseidonModule_interrupt2
#define PoseidonModule_interrupt3Clear PoseidonModule_interrupt3
#define PoseidonModule_interrupt4Clear PoseidonModule_interrupt4
#define PoseidonModule_interrupt5Clear PoseidonModule_interrupt5


/***** Interrupt Status, Enable & Clear Register 1 Equates (PoseidonModule.interrupt1) *****/
#define kIntVideoFrameMask			0x80000000	/* 31 */
#define kIntVideoDFMask				0x40000000	/* 30 */
#define kIntChiDmaHalfMask			0x20000000	/* 29 */
#define kIntChiDmaEndMask			0x10000000	/* 28 */
#define kIntChiDmaPtrIncrMask		0x08000000	/* 27 */
#define kIntChiReceiveAMask			0x04000000	/* 26 */
#define kIntChiReceiveBMask			0x02000000	/* 25 */
#define kIntChiClkMask				0x01000000	/* 24 */
#define kIntChiErrMask				0x00800000	/* 23 */
#define kIntSoundDmaHalfMask		0x00400000	/* 22 */
#define kIntSoundDmaEndMask			0x00200000	/* 21 */
#define kIntTelDmaHalfMask			0x00100000	/* 20 */
#define kIntTelDmaEndMask			0x00080000	/* 19 */
#define kIntSoundDmaPtrIncMask		0x00040000	/* 18 */
#define kIntTelDmaPtrIncMask		0x00020000	/* 17 */
#define kIntSoundLClipMask			0x00010000	/* 16 */
#define kIntSoundRClipMask			0x00008000	/* 15 */
#define kIntSoundValPosMask			0x00004000	/* 14 */
#define kIntSoundValNegMask			0x00002000	/* 13 */
#define kIntTelValPosMask			0x00001000	/* 12 */
#define kIntTelValNegMask			0x00000800	/* 11 */
#define kIntSoundReceiveMask		0x00000400	/* 10 */
#define kIntTeleReceiveMask			0x00000200	/* 9 */
#define kIntSibSubFrame0Mask		0x00000100	/* 8 */
#define kIntSibSubFrame1Mask		0x00000080	/* 7 */
#define kIntSibIrqPosMask			0x00000040	/* 6 */
#define kIntSibIrqNegMask			0x00000020	/* 5 */

/***** Interrupt Status, Enable & Clear Register 2 Equates (PoseidonModule.interrupt2) *****/
#define kIntUartAReceiveMask		0x80000000	/* 31 */
#define kIntUartARxOverRunMask		0x40000000	/* 30 */
#define kIntUartAFrameErrMask		0x20000000	/* 29 */
#define kIntUartABreakMask			0x10000000	/* 28 */
#define kIntUartAParityErrMask		0x08000000	/* 27 */
#define kIntUartATransmitMask		0x04000000	/* 26 */
#define kIntUartATxOverRunMask		0x02000000	/* 25 */
#define kIntUartAEmptyMask			0x01000000	/* 24 */
#define kIntUartADmaEndMask			0x00800000	/* 23 */
#define kIntUartADmaHalfMask		0x00400000	/* 22 */
#define kIntUartBReceiveMask		0x00200000	/* 21 */
#define kIntUartBRxOverRunMask		0x00100000	/* 20 */
#define kIntUartBFrameErrMask		0x00080000	/* 19 */
#define kIntUartBBreakMask			0x00040000	/* 18 */
#define kIntUartBParityErrMask		0x00020000	/* 17 */
#define kIntUartBTransmitMask		0x00010000	/* 16 */
#define kIntUartBTxOverRunMask		0x00008000	/* 15 */
#define kIntUartBEmptyMask			0x00004000	/* 14 */
#define kIntUartBDmaEndMask			0x00002000	/* 13 */
#define kIntUartBDmaHalfMask		0x00001000	/* 12 */
#define kIntMbusTransmitMask		0x00000800	/* 11 */
#define kIntMbusTxErrMask			0x00000400	/* 10 */
#define kIntMbusEmptyMask			0x00000200	/* 9 */
#define kIntMbusReceiveMask			0x00000100	/* 8 */
#define kIntMbusRxErrMask			0x00000080	/* 7 */
#define kIntMbusCmdDetectMask		0x00000040	/* 6 */
#define kIntMbusDmaEndMask			0x00000020	/* 5 */
#define kIntMbusDmaHalfMask			0x00000010	/* 4 */
#define kIntMbusPosMask				0x00000008	/* 3 */
#define kIntMbusNegMask				0x00000004	/* 2 */

/***** Interrupt Status, Enable & Clear Register 3 Equates (PoseidonModule.interrupt3) *****/
#define kIntMfio31PosMask			0x80000000	/* 31 */
#define kIntMfio30PosMask			0x40000000	/* 30 */
#define kIntMfio29PosMask			0x20000000	/* 29 */
#define kIntMfio28PosMask			0x10000000	/* 28 */
#define kIntMfio27PosMask			0x08000000	/* 27 */
#define kIntMfio26PosMask			0x04000000	/* 26 */
#define kIntMfio25PosMask			0x02000000	/* 25 */
#define kIntMfio24PosMask			0x01000000	/* 24 */
#define kIntMfio23PosMask			0x00800000	/* 23 */
#define kIntMfio22PosMask			0x00400000	/* 22 */
#define kIntMfio21PosMask			0x00200000	/* 21 */
#define kIntMfio20PosMask			0x00100000	/* 20 */
#define kIntMfio19PosMask			0x00080000	/* 19 */
#define kIntMfio18PosMask			0x00040000	/* 18 */
#define kIntMfio17PosMask			0x00020000	/* 17 */
#define kIntMfio16PosMask			0x00010000	/* 16 */
#define kIntMfio15PosMask			0x00008000	/* 15 */
#define kIntMfio14PosMask			0x00004000	/* 14 */
#define kIntMfio13PosMask			0x00002000	/* 13 */
#define kIntMfio12PosMask			0x00001000	/* 12 */
#define kIntMfio11PosMask			0x00000800	/* 11 */
#define kIntMfio10PosMask			0x00000400	/* 10 */
#define kIntMfio9PosMask			0x00000200	/* 9 */
#define kIntMfio8PosMask			0x00000100	/* 8 */
#define kIntMfio7PosMask			0x00000080	/* 7 */
#define kIntMfio6PosMask			0x00000040	/* 6 */
#define kIntMfio5PosMask			0x00000020	/* 5 */
#define kIntMfio4PosMask			0x00000010	/* 4 */
#define kIntMfio3PosMask			0x00000008	/* 3 */
#define kIntMfio2PosMask			0x00000004	/* 2 */
#define kIntMfio1PosMask			0x00000002	/* 1 */
#define kIntMfio0PosMask			0x00000001	/* 0 */

/***** Interrupt Status, Enable & Clear Register 4 Equates (PoseidonModule.interrupt4) *****/
#define kIntMfio31NegMask			0x80000000	/* 31 */
#define kIntMfio30NegMask			0x40000000	/* 30 */
#define kIntMfio29NegMask			0x20000000	/* 29 */
#define kIntMfio28NegMask			0x10000000	/* 28 */
#define kIntMfio27NegMask			0x08000000	/* 27 */
#define kIntMfio26NegMask			0x04000000	/* 26 */
#define kIntMfio25NegMask			0x02000000	/* 25 */
#define kIntMfio24NegMask			0x01000000	/* 24 */
#define kIntMfio23NegMask			0x00800000	/* 23 */
#define kIntMfio22NegMask			0x00400000	/* 22 */
#define kIntMfio21NegMask			0x00200000	/* 21 */
#define kIntMfio20NegMask			0x00100000	/* 20 */
#define kIntMfio19NegMask			0x00080000	/* 19 */
#define kIntMfio18NegMask			0x00040000	/* 18 */
#define kIntMfio17NegMask			0x00020000	/* 17 */
#define kIntMfio16NegMask			0x00010000	/* 16 */
#define kIntMfio15NegMask			0x00008000	/* 15 */
#define kIntMfio14NegMask			0x00004000	/* 14 */
#define kIntMfio13NegMask			0x00002000	/* 13 */
#define kIntMfio12NegMask			0x00001000	/* 12 */
#define kIntMfio11NegMask			0x00000800	/* 11 */
#define kIntMfio10NegMask			0x00000400	/* 10 */
#define kIntMfio9NegMask			0x00000200	/* 9 */
#define kIntMfio8NegMask			0x00000100	/* 8 */
#define kIntMfio7NegMask			0x00000080	/* 7 */
#define kIntMfio6NegMask			0x00000040	/* 6 */