📄 m104def.inc
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;**** EEPROM Control Register ****
.equ EERIE = 3 ; EECR
.equ EEMWE = 2
.equ EEWE = 1
.equ EERE = 0
;**** USART 0 and USART 1 ****
.equ RXC = 7 ; (UCSRA0/1)
.equ TXC = 6
.equ UDRE = 5
.equ FE = 4
.equ DOR = 3
.equ PE = 2 ; OBSOLETED!
.equ U2X = 1
.equ MPCM = 0
.equ RXC0 = 7 ; (UCSR0A)
.equ TXC0 = 6
.equ UDRE0 = 5
.equ FE0 = 4
.equ DOR0 = 3
.equ UPE0 = 2
.equ U2X0 = 1
.equ MPCM0 = 0
.equ RXC1 = 7 ; (UCSR1A)
.equ TXC1 = 6
.equ UDRE1 = 5
.equ FE1 = 4
.equ DOR1 = 3
.equ UPE1 = 2
.equ U2X1 = 1
.equ MPCM1 = 0
.equ RXCIE = 7 ; (UCSRB0/1)
.equ TXCIE = 6
.equ UDRIE = 5
.equ RXEN = 4
.equ TXEN = 3
.equ UCSZ2 = 2
.equ RXB8 = 1
.equ TXB8 = 0
.equ RXCIE0 = 7 ; (UCSR0B)
.equ TXCIE0 = 6
.equ UDRIE0 = 5
.equ RXEN0 = 4
.equ TXEN0 = 3
.equ UCSZ02 = 2
.equ RXB80 = 1
.equ TXB80 = 0
.equ RXCIE1 = 7 ; (UCSR1B)
.equ TXCIE1 = 6
.equ UDRIE1 = 5
.equ RXEN1 = 4
.equ TXEN1 = 3
.equ UCSZ12 = 2
.equ RXB81 = 1
.equ TXB81 = 0
.equ UMSEL = 6 ; (UCSRC0/1)
.equ UPM1 = 5
.equ UPM0 = 4
.equ USBS = 3
.equ UCSZ1 = 2
.equ UCSZ0 = 1
.equ UCPOL = 0
.equ UMSEL0 = 6 ; (UCSR0C)
.equ UPM01 = 5
.equ UPM00 = 4
.equ USBS0 = 3
.equ UCSZ01 = 2
.equ UCSZ00 = 1
.equ UCPOL0 = 0
.equ UMSEL1 = 6 ; (UCSR1C)
.equ UPM11 = 5
.equ UPM10 = 4
.equ USBS1 = 3
.equ UCSZ11 = 2
.equ UCSZ10 = 1
.equ UCPOL1 = 0
;**** SPI ****
.equ SPIE = 7 ; SPCR
.equ SPE = 6
.equ DORD = 5
.equ MSTR = 4
.equ CPOL = 3
.equ CPHA = 2
.equ SPR1 = 1
.equ SPR0 = 0
.equ SPIF = 7 ; SPSR
.equ WCOL = 6
.equ SPI2X = 0
;**** TWI ****
.equ TWINT = 7
.equ TWEA = 6
.equ TWSTA = 5
.equ TWSTO = 4
.equ TWWC = 3
.equ TWEN = 2
.equ TWIE = 0
.equ TWS7 = 7 ; TWSR
.equ TWS6 = 6
.equ TWS5 = 5
.equ TWS4 = 4
.equ TWS3 = 3
.equ TWGCE = 0 ; TWAR
;**** PORT A ****
.equ PA7 = 7 ; PORTA
.equ PA6 = 6
.equ PA5 = 5
.equ PA4 = 4
.equ PA3 = 3
.equ PA2 = 2
.equ PA1 = 1
.equ PA0 = 0
.equ PORTA7 = 7
.equ PORTA6 = 6
.equ PORTA5 = 5
.equ PORTA4 = 4
.equ PORTA3 = 3
.equ PORTA2 = 2
.equ PORTA1 = 1
.equ PORTA0 = 0
.equ DDA7 = 7 ; DDRA
.equ DDA6 = 6
.equ DDA5 = 5
.equ DDA4 = 4
.equ DDA3 = 3
.equ DDA2 = 2
.equ DDA1 = 1
.equ DDA0 = 0
.equ PINA7 = 7 ; PINA
.equ PINA6 = 6
.equ PINA5 = 5
.equ PINA4 = 4
.equ PINA3 = 3
.equ PINA2 = 2
.equ PINA1 = 1
.equ PINA0 = 0
;**** PORT B ****
.equ PB7 = 7 ; PORTB
.equ PB6 = 6
.equ PB5 = 5
.equ PB4 = 4
.equ PB3 = 3
.equ PB2 = 2
.equ PB1 = 1
.equ PB0 = 0
.equ PORTB7 = 7
.equ PORTB6 = 6
.equ PORTB5 = 5
.equ PORTB4 = 4
.equ PORTB3 = 3
.equ PORTB2 = 2
.equ PORTB1 = 1
.equ PORTB0 = 0
.equ DDB7 = 7 ; DDRB
.equ DDB6 = 6
.equ DDB5 = 5
.equ DDB4 = 4
.equ DDB3 = 3
.equ DDB2 = 2
.equ DDB1 = 1
.equ DDB0 = 0
.equ PINB7 = 7 ; PINB
.equ PINB6 = 6
.equ PINB5 = 5
.equ PINB4 = 4
.equ PINB3 = 3
.equ PINB2 = 2
.equ PINB1 = 1
.equ PINB0 = 0
;**** PORT C ****
.equ PC7 = 7 ; PORTC
.equ PC6 = 6
.equ PC5 = 5
.equ PC4 = 4
.equ PC3 = 3
.equ PC2 = 2
.equ PC1 = 1
.equ PC0 = 0
.equ PORTC7 = 7
.equ PORTC6 = 6
.equ PORTC5 = 5
.equ PORTC4 = 4
.equ PORTC3 = 3
.equ PORTC2 = 2
.equ PORTC1 = 1
.equ PORTC0 = 0
.equ DDC7 = 7 ; DDRC
.equ DDC6 = 6
.equ DDC5 = 5
.equ DDC4 = 4
.equ DDC3 = 3
.equ DDC2 = 2
.equ DDC1 = 1
.equ DDC0 = 0
.equ PINC7 = 7 ; PINC
.equ PINC6 = 6
.equ PINC5 = 5
.equ PINC4 = 4
.equ PINC3 = 3
.equ PINC2 = 2
.equ PINC1 = 1
.equ PINC0 = 0
;**** PORT D ****
.equ PD7 = 7 ; PORTD
.equ PD6 = 6
.equ PD5 = 5
.equ PD4 = 4
.equ PD3 = 3
.equ PD2 = 2
.equ PD1 = 1
.equ PD0 = 0
.equ PORTD7 = 7
.equ PORTD6 = 6
.equ PORTD5 = 5
.equ PORTD4 = 4
.equ PORTD3 = 3
.equ PORTD2 = 2
.equ PORTD1 = 1
.equ PORTD0 = 0
.equ DDD7 = 7 ; DDRD
.equ DDD6 = 6
.equ DDD5 = 5
.equ DDD4 = 4
.equ DDD3 = 3
.equ DDD2 = 2
.equ DDD1 = 1
.equ DDD0 = 0
.equ PIND7 = 7 ; PIND
.equ PIND6 = 6
.equ PIND5 = 5
.equ PIND4 = 4
.equ PIND3 = 3
.equ PIND2 = 2
.equ PIND1 = 1
.equ PIND0 = 0
;**** PORT E ****
.equ PE7 = 7 ; PORTE
.equ PE6 = 6
.equ PE5 = 5
.equ PE4 = 4
.equ PE3 = 3
.equ PE2 = 2
.equ PE1 = 1
.equ PE0 = 0
.equ PORTE7 = 7 ; PORTE
.equ PORTE6 = 6
.equ PORTE5 = 5
.equ PORTE4 = 4
.equ PORTE3 = 3
.equ PORTE2 = 2
.equ PORTE1 = 1
.equ PORTE0 = 0
.equ DDE7 = 7 ; DDRE
.equ DDE6 = 6
.equ DDE5 = 5
.equ DDE4 = 4
.equ DDE3 = 3
.equ DDE2 = 2
.equ DDE1 = 1
.equ DDE0 = 0
.equ PINE7 = 7 ; PINE
.equ PINE6 = 6
.equ PINE5 = 5
.equ PINE4 = 4
.equ PINE3 = 3
.equ PINE2 = 2
.equ PINE1 = 1
.equ PINE0 = 0
;**** PORT F ****
.equ PF7 = 7 ; PORTF
.equ PF6 = 6
.equ PF5 = 5
.equ PF4 = 4
.equ PF3 = 3
.equ PF2 = 2
.equ PF1 = 1
.equ PF0 = 0
.equ PORTF7 = 7
.equ PORTF6 = 6
.equ PORTF5 = 5
.equ PORTF4 = 4
.equ PORTF3 = 3
.equ PORTF2 = 2
.equ PORTF1 = 1
.equ PORTF0 = 0
.equ DDF7 = 7 ; DDRF
.equ DDF6 = 6
.equ DDF5 = 5
.equ DDF4 = 4
.equ DDF3 = 3
.equ DDF2 = 2
.equ DDF1 = 1
.equ DDF0 = 0
.equ PINF7 = 7 ; PINF
.equ PINF6 = 6
.equ PINF5 = 5
.equ PINF4 = 4
.equ PINF3 = 3
.equ PINF2 = 2
.equ PINF1 = 1
.equ PINF0 = 0
;**** PORT G ****
.equ PG4 = 4 ; PORTG
.equ PG3 = 3
.equ PG2 = 2
.equ PG1 = 1
.equ PG0 = 0
.equ DDG4 = 4 ; DDRG
.equ DDG3 = 3
.equ DDG2 = 2
.equ DDG1 = 1
.equ DDG0 = 0
.equ PING4 = 4 ; PING
.equ PING3 = 3
.equ PING2 = 2
.equ PING1 = 1
.equ PING0 = 0
;*****************************************************************************
; CPU Register Declarations
;*****************************************************************************
.def XL = r26 ; X pointer low
.def XH = r27 ; X pointer high
.def YL = r28 ; Y pointer low
.def YH = r29 ; Y pointer high
.def ZL = r30 ; Z pointer low
.def ZH = r31 ; Z pointer high
;*****************************************************************************
; Data Memory Declarations
;*****************************************************************************
.equ RAMEND = $10ff ; Highest internal data memory (SRAM) address.
.equ EEPROMEND = $0fff ; Highest EEPROM address.
;*****************************************************************************
; Program Memory Declarations
;*****************************************************************************
.equ FLASHEND = $FFFF ; Highest program memory (flash) address
; (When addressed as 16 bit words)
;**** Boot Vectors ****
; byte groups
; /--\/--\/--\/--\
.equ SMALLBOOTSTART = 0b1111111000000000 ; ($FE00) Smallest boot block is 512W
.equ SECONDBOOTSTART = 0b1111110000000000 ; ($FC00) 2'nd boot block size is 1KW
.equ THIRDBOOTSTART = 0b1111100000000000 ; ($F800) Third boot block size is 2KW
.equ LARGEBOOTSTART = 0b1111000000000000 ; ($F000) Largest boot block is 4KW
;**** Page Size ****
.equ PAGESIZE = 128 ; Number of WORDS in a page
;**** Interrupt Vectors ****
.equ INT0addr = $002 ; External Interrupt0 Vector Address
.equ INT1addr = $004 ; External Interrupt1 Vector Address
.equ INT2addr = $006 ; External Interrupt2 Vector Address
.equ INT3addr = $008 ; External Interrupt3 Vector Address
.equ INT4addr = $00a ; External Interrupt4 Vector Address
.equ INT5addr = $00c ; External Interrupt5 Vector Address
.equ INT6addr = $00e ; External Interrupt6 Vector Address
.equ INT7addr = $010 ; External Interrupt7 Vector Address
.equ OC2addr = $012 ; Output Compare2 Interrupt Vector Address
.equ OVF2addr = $014 ; Overflow2 Interrupt Vector Address
.equ ICP1addr = $016 ; Input Capture1 Interrupt Vector Address
.equ OC1Aaddr = $018 ; Output Compare1A Interrupt Vector Address
.equ OC1Baddr = $01a ; Output Compare1B Interrupt Vector Address
.equ OVF1addr = $01c ; Overflow1 Interrupt Vector Address
.equ OC0addr = $01e ; Output Compare0 Interrupt Vector Address
.equ OVF0addr = $020 ; Overflow0 Interrupt Vector Address
.equ SPIaddr = $022 ; SPI Interrupt Vector Address
.equ URXC0addr = $024 ; USART0 Receive Complete Interrupt Vector Address
.equ UDRE0addr = $026 ; USART0 Data Register Empty Interrupt Vector Address
.equ UTXC0addr = $028 ; USART0 Transmit Complete Interrupt Vector Address
.equ ADCCaddr = $02a ; ADC Conversion Complete Handle
.equ ERDYaddr = $02c ; EEPROM Write Complete Handle
.equ ACIaddr = $02e ; Analog Comparator Interrupt Vector Address
.equ OC1Caddr = $030 ; Output Compare1C Interrupt Vector Address
.equ ICP3addr = $032 ; Input Capture3 Interrupt Vector Address
.equ OC3Aaddr = $034 ; Output Compare3A Interrupt Vector Address
.equ OC3Baddr = $036 ; Output Compare3B Interrupt Vector Address
.equ OC3Caddr = $038 ; Output Compare3C Interrupt Vector Address
.equ OVF3addr = $03A ; Overflow3 Interrupt Vector Address
.equ URXC1addr = $03C ; USART1 Receive Complete Interrupt Vector Address
.equ UDRE1addr = $03E ; USART1 Data Register Empty Interrupt Vector Address
.equ UTXC1addr = $040 ; USART1 Transmit Complete Interrupt Vector Address
.equ TWIaddr = $042 ; TWI Interrupt Vector Address
.equ SPMRaddr = $044 ; Store Program Memory Ready Interrupt Vector Address
;**** End of File ****
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