📄 p18f258.inc
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; P18F258.INC Standard Header File, Version 1.10 Microchip Technology, Inc.
NOLIST
; This header file defines configurations, registers, and other useful bits of
; information for the PIC18F258 microcontroller. These names are taken to match
; the data sheets as closely as possible.
; Note that the processor must be selected before this file is
; included. The processor may be selected the following ways:
; 1. Command line switch:
; C:\ MPASM MYFILE.ASM /PIC18F258
; 2. LIST directive in the source file
; LIST P=PIC18F258
; 3. Processor Type entry in the MPASM full-screen interface
; 4. Setting the processor in the MPLAB Project Dialog
;==========================================================================
;
; Revision History
;
;==========================================================================
;Rev: Date: Details: Who:
;0.90 15 May 2001 Preliminary Release dzb
;0.99 29 June2001 Rev 1 dzb
;1.00 29 Oct.2001 Corrections & Additions cjh
;1.10 25 Jun 2002 Addec CFGS as EECON1 bit 6 name pas
;==========================================================================
;
; Verify Processor
;
;==========================================================================
IFNDEF __18F258
MESSG "Processor-header file mismatch. Verify selected processor."
ENDIF
;==========================================================================
; 18Fxxx Family EQUates
;==========================================================================
FSR0 EQU 0
FSR1 EQU 1
FSR2 EQU 2
FAST EQU 1
W EQU 0
A EQU 0
ACCESS EQU 0
BANKED EQU 1
;==========================================================================
; 16Cxxx/17Cxxx Substitutions
;==========================================================================
#define DDRA TRISA ; PIC17Cxxx SFR substitution
#define DDRB TRISB ; PIC17Cxxx SFR substitution
#define DDRC TRISC ; PIC17Cxxx SFR substitution
#define DDRD TRISD ; PIC17Cxxx SFR substitution
#define DDRE TRISE ; PIC17Cxxx SFR substitution
;==========================================================================
;
; Register Definitions
;
;==========================================================================
;----- Register Files -----------------------------------------------------
TOSU EQU H'0FFF'
TOSH EQU H'0FFE'
TOSL EQU H'0FFD'
STKPTR EQU H'0FFC'
PCLATU EQU H'0FFB'
PCLATH EQU H'0FFA'
PCL EQU H'0FF9'
TBLPTRU EQU H'0FF8'
TBLPTRH EQU H'0FF7'
TBLPTRL EQU H'0FF6'
TABLAT EQU H'0FF5'
PRODH EQU H'0FF4'
PRODL EQU H'0FF3'
INTCON EQU H'0FF2'
INTCON1 EQU H'0FF2'
INTCON2 EQU H'0FF1'
INTCON3 EQU H'0FF0'
INDF0 EQU H'0FEF'
POSTINC0 EQU H'0FEE'
POSTDEC0 EQU H'0FED'
PREINC0 EQU H'0FEC'
PLUSW0 EQU H'0FEB'
FSR0H EQU H'0FEA'
FSR0L EQU H'0FE9'
WREG EQU H'0FE8'
INDF1 EQU H'0FE7'
POSTINC1 EQU H'0FE6'
POSTDEC1 EQU H'0FE5'
PREINC1 EQU H'0FE4'
PLUSW1 EQU H'0FE3'
FSR1H EQU H'0FE2'
FSR1L EQU H'0FE1'
BSR EQU H'0FE0'
INDF2 EQU H'0FDF'
POSTINC2 EQU H'0FDE'
POSTDEC2 EQU H'0FDD'
PREINC2 EQU H'0FDC'
PLUSW2 EQU H'0FDB'
FSR2H EQU H'0FDA'
FSR2L EQU H'0FD9'
STATUS EQU H'0FD8'
TMR0H EQU H'0FD7'
TMR0L EQU H'0FD6'
T0CON EQU H'0FD5'
;RESERVED_0FD4 EQU H'0FD4'
OSCCON EQU H'0FD3'
LVDCON EQU H'0FD2'
WDTCON EQU H'0FD1'
RCON EQU H'0FD0'
TMR1H EQU H'0FCF'
TMR1L EQU H'0FCE'
T1CON EQU H'0FCD'
TMR2 EQU H'0FCC'
PR2 EQU H'0FCB'
T2CON EQU H'0FCA'
SSPBUF EQU H'0FC9'
SSPADD EQU H'0FC8'
SSPSTAT EQU H'0FC7'
SSPCON1 EQU H'0FC6'
SSPCON2 EQU H'0FC5'
ADRESH EQU H'0FC4'
ADRESL EQU H'0FC3'
ADCON0 EQU H'0FC2'
ADCON1 EQU H'0FC1'
CCPR1H EQU H'0FBF'
CCPR1L EQU H'0FBE'
CCP1CON EQU H'0FBD'
ECCPR1H EQU H'0FBC'
ECCPR1L EQU H'0FBB'
ECCP1CON EQU H'0FBA'
ECCP1DEL EQU H'0FB7'
ECCPAS EQU H'0FB6'
CVRCON EQU H'0FB5'
CMCON EQU H'0FB4'
TMR3H EQU H'0FB3'
TMR3L EQU H'0FB2'
T3CON EQU H'0FB1'
PSPCON EQU H'0FB0'
SPBRG EQU H'0FAF'
RCREG EQU H'0FAE'
TXREG EQU H'0FAD'
TXSTA EQU H'0FAC'
RCSTA EQU H'0FAB'
EEADR EQU H'0FA9'
EEDATA EQU H'0FA8'
EECON2 EQU H'0FA7'
EECON1 EQU H'0FA6'
IPR3 EQU H'0FA5'
PIR3 EQU H'0FA4'
PIE3 EQU H'0FA3'
IPR2 EQU H'0FA2'
PIR2 EQU H'0FA1'
PIE2 EQU H'0FA0'
IPR1 EQU H'0F9F'
PIR1 EQU H'0F9E'
PIE1 EQU H'0F9D'
TRISC EQU H'0F94'
TRISB EQU H'0F93'
TRISA EQU H'0F92'
LATC EQU H'0F8B'
LATB EQU H'0F8A'
LATA EQU H'0F89'
PORTC EQU H'0F82'
PORTB EQU H'0F81'
PORTA EQU H'0F80'
TXERRCNT EQU H'0F76'
RXERRCNT EQU H'0F75'
COMSTAT EQU H'0F74'
CIOCON EQU H'0F73'
BRGCON3 EQU H'0F72'
BRGCON2 EQU H'0F71'
BRGCON1 EQU H'0F70'
CANCON EQU H'0F6F'
CANSTAT EQU H'0F6E'
RXB0D7 EQU H'0F6D'
RXB0D6 EQU H'0F6C'
RXB0D5 EQU H'0F6B'
RXB0D4 EQU H'0F6A'
RXB0D3 EQU H'0F69'
RXB0D2 EQU H'0F68'
RXB0D1 EQU H'0F67'
RXB0D0 EQU H'0F66'
RXB0DLC EQU H'0F65'
RXB0EIDL EQU H'0F64'
RXB0EIDH EQU H'0F63'
RXB0SIDL EQU H'0F62'
RXB0SIDH EQU H'0F61'
RXB0CON EQU H'0F60'
CANSTATRO1 EQU H'0F5E'
RXB1D7 EQU H'0F5D'
RXB1D6 EQU H'0F5C'
RXB1D5 EQU H'0F5B'
RXB1D4 EQU H'0F5A'
RXB1D3 EQU H'0F59'
RXB1D2 EQU H'0F58'
RXB1D1 EQU H'0F57'
RXB1D0 EQU H'0F56'
RXB1DLC EQU H'0F55'
RXB1EIDL EQU H'0F54'
RXB1EIDH EQU H'0F53'
RXB1SIDL EQU H'0F52'
RXB1SIDH EQU H'0F51'
RXB1CON EQU H'0F50'
CANSTATRO2 EQU H'0F4E'
TXB0D7 EQU H'0F4D'
TXB0D6 EQU H'0F4C'
TXB0D5 EQU H'0F4B'
TXB0D4 EQU H'0F4A'
TXB0D3 EQU H'0F49'
TXB0D2 EQU H'0F48'
TXB0D1 EQU H'0F47'
TXB0D0 EQU H'0F46'
TXB0DLC EQU H'0F45'
TXB0EIDL EQU H'0F44'
TXB0EIDH EQU H'0F43'
TXB0SIDL EQU H'0F42'
TXB0SIDH EQU H'0F41'
TXB0CON EQU H'0F40'
CANSTATRO3 EQU H'0F3E'
TXB1D7 EQU H'0F3D'
TXB1D6 EQU H'0F3C'
TXB1D5 EQU H'0F3B'
TXB1D4 EQU H'0F3A'
TXB1D3 EQU H'0F39'
TXB1D2 EQU H'0F38'
TXB1D1 EQU H'0F37'
TXB1D0 EQU H'0F36'
TXB1DLC EQU H'0F35'
TXB1EIDL EQU H'0F34'
TXB1EIDH EQU H'0F33'
TXB1SIDL EQU H'0F32'
TXB1SIDH EQU H'0F31'
TXB1CON EQU H'0F30'
CANSTATRO4 EQU H'0F2E'
TXB2D7 EQU H'0F2D'
TXB2D6 EQU H'0F2C'
TXB2D5 EQU H'0F2B'
TXB2D4 EQU H'0F2A'
TXB2D3 EQU H'0F29'
TXB2D2 EQU H'0F28'
TXB2D1 EQU H'0F27'
TXB2D0 EQU H'0F26'
TXB2DLC EQU H'0F25'
TXB2EIDL EQU H'0F24'
TXB2EIDH EQU H'0F23'
TXB2SIDL EQU H'0F22'
TXB2SIDH EQU H'0F21'
TXB2CON EQU H'0F20'
RXM1EIDL EQU H'0F1F'
RXM1EIDH EQU H'0F1E'
RXM1SIDL EQU H'0F1D'
RXM1SIDH EQU H'0F1C'
RXM0EIDL EQU H'0F1B'
RXM0EIDH EQU H'0F1A'
RXM0SIDL EQU H'0F19'
RXM0SIDH EQU H'0F18'
RXF5EIDL EQU H'0F17'
RXF5EIDH EQU H'0F16'
RXF5SIDL EQU H'0F15'
RXF5SIDH EQU H'0F14'
RXF4EIDL EQU H'0F13'
RXF4EIDH EQU H'0F12'
RXF4SIDL EQU H'0F11'
RXF4SIDH EQU H'0F10'
RXF3EIDL EQU H'0F0F'
RXF3EIDH EQU H'0F0E'
RXF3SIDL EQU H'0F0D'
RXF3SIDH EQU H'0F0C'
RXF2EIDL EQU H'0F0B'
RXF2EIDH EQU H'0F0A'
RXF2SIDL EQU H'0F09'
RXF2SIDH EQU H'0F08'
RXF1EIDL EQU H'0F07'
RXF1EIDH EQU H'0F06'
RXF1SIDL EQU H'0F05'
RXF1SIDH EQU H'0F04'
RXF0EIDL EQU H'0F03'
RXF0EIDH EQU H'0F02'
RXF0SIDL EQU H'0F01'
RXF0SIDH EQU H'0F00'
;----- STKPTR Bits --------------------------------------------------------
STKFUL EQU H'0007'
STKUNF EQU H'0006'
SP4 EQU H'0004'
SP3 EQU H'0003'
SP2 EQU H'0002'
SP1 EQU H'0001'
SP0 EQU H'0000'
;----- INTCON Bits --------------------------------------------------------
GIE EQU H'0007'
GIEH EQU H'0007'
PEIE EQU H'0006'
GIEL EQU H'0006'
TMR0IE EQU H'0005'
T0IE EQU H'0005' ; For backward compatibility
INT0IE EQU H'0004'
INT0E EQU H'0004' ; For backward compatibility
RBIE EQU H'0003'
TMR0IF EQU H'0002'
T0IF EQU H'0002' ; For backward compatibility
INT0IF EQU H'0001'
INT0F EQU H'0001' ; For backward compatibility
RBIF EQU H'0000'
;----- INTCON2 Bits --------------------------------------------------------
NOT_RBPU EQU H'0007'
RBPU EQU H'0007'
INTEDG0 EQU H'0006'
INTEDG1 EQU H'0005'
TMR0IP EQU H'0002'
T0IP EQU H'0002' ; For compatibility with T0IE and T0IF
RBIP EQU H'0000'
;----- INTCON3 Bits --------------------------------------------------------
INT2IP EQU H'0007'
INT2P EQU H'0007'
INT1IP EQU H'0006'
INT1P EQU H'0006'
INT2IE EQU H'0004'
INT2E EQU H'0004'
INT1IE EQU H'0003'
INT1E EQU H'0003'
INT2IF EQU H'0001'
INT2F EQU H'0001'
INT1IF EQU H'0000'
INT1F EQU H'0000'
;----- STATUS Bits --------------------------------------------------------
N EQU H'0004'
OV EQU H'0003'
Z EQU H'0002'
DC EQU H'0001'
C EQU H'0000'
;----- T0CON Bits ---------------------------------------------------------
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