📄 sd_defs.h
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/***********************************************/
/* Divisor for baud-rate generation - DLL (R/W)*/
/***********************************************/
#define DLL_OFFSET 0x00
#define OSC_12M_OFFSET 0x4C /* Division factor offset */
#define OSC_12M_SEL 0x01 /* Selects 6.5 division factor. */
/***************************************/
/* Enable UART Clock and Peripherals */
/***************************************/
#define EPLD_PWR_CNTRL 0x08000005
#define EPLD_PWR_UART2 0x40 /* Turn-on power to UART 2 through the
EPLD (FPGA memory-mapped registers) */
#define EPLD_PWR_BT_MOD 0x10 /* Make sure BT Module is Off */
#define EPLD_PWR_UART1 0x20 /* Turn-on power to UART 1 through the
EPLD (FPGA memory-mapped registers) */
#define MPU_CLOCK_BASE 0xFFFECE00 /* Clock Base of MPU reg */
#define MPU_IDLECT2_OFFSET 0x08 /* Idle Mode Entry 2 Offset */
#define MPU_EN_XORPCK 0x0002 /* Enables clock of OS timer connected
to MPU TIPB */
#define MPU_EN_PERCK 0x0004 /* Enable peripheral clock */
#define MPU_RSTCT2_OFFSET 0x14 /* Reset Control 2 Offset */
#define MPU_RSTCT2_PER_EN 0x0001 /* Enable UART clock, make sure to release
peripheral reset */
#define ILR_BASE_2 0xFFFE0000 /* Base address of 2nd Interrupt Level Register(ILR)*/
#define ILR_CONTROL_OFFSET 0x18 /* Control offset of ILR */
/* Determine the clock source of UART1 and UART2 */
#define FUNC_MUX_CTRL_0 0xFFFE1000 /* Base configuration register */
#define MOD_CONF_CTRL_0 0x80 /* Module Configuration Control 0 Offset */
#define UART_CLOCK_SET 0x60000000 /* Determin the clock source of UART1 and UART2 */
/* These use generic type names, leaving off the register name
in the macro, because they are used by generic sections of
code which will not require changes for other UARTS. Only the
bits these correspond to should change. */
/* UART Line Control Register Bits */
#define SD_PARITY_NONE LCR_PARITY_DISABLE
#define SD_PARITY_EVEN LCR_PARITY_EVEN
#define SD_PARITY_ODD LCR_PARITY_ODD
#define SD_DATA_BITS_5 LCR_5_BIT_WORD
#define SD_DATA_BITS_6 LCR_6_BIT_WORD
#define SD_DATA_BITS_7 LCR_7_BIT_WORD
#define SD_DATA_BITS_8 LCR_8_BIT_WORD
#define SD_STOP_BITS_1 LCR_STOP_BIT_1
#define SD_STOP_BITS_2 LCR_STOP_BIT_2
#define SD_MODE_NORMAL MCR_NORMAL_MODE
#define SD_MODE_AUTO_ECHO MCR_NOT_USED
#define SD_MODE_LOCAL_LOOP MCR_LOOP_BACK
#define SD_MODE_REMOTE_LOOP MCR_NOT_USED
/* Define default Serial Driver settings for this board */
#define DEFAULT_UART_PORT UART1
#define DEFAULT_PPP_BAUD 57600
#define DEFAULT_UART_BAUD 115200
#define DEFAULT_UART_DATA DATA_BITS_8
#define DEFAULT_UART_STOP STOP_BITS_1
#define DEFAULT_UART_PARITY PARITY_NONE
#define DEFAULT_UART_MODE MODE_NORMAL
#define DEFAULT_UART_BUFFER 100
/* Define data structures for management of a serial port. */
typedef struct SD_INIT_STRUCT
{
UINT32 data_mode;
UINT32 base_address;
/* The following elements should generic accross other
platforms. */
NU_SEMAPHORE *sd_semaphore;
UINT32 com_port;
UINT32 data_bits;
UINT32 stop_bits;
UINT32 parity;
UINT32 baud_rate;
UINT32 vector;
UINT32 driver_options;
UINT32 sd_buffer_size;
UINT32 parity_errors;
UINT32 frame_errors;
UINT32 overrun_errors;
UINT32 busy_errors;
UINT32 general_errors;
CHAR *rx_buffer;
INT rx_buffer_read;
INT rx_buffer_write;
volatile INT rx_buffer_status;
/* All of the following elements are required by PPP, do not modify. */
UINT32 communication_mode;
CHAR *tx_buffer;
INT tx_buffer_read;
INT tx_buffer_write;
volatile INT tx_buffer_status;
} SD_PORT;
/* Defines to be used by application */
#define MODE_NORMAL SD_MODE_NORMAL
#define MODE_AUTO_ECHO SD_MODE_AUTO_ECHO
#define MODE_LOCAL_LOOP SD_MODE_LOCAL_LOOP
#define MODE_REMOTE_LOOP SD_MODE_REMOTE_LOOP
#define STOP_BITS_1 SD_STOP_BITS_1
#define STOP_BITS_2 SD_STOP_BITS_2
#define UART1 SD_UART1
#define UART2 SD_UART2
/* Defines to determine communication mode */
#define SERIAL_MODE 0
#define SERIAL_MOUSE 3
/* MDM_NETWORK and MDM_TERMINAL do not need to be defined here
since they are defined in PPP. */
/***********************************************************************
Note: everything below should be genric.
*/
#define NU_SERIAL_PORT SD_PORT
#define PARITY_NONE SD_PARITY_NONE
#define PARITY_EVEN SD_PARITY_EVEN
#define PARITY_ODD SD_PARITY_ODD
#define DATA_BITS_6 SD_DATA_BITS_6
#define DATA_BITS_7 SD_DATA_BITS_7
#define DATA_BITS_8 SD_DATA_BITS_8
#define NU_SD_Put_Char SDC_Put_Char
#define NU_SD_Get_Char SDC_Get_Char
#define NU_SD_Put_String SDC_Put_String
#define NU_SD_Init_Port SDC_Init_Port
#define NU_SD_Data_Ready SDC_Data_Ready
#define NU_UART_SUCCESS 0
#define NU_INVALID_PARITY -1
#define NU_INVALID_DATA_BITS -2
#define NU_INVALID_STOP_BITS -3
#define NU_INVALID_BAUD -4
#define NU_INVALID_COM_PORT -5
#define NU_INVALID_DATA_MODE -6
#define NU_UART_LIST_FULL -7
#define NU_INVALID_MOUSE_MODE -8
#define NU_BUFFER_FULL 1
#define NU_BUFFER_DATA 2
#define NU_BUFFER_EMPTY 3
/* Deifine IO macros. */
/* 8 bit access */
#define SD_OUTBYTE(reg, data) ( (*( (UINT8 *) (reg) ) ) = (UINT8) (data) )
#define SD_INBYTE(reg) ( *( (UINT8 *) (reg) ) )
/* 16 bit access */
#define SD_OUTWORD(reg, data) ( (*( (UINT16 *) (reg) ) ) = (data) )
#define SD_INWORD(reg) ( *( (UINT16 *) (reg) ) )
/* 32 bit access */
#define SD_OUTDWORD(reg, data) ( (*( (UINT32 *) (reg) ) ) = (data) )
#define SD_INDWORD(reg) ( *( (UINT32 *) (reg) ) )
/*Macro used for converting URT to SD_PORT. This is for PPP serial driver
backwards compatability. */
#define URT_LAYER SD_PORT
#define URT_TX_BUFFER_SIZE uart->sd_buffer_size
#define URT_Get_Char SDC_Get_Char
#define URT_Put_Char SDC_Put_Char
#define URT_Reset SDC_Reset
#define URT_Change_Communication_Mode SDC_Change_Communication_Mode
#define URT_Carrier SDC_Carrier
#endif /* ifndef SD_DEFS_H */
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