mx2_def.h

飞思卡尔的mx21处理器的pwm驱动程序源码

/*
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 * Copyright (C) 2002 Freescale Semiconductors HK Ltd
 *
 */

/******************************************************************************

 C   H E A D E R   F I L E

 (c) Copyright Freescale Semiconductors Hong Kong Limited 2001-2002
 ALL RIGHTS RESERVED

*******************************************************************************

 Project Name : DBMX2 System Test Program
 Project No.  :
 Title        :
 Template Ver : 0.3
 File Name    : MX2_def.h
 Date of Creations:  Mar 6, 2004
 Last Modified: 

 Description  : Definition header for DBMX2 silicon. Original from Definition header for DBMX1

 Assumptions  : NA

 Dependency Comments : NA

 Project Specific Data : NA

******************************************************************************/
#ifndef MX1_DEF_INC
#define MX1_DEF_INC

/*************************** Header File Includes ****************************/
/********************************* Constants *********************************/
/******************************** Enumeration ********************************/
/****************************** Basic Data types *****************************/
/************************* Structure/Union Data types ************************/
/********************************** Macros ***********************************/
#define MX2ADS_IO_IOBASE                0xE4000000
#define IO_ADDRESS(x)           (((x)-0x10000000)+MX2ADS_IO_IOBASE)             //This Macro only for map register space to 0xe4000000; 
#define MX2_IO_ADDRESS IO_ADDRESS


#define CRM_BASE_ADDR   0x10027000
/* Changed for TO2, May 20, 2004 */
//#define _reg_CRM_PCCR1  (*((volatile unsigned long *)(MX2_IO_ADDRESS(CRM_BASE_ADDR+0x20))))  //  32bit Perpheral Clk Control Reg 1
#define _reg_CRM_PCCR1  (*((volatile unsigned long *)(MX2_IO_ADDRESS(CRM_BASE_ADDR+0x24))))  //  32bit Perpheral Clk Control Reg 1


//#########################################             
//# GPIO                                  #             
//# $1001_5000 to $1001_5FFF              #             
//#########################################
#define GPIOA   0
#define GPIOB   1
#define GPIOC   2
#define GPIOD   3
#define GPIOE   4
#define GPIOF   5

// Use as GPIO_BASE_ADDR(GPIOA)- GPIO_BASE_ADDR(GPIOF)
#define GPIO_BASE_ADDR(x)       (0x10015000+x*0x100)
        
#define _reg_GPIO_DDIR(x)       (*((volatile unsigned long *)(MX2_IO_ADDRESS(GPIO_BASE_ADDR(x)+0x00))))  //  32bit gpio pta data direction reg
#define _reg_GPIO_OCR1(x)       (*((volatile unsigned long *)(MX2_IO_ADDRESS(GPIO_BASE_ADDR(x)+0x04))))  //  32bit gpio pta output config 1 reg
#define _reg_GPIO_OCR2(x)       (*((volatile unsigned long *)(MX2_IO_ADDRESS(GPIO_BASE_ADDR(x)+0x08))))  //  32bit gpio pta output config 2 reg
#define _reg_GPIO_ICONFA1(x)    (*((volatile unsigned long *)(MX2_IO_ADDRESS(GPIO_BASE_ADDR(x)+0x0C))))  //  32bit gpio pta input config A1 reg
#define _reg_GPIO_ICONFA2(x)    (*((volatile unsigned long *)(MX2_IO_ADDRESS(GPIO_BASE_ADDR(x)+0x10))))  //  32bit gpio pta input config A2 reg
#define _reg_GPIO_ICONFB1(x)    (*((volatile unsigned long *)(MX2_IO_ADDRESS(GPIO_BASE_ADDR(x)+0x14))))  //  32bit gpio pta input config B1 reg
#define _reg_GPIO_ICONFB2(x)    (*((volatile unsigned long *)(MX2_IO_ADDRESS(GPIO_BASE_ADDR(x)+0x18))))  //  32bit gpio pta input config B2 reg
#define _reg_GPIO_DR(x)         (*((volatile unsigned long *)(MX2_IO_ADDRESS(GPIO_BASE_ADDR(x)+0x1C))))  //  32bit gpio pta data reg
#define _reg_GPIO_GIUS(x)       (*((volatile unsigned long *)(MX2_IO_ADDRESS(GPIO_BASE_ADDR(x)+0x20))))  //  32bit gpio pta in use reg
#define _reg_GPIO_SSR(x)        (*((volatile unsigned long *)(MX2_IO_ADDRESS(GPIO_BASE_ADDR(x)+0x24))))  //  32bit gpio pta sample status reg
#define _reg_GPIO_ICR1(x)       (*((volatile unsigned long *)(MX2_IO_ADDRESS(GPIO_BASE_ADDR(x)+0x28))))  //  32bit gpio pta interrupt ctrl 1 reg
#define _reg_GPIO_ICR2(x)       (*((volatile unsigned long *)(MX2_IO_ADDRESS(GPIO_BASE_ADDR(x)+0x2C))))  //  32bit gpio pta interrupt ctrl 2 reg
#define _reg_GPIO_IMR(x)        (*((volatile unsigned long *)(MX2_IO_ADDRESS(GPIO_BASE_ADDR(x)+0x30))))  //  32bit gpio pta interrupt mask reg
#define _reg_GPIO_ISR(x)        (*((volatile unsigned long *)(MX2_IO_ADDRESS(GPIO_BASE_ADDR(x)+0x34))))  //  32bit gpio pta interrupt status reg
#define _reg_GPIO_GPR(x)        (*((volatile unsigned long *)(MX2_IO_ADDRESS(GPIO_BASE_ADDR(x)+0x38))))  //  32bit gpio pta general purpose reg
#define _reg_GPIO_SWR(x)        (*((volatile unsigned long *)(MX2_IO_ADDRESS(GPIO_BASE_ADDR(x)+0x3C))))  //  32bit gpio pta software reset reg
#define _reg_GPIO_PUEN(x)       (*((volatile unsigned long *)(MX2_IO_ADDRESS(GPIO_BASE_ADDR(x)+0x40))))  //  32bit gpio pta pull up enable reg



//#########################################             
//# PWM                                   #             
//# $1000_6000 to $1000_6FFF              #             
//#########################################             
#define PWM_BASE_ADDR   0x10006000      
#define _reg_PWM_PWMC                   (*((volatile unsigned long *)(MX2_IO_ADDRESS(PWM_BASE_ADDR+0x00))))     //  32bit pwm control reg
#define _reg_PWM_PWMS                   (*((volatile unsigned long *)(MX2_IO_ADDRESS(PWM_BASE_ADDR+0x04))))     //  32bit pwm sample reg
#define _reg_PWM_PWMP                   (*((volatile unsigned long *)(MX2_IO_ADDRESS(PWM_BASE_ADDR+0x08))))     //  32bit pwm period reg
#define _reg_PWM_PWMCNT                 (*((volatile unsigned long *)(MX2_IO_ADDRESS(PWM_BASE_ADDR+0x0C))))     //  32bit pwm counter reg
#define _reg_PWM_PWMTEST1               (*((volatile unsigned long *)(MX2_IO_ADDRESS(PWM_BASE_ADDR+0x10))))     //  32bit pwm test reg

#endif