📄 port.c
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/*
FreeRTOS V3.2.0 - Copyright (C) 2003 - 2005 Richard Barry.
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
FreeRTOS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with FreeRTOS; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
A special exception to the GPL can be applied should you wish to distribute
a combined work that includes FreeRTOS, without being obliged to provide
the source code for any proprietary components. See the licensing section
of http://www.FreeRTOS.org for full details of how and when the exception
can be applied.
***************************************************************************
See http://www.FreeRTOS.org for documentation, latest information, license
and contact details. Please ensure to read the configuration and relevant
port sections of the online documentation.
***************************************************************************
*/
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
/*-----------------------------------------------------------
* Implementation of functions defined in portable.h for the HC(S)08 port.
*----------------------------------------------------------*/
/*
* Configure a timer to generate the RTOS tick at the frequency specified
* within FreeRTOSConfig.h.
*/
static void prvSetupTimerInterrupt( void );
/* Manual context switch function. This is the SWI ISR. */
void interrupt vPortYield( void );
/* Calls to portENTER_CRITICAL() can be nested. When they are nested the
critical section should not be left (i.e. interrupts should not be re-enabled)
until the nesting depth reaches 0. This variable simply tracks the nesting
depth. Each task maintains it's own critical nesting depth variable so
uxCriticalNesting is saved and restored from the task stack during a context
switch. */
volatile unsigned portBASE_TYPE uxCriticalNesting = 0xff;
/*-----------------------------------------------------------*/
/*
* See header file for description.
*/
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{
/*
Place a few bytes of known values on the bottom of the stack.
This can be uncommented to provide useful stack markers when debugging.
*pxTopOfStack = ( portSTACK_TYPE ) 0x11;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x22;
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) 0x33;
pxTopOfStack--;
*/
/* Setup the initial stack of the task. The stack is set exactly as
expected by the portRESTORE_CONTEXT() macro. In this case the stack as
expected by the HC(S)08 RTI instruction. */
#if defined(__HCS08__)
/* Set PC -> The address of the task function is placed in the stack byte at a time. */
*pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pxCode) ) + 1 );
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pxCode) ) + 0 );
pxTopOfStack--;
/* Next are all the registers that form part of the task context. */
/* Set X register */
*pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pvParameters) ) + 1 );
pxTopOfStack--;
/* A register contains parameter high byte. */
*pxTopOfStack = 0x00;
pxTopOfStack--;
/* CCR: Note that when the task starts interrupts will be enabled since
"I" bit of CCR is cleared */
*pxTopOfStack = ( portSTACK_TYPE ) 0x00;
pxTopOfStack--;
/* Finally the critical nesting depth is initialised with 0 (not within
a critical section). */
*pxTopOfStack = ( portSTACK_TYPE ) 0x00;
pxTopOfStack--;
/* Not quite finished yet, H register follows! */
*pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pvParameters) ) + 0);
#else
/* Set PC -> The address of the task function is placed in the stack byte at a time. */
*pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pxCode) ) + 1 );
pxTopOfStack--;
*pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pxCode) ) + 0 );
pxTopOfStack--;
/* Next are all the registers that form part of the task context. */
/* Set X register */
*pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pvParameters) ) + 0 );
pxTopOfStack--;
/* A register contains parameter high byte. */
*pxTopOfStack = ( portSTACK_TYPE ) *( ((portSTACK_TYPE *) (&pvParameters) ) + 1 );
pxTopOfStack--;
/* CCR: Note that when the task starts interrupts will be enabled since
"I" bit of CCR is cleared */
*pxTopOfStack = ( portSTACK_TYPE ) 0x00;
pxTopOfStack--;
/* Finally the critical nesting depth is initialised with 0 (not within
a critical section). */
*pxTopOfStack = ( portSTACK_TYPE ) 0x00;
pxTopOfStack--;
/* Not quite finished yet, H register follows! */
*pxTopOfStack = ( portSTACK_TYPE ) 0x00;
#endif
return pxTopOfStack;
}
/*-----------------------------------------------------------*/
void vPortEndScheduler( void )
{
/* This function is not implemented for the HC(S)08 port. */
}
/*-----------------------------------------------------------*/
static void prvSetupTimerInterrupt( void )
{
(void) TickTimer_SetFreqHz( configTICK_RATE_HZ );
(void) TickTimer_Enable();
}
/*-----------------------------------------------------------*/
portBASE_TYPE xPortStartScheduler( void )
{
/* Configure the timer that will generate the RTOS tick. Interrupts are
disabled when this function is called. */
prvSetupTimerInterrupt();
/* Restore the context of the first task. */
portRESTORE_CONTEXT();
/* Simulate the end of an interrupt to start the scheduler off. */
__asm( "rti" );
/* Should not get here! */
return pdFALSE;
}
/*-----------------------------------------------------------*/
/*
* Context switch functions. These are both interrupt service routines.
*/
/*
* Manual context switch forced by calling portYIELD(). This is the SWI
* handler.
*/
#pragma TRAP_PROC SAVE_NO_REGS /* The compiler by default saves the H register in an ISR,
this #pragma disables this behaviour */
void interrupt 1 vPortYield( void )
{
portSAVE_CONTEXT();
vTaskSwitchContext();
portRESTORE_CONTEXT();
}
/*-----------------------------------------------------------*/
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