📄 main.lss
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a1e: d9 2e mov r13, r25
a20: 00 e0 ldi r16, 0x00 ; 0
a22: 10 e0 ldi r17, 0x00 ; 0
a24: fe 2c mov r15, r14
{ uart_puts_P("Sensor# ");
a26: 8d e7 ldi r24, 0x7D ; 125
a28: 93 e0 ldi r25, 0x03 ; 3
a2a: 0e 94 94 0b call 0x1728
uart_puti((int) i+1);
a2e: c8 01 movw r24, r16
a30: 01 96 adiw r24, 0x01 ; 1
a32: 0e 94 a6 0b call 0x174c
uart_puts_P(" = ");
a36: 86 e8 ldi r24, 0x86 ; 134
a38: 93 e0 ldi r25, 0x03 ; 3
a3a: 0e 94 94 0b call 0x1728
if ( DS18X20_read_meas( &gSensorIDs[i][0], &subzero, &cel, &cel_frac_bits) == DS18X20_OK )
a3e: 9e 01 movw r18, r28
a40: 26 5f subi r18, 0xF6 ; 246
a42: 3f 4f sbci r19, 0xFF ; 255
a44: ae 01 movw r20, r28
a46: 45 5f subi r20, 0xF5 ; 245
a48: 5f 4f sbci r21, 0xFF ; 255
a4a: be 01 movw r22, r28
a4c: 64 5f subi r22, 0xF4 ; 244
a4e: 7f 4f sbci r23, 0xFF ; 255
a50: c6 01 movw r24, r12
a52: 0e 94 94 09 call 0x1328
a56: 88 23 and r24, r24
a58: 31 f4 brne .+12 ; 0xa66
{ uart_put_temp(subzero, cel, cel_frac_bits);
a5a: 4a 85 ldd r20, Y+10 ; 0x0a
a5c: 6b 85 ldd r22, Y+11 ; 0x0b
a5e: 8c 85 ldd r24, Y+12 ; 0x0c
a60: 0e 94 10 03 call 0x620
a64: 04 c0 rjmp .+8 ; 0xa6e
}
else uart_puts_P("CRC Error (lost connection?)");
a66: 8a e8 ldi r24, 0x8A ; 138
a68: 93 e0 ldi r25, 0x03 ; 3
a6a: 0e 94 94 0b call 0x1728
uart_puts_P("\r");
a6e: 87 ea ldi r24, 0xA7 ; 167
a70: 93 e0 ldi r25, 0x03 ; 3
a72: 0e 94 94 0b call 0x1728
a76: fa 94 dec r15
a78: 0f 5f subi r16, 0xFF ; 255
a7a: 1f 4f sbci r17, 0xFF ; 255
a7c: 88 e0 ldi r24, 0x08 ; 8
a7e: 90 e0 ldi r25, 0x00 ; 0
a80: c8 0e add r12, r24
a82: d9 1e adc r13, r25
a84: ff 20 and r15, r15
a86: 79 f6 brne .-98 ; 0xa26
a88: 04 c0 rjmp .+8 ; 0xa92
}
}
else uart_puts_P("Start meas. failed (short circuit?)");
a8a: 89 ea ldi r24, 0xA9 ; 169
a8c: 93 e0 ldi r25, 0x03 ; 3
a8e: 0e 94 94 0b call 0x1728
#ifdef DS18X20_VERBOSE
// all devices:
uart_puts_P( "\rVerbose output\r" );
a92: 8d ec ldi r24, 0xCD ; 205
a94: 93 e0 ldi r25, 0x03 ; 3
a96: 0e 94 94 0b call 0x1728
DS18X20_start_meas( DS18X20_POWER_PARASITE, NULL );
a9a: 60 e0 ldi r22, 0x00 ; 0
a9c: 70 e0 ldi r23, 0x00 ; 0
a9e: 80 e0 ldi r24, 0x00 ; 0
aa0: 0e 94 74 09 call 0x12e8
delay_ms(DS18B20_TCONV_12BIT);
aa4: 66 e4 ldi r22, 0x46 ; 70
aa6: 71 e4 ldi r23, 0x41 ; 65
aa8: 8f e0 ldi r24, 0x0F ; 15
aaa: 90 e0 ldi r25, 0x00 ; 0
aac: 0e 94 b3 06 call 0xd66
DS18X20_read_meas_all_verbose();
ab0: 0e 94 00 08 call 0x1000
#endif
delay_ms(3000);
ab4: 68 e1 ldi r22, 0x18 ; 24
ab6: 75 e0 ldi r23, 0x05 ; 5
ab8: 8d e3 ldi r24, 0x3D ; 61
aba: 90 e0 ldi r25, 0x00 ; 0
abc: 0e 94 b3 06 call 0xd66
ac0: 4c cf rjmp .-360 ; 0x95a
00000ac2 <ow_reset>:
uint8_t ow_reset(void)
{ uint8_t err;
uint8_t sreg;
OW_OUT_LOW(); // disable internal pull-up (maybe on from parasite)
ac2: e0 91 d7 00 lds r30, 0x00D7
ac6: f0 91 d8 00 lds r31, 0x00D8
aca: 90 91 d9 00 lds r25, 0x00D9
ace: 90 95 com r25
ad0: 80 81 ld r24, Z
ad2: 89 23 and r24, r25
ad4: 80 83 st Z, r24
OW_DIR_OUT(); // pull OW-Pin low for 480us
ad6: e0 91 dc 00 lds r30, 0x00DC
ada: f0 91 dd 00 lds r31, 0x00DD
ade: 80 81 ld r24, Z
ae0: 90 91 d9 00 lds r25, 0x00D9
ae4: 89 2b or r24, r25
ae6: 80 83 st Z, r24
/* delay function for microsec
4 cpu cycles per loop + 1 cycles(?) overhead
when a constant is passed. */
static inline void delayloop16(uint16_t count)
{ asm volatile ( "cp %A0,__zero_reg__ \n\t" \
ae8: 8f eb ldi r24, 0xBF ; 191
aea: 93 e0 ldi r25, 0x03 ; 3
aec: 81 15 cp r24, r1
aee: 91 05 cpc r25, r1
af0: 11 f0 breq .+4 ; 0xaf6
00000af2 <L_LOOP_23>:
af2: 01 97 sbiw r24, 0x01 ; 1
af4: f1 f7 brne .-4 ; 0xaf2
00000af6 <L_Exit_23>:
delay_us(480);
sreg=SREG;
af6: 3f b7 in r19, 0x3f ; 63
cli();
af8: f8 94 cli
// set Pin as input - wait for clients to pull low
OW_DIR_IN(); // input
afa: e0 91 dc 00 lds r30, 0x00DC
afe: f0 91 dd 00 lds r31, 0x00DD
b02: 90 91 d9 00 lds r25, 0x00D9
b06: 90 95 com r25
b08: 80 81 ld r24, Z
b0a: 89 23 and r24, r25
b0c: 80 83 st Z, r24
/* delay function for microsec
4 cpu cycles per loop + 1 cycles(?) overhead
when a constant is passed. */
static inline void delayloop16(uint16_t count)
{ asm volatile ( "cp %A0,__zero_reg__ \n\t" \
b0e: 83 e8 ldi r24, 0x83 ; 131
b10: 90 e0 ldi r25, 0x00 ; 0
b12: 81 15 cp r24, r1
b14: 91 05 cpc r25, r1
b16: 11 f0 breq .+4 ; 0xb1c
00000b18 <L_LOOP_42>:
b18: 01 97 sbiw r24, 0x01 ; 1
b1a: f1 f7 brne .-4 ; 0xb18
00000b1c <L_Exit_42>:
delay_us(66);
err = OW_GET_IN(); // no presence detect
b1c: e0 91 da 00 lds r30, 0x00DA
b20: f0 91 db 00 lds r31, 0x00DB
b24: 40 81 ld r20, Z
b26: 20 91 d9 00 lds r18, 0x00D9
b2a: 42 23 and r20, r18
// nobody pulled to low, still high
SREG=sreg; // sei()
b2c: 3f bf out 0x3f, r19 ; 63
/* delay function for microsec
4 cpu cycles per loop + 1 cycles(?) overhead
when a constant is passed. */
static inline void delayloop16(uint16_t count)
{ asm volatile ( "cp %A0,__zero_reg__ \n\t" \
b2e: 8b e3 ldi r24, 0x3B ; 59
b30: 93 e0 ldi r25, 0x03 ; 3
b32: 81 15 cp r24, r1
b34: 91 05 cpc r25, r1
b36: 11 f0 breq .+4 ; 0xb3c
00000b38 <L_LOOP_57>:
b38: 01 97 sbiw r24, 0x01 ; 1
b3a: f1 f7 brne .-4 ; 0xb38
00000b3c <L_Exit_57>:
// after a delay the clients should release the line
// and input-pin gets back to high due to pull-up-resistor
delay_us(480-66);
if( OW_GET_IN() == 0 ) // short circuit
b3c: 80 81 ld r24, Z
b3e: 82 23 and r24, r18
b40: 09 f4 brne .+2 ; 0xb44
err = 1;
b42: 41 e0 ldi r20, 0x01 ; 1
return err;
}
b44: 84 2f mov r24, r20
b46: 99 27 eor r25, r25
b48: 08 95 ret
00000b4a <ow_set_bus>:
b4a: 50 93 dd 00 sts 0x00DD, r21
b4e: 40 93 dc 00 sts 0x00DC, r20
b52: 70 93 d8 00 sts 0x00D8, r23
b56: 60 93 d7 00 sts 0x00D7, r22
b5a: 90 93 db 00 sts 0x00DB, r25
b5e: 80 93 da 00 sts 0x00DA, r24
b62: 81 e0 ldi r24, 0x01 ; 1
b64: 90 e0 ldi r25, 0x00 ; 0
b66: 02 c0 rjmp .+4 ; 0xb6c
b68: 88 0f add r24, r24
b6a: 99 1f adc r25, r25
b6c: 2a 95 dec r18
b6e: e2 f7 brpl .-8 ; 0xb68
b70: 80 93 d9 00 sts 0x00D9, r24
b74: 0e 94 61 05 call 0xac2
b78: 08 95 ret
00000b7a <ow_input_pin_state>:
b7a: e0 91 da 00 lds r30, 0x00DA
b7e: f0 91 db 00 lds r31, 0x00DB
b82: 80 81 ld r24, Z
b84: 90 91 d9 00 lds r25, 0x00D9
b88: 89 23 and r24, r25
b8a: 99 27 eor r25, r25
b8c: 08 95 ret
00000b8e <ow_parasite_enable>:
b8e: e0 91 d7 00 lds r30, 0x00D7
b92: f0 91 d8 00 lds r31, 0x00D8
b96: 80 81 ld r24, Z
b98: 90 91 d9 00 lds r25, 0x00D9
b9c: 89 2b or r24, r25
b9e: 80 83 st Z, r24
ba0: e0 91 dc 00 lds r30, 0x00DC
ba4: f0 91 dd 00 lds r31, 0x00DD
ba8: 80 81 ld r24, Z
baa: 90 91 d9 00 lds r25, 0x00D9
bae: 89 2b or r24, r25
bb0: 80 83 st Z, r24
bb2: 08 95 ret
00000bb4 <ow_parasite_disable>:
bb4: e0 91 d7 00 lds r30, 0x00D7
bb8: f0 91 d8 00 lds r31, 0x00D8
bbc: 90 91 d9 00 lds r25, 0x00D9
bc0: 90 95 com r25
bc2: 80 81 ld r24, Z
bc4: 89 23 and r24, r25
bc6: 80 83 st Z, r24
bc8: e0 91 dc 00 lds r30, 0x00DC
bcc: f0 91 dd 00 lds r31, 0x00DD
bd0: 90 91 d9 00 lds r25, 0x00D9
bd4: 90 95 com r25
bd6: 80 81 ld r24, Z
bd8: 89 23 and r24, r25
bda: 80 83 st Z, r24
bdc: 08 95 ret
00000bde <ow_bit_io>:
/* Timing issue when using runtime-bus-selection (!OW_ONE_BUS):
The master should sample at the end of the 15-slot after initiating
the read-time-slot. The variable bus-settings need more
cycles than the constant ones so the delays had to be shortened
to achive a 15uS overall delay
Setting/clearing a bit in I/O Register needs 1 cyle in OW_ONE_BUS
but around 14 cyles in configureable bus (us-Delay is 4 cyles per uS) */
uint8_t ow_bit_io( uint8_t b )
{ uint8_t sreg;
bde: 38 2f mov r19, r24
sreg=SREG;
be0: 4f b7 in r20, 0x3f ; 63
cli();
be2: f8 94 cli
OW_DIR_OUT(); // drive bus low
be4: e0 91 dc 00 lds r30, 0x00DC
be8: f0 91 dd 00 lds r31, 0x00DD
bec: 80 81 ld r24, Z
bee: 90 91 d9 00 lds r25, 0x00D9
bf2: 89 2b or r24, r25
bf4: 80 83 st Z, r24
/* delay function for microsec
4 cpu cycles per loop + 1 cycles(?) overhead
when a constant is passed. */
static inline void delayloop16(uint16_t count)
{ asm volatile ( "cp %A0,__zero_reg__ \n\t" \
bf6: 81 e0 ldi r24, 0x01 ; 1
bf8: 90 e0 ldi r25, 0x00 ; 0
bfa: 81 15 cp r24, r1
bfc: 91 05 cpc r25, r1
bfe: 11 f0 breq .+4 ; 0xc04
00000c00 <L_LOOP_155>:
c00: 01 97 sbiw r24, 0x01 ; 1
c02: f1 f7 brne .-4 ; 0xc00
00000c04 <L_Exit_155>:
delay_us(1); // Recovery-Time wuffwuff was 1
if ( b ) OW_DIR_IN(); // if bit is 1 set bus high (by ext. pull-up)
c04: 33 23 and r19, r19
c06: 51 f0 breq .+20 ; 0xc1c
c08: e0 91 dc 00 lds r30, 0x00DC
c0c: f0 91 dd 00 lds r31, 0x00DD
c10: 90 91 d9 00 lds r25, 0x00D9
c14: 90 95 com r25
c16: 80 81 ld r24, Z
c18: 89 23 and r24, r25
c1a: 80 83 st Z, r24
/* delay function for microsec
4 cpu cycles per loop + 1 cycles(?) overhead
when a constant is passed. */
static inline void delayloop16(uint16_t count)
{ asm volatile ( "cp %A0,__zero_reg__ \n\t" \
c1c: 89 e1 ldi r24, 0x19 ; 25
c1e: 90 e0 ldi r25, 0x00 ; 0
c20: 81 15 cp r24, r1
c22: 91 05 cpc r25, r1
c24: 11 f0 breq .+4 ; 0xc2a
00000c26 <L_LOOP_175>:
c26: 01 97 sbiw r24, 0x01 ; 1
c28: f1 f7 brne .-4 ; 0xc26
00000c2a <L_Exit_175>:
// wuffwuff delay was 15uS-1 see comment above
delay_us(15-1-OW_CONF_DELAYOFFSET);
if( OW_GET_IN() == 0 ) b = 0; // sample at end of read-timeslot
c2a: e0 91 da 00 lds r30, 0x00DA
c2e: f0 91 db 00 lds r31, 0x00DB
c32: e0 81 ld r30, Z
c34: 20 91 d9 00 lds r18, 0x00D9
c38: e2 23 and r30, r18
c3a: 09 f4 brne .+2 ; 0xc3e
c3c: 3e 2f mov r19, r30
/* delay function for microsec
4 cpu cycles per loop + 1 cycles(?) overhead
when a constant is passed. */
static inline void delayloop16(uint16_t count)
{ asm volatile ( "cp %A0,__zero_reg__ \n\t" \
c3e: 89 e5 ldi r24, 0x59 ; 89
c40: 90 e0 ldi r25, 0x00 ; 0
c42: 81 15 cp r24, r1
c44: 91 05 cpc r25, r1
c46: 11 f0 breq .+4 ; 0xc4c
00000c48 <L_LOOP_194>:
c48: 01 97 sbiw r24, 0x01 ; 1
c4a: f1 f7 brne .-4 ; 0xc48
00000c4c <L_Exit_194>:
delay_us(60-15);
OW_DIR_IN();
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