crt0.s

来自「IBM PowerPC 405 在DiabData开发环境下的ucosII移植代」· S 代码 · 共 815 行 · 第 1/3 页

Ready:
        addi    r7, r3, -4              # r7-> dest addr (sub 4 to start)
        addi    r5, r5, -4              # r5-> src addr (sub 4 to start)
        mtctr   r8                      # CTR: # instrs (words) to move
#
Loop:
        lwzu    r0, 4(r5)
        stwu    r0, 4(r7)
        bc      0x10, 0, Loop

        blr                             # All done!
#
        .align  2
#
TC.VECTORS:
        .long   0                       # dummy entry!
        .long   VT_INTR
#
        .text
#
#************************************************************************
#      VT_INTR: Interrupt exception vector                              *
#                                                                       *
#      NOTE(S): It is necessary to save SRR0 and SRR1 in the vector's   *
#       "register save area" before extending the stack and storing     *
#       them there, because accessing the stack might cause a TLB miss  *
#       exception, which will change SRR0 and SRR1.                     *
#                                                                       *
#************************************************************************
VT_INTR:
#------------------------------------------------------------------------
# Set r31 to point to the beginning of this vector.  In order to do this*
# it is necessary to first save the current values of LR and r31 in     *
# SPRG2 and SPRG3 respectively.                                         *
#------------------------------------------------------------------------
        mtspr   SPRG3, r31              # SPRG3: saved value of r31
        mflr    r31
        mtspr   SPRG2, r31              # SPRG2: saved value of LR
 
        bl      1f                      # LR: current IP
1:
        mflr    r31                     # r31: current IP
        rlwinm  r31, r31, 0, 0, 23      # r31->beginning of vector
#
#------------------------------------------------------------------------
# Store values of r30 and SRR0 & SRR1 in the vector's save area
#------------------------------------------------------------------------
        stw     r30, V_SAVE_AREA+8(r31) # save r30
#
        mfsrr0  r30
        stw     r30, V_SAVE_AREA+36(r31)# Save SRR0
        mfsrr1  r30
        stw     r30, V_SAVE_AREA+40(r31)# Save SRR1

#------------------------------------------------------------------------
# Create a stack frame and put r29-r31, LR, CR, SRR0 and SRR1 on it.    *
#------------------------------------------------------------------------
        stwu    sp,  SC_STK_FRAME(sp)   # Allocate a stack frame
        stw     r29, SC_STK_R29(sp)     # Save r29

        lwz     r29, V_SAVE_AREA+8(r31) # 
        stw     r29, SC_STK_R30(sp)     # Save r30

        mfspr   r29, SPRG3
        stw     r29, SC_STK_R31(sp)     # Save r31

        lwz     r29, V_SAVE_AREA+36(r31)    
        stw     r29, SC_STK_SRR0(sp)    # Save SRR0

        mfspr   r29, SPRG2
        stw     r29, SC_STK_LR(sp)      # Save LR
        lwz     r30, V_SAVE_AREA+40(r31)
        stw     r30, SC_STK_SRR1(sp)    # Save SRR1
        mfcr    r29                     # r29: CR
        stw     r29, SC_STK_CR(sp)      # Save CR
		mfxer	r29						# r29: XER
		stw		r29, SC_STK_XER(sp)		# save XER
		mfctr	r29						# r29: CTR
		stw		r29, SC_STK_CTR(sp)		# save CTR
		
#
#------------------------------------------------------------------------
# SRR0 & SRR1 are now saved, so exceptions can be re-enabled now if     *
# need be.                                                              *
# Pick up "enable_mask" value and "or" it with the MSR, thus re-enabling*
# desired exceptions.                                                   *
#                                                                       *
# The value of MSR_IR and MSR_DR will be restored to the values         *
# prior to the exception.                                               *
#------------------------------------------------------------------------
        lis     r29, (MSR_IR|MSR_DR)@ha # restore MSR_IR & MSR_DR
        addi    r29, r29, (MSR_IR|MSR_DR)@l     # restore MSR_IR & MSR_DR
        and     r30, r30, r29           # restore MSR_IR & MSR_DR
        mfmsr   r29                     # r29: MSR
        or      r29, r29, r30           # 
#
        lwz     r30, V_ENABLE_MASK(r31)
        or      r29, r30, r29           # r29: MSR | V_ENABLE_MASK
        mtmsr   r29                     # store new MSR
        isync
#
#------------------------------------------------------------------------
# Finish filling in the stack frame: save CR and format/offset word.    *
# Then transfer control to the specified handler.                       *
#------------------------------------------------------------------------
        oris    r30, r31, 2             # r30: format (2) & vect offset
        lwz     r29, V_HANDLER(r31)     # r29-> handler
        stw     r30, SC_STK_VECTOR(sp)  # Save format/offset word
        mtlr    r29                     # LR-> handler
        blr                             # jump to handler


#Vector information. Vectors are 256 bytes long.
    V_CODE          =   0
    V_ENDCODE       =   184
    V_ENABLE_MASK   =   192
    V_HANDLER       =   196
    V_SAVE_AREA     =   200
    SC_STK_FRAME    =   -184
    SC_STK_LINK     =   0x00
    SC_STK_R0       =   (SC_STK_LINK + 16)
    SC_STK_R1       =   (SC_STK_R0 + 4)
    SC_STK_R2       =   (SC_STK_R1 + 4)
    SC_STK_R3       =   (SC_STK_R2 + 4)
    SC_STK_R4       =   (SC_STK_R3 + 4)
    SC_STK_R5       =   (SC_STK_R4 + 4)
    SC_STK_R6       =   (SC_STK_R5 + 4)
    SC_STK_R7       =   (SC_STK_R6 + 4)
    SC_STK_R8       =   (SC_STK_R7 + 4)
    SC_STK_R9       =   (SC_STK_R8 + 4)
    SC_STK_R10      =   (SC_STK_R9 + 4)
    SC_STK_R11      =   (SC_STK_R10 + 4)
    SC_STK_R12      =   (SC_STK_R11 + 4)
    SC_STK_R13      =   (SC_STK_R12 + 4)
    SC_STK_R14      =   (SC_STK_R13 + 4)
    SC_STK_R15      =   (SC_STK_R14 + 4)
    SC_STK_R16      =   (SC_STK_R15 + 4)
    SC_STK_R17      =   (SC_STK_R16 + 4)
    SC_STK_R18      =   (SC_STK_R17 + 4)
    SC_STK_R19      =   (SC_STK_R18 + 4)
    SC_STK_R20      =   (SC_STK_R19 + 4)
    SC_STK_R21      =   (SC_STK_R20 + 4)
    SC_STK_R22      =   (SC_STK_R21 + 4)
    SC_STK_R23      =   (SC_STK_R22 + 4)
    SC_STK_R24      =   (SC_STK_R23 + 4)
    SC_STK_R25      =   (SC_STK_R24 + 4)
    SC_STK_R26      =   (SC_STK_R25 + 4)
    SC_STK_R27      =   (SC_STK_R26 + 4)
    SC_STK_R28      =   (SC_STK_R27 + 4)
    SC_STK_R29      =   (SC_STK_R28 + 4)
    SC_STK_R30      =   (SC_STK_R29 + 4)
    SC_STK_R31      =   (SC_STK_R30 + 4)
    SC_STK_CR       =   (SC_STK_R31 + 4)
    SC_STK_MQ       =   (SC_STK_CR + 4)
    SC_STK_XER      =   (SC_STK_MQ + 4)
    SC_STK_LR       =   (SC_STK_XER + 4)
    SC_STK_CTR      =   (SC_STK_LR + 4)
    SC_STK_SRR0     =   (SC_STK_CTR + 4)
    SC_STK_SRR1     =   (SC_STK_SRR0 + 4)
    SC_STK_SRR2     =   (SC_STK_SRR1 + 4)
    SC_STK_SRR3     =   (SC_STK_SRR2 + 4)
    SC_STK_VECTOR       =   (SC_STK_SRR3 + 4)

# The stack pointer register.
    sp  =   r1

        .align 2
        .globl  interrupt_save_registers

interrupt_save_registers:
#------------------------------------------------------------------------
# r1,r29-31 already saved in vector code and have been changed          *
#------------------------------------------------------------------------
        stw     r0 , SC_STK_R0(sp)
        stw     r2 , SC_STK_R2(sp)
        stw     r3 , SC_STK_R3(sp)
        stw     r4 , SC_STK_R4(sp)
        stw     r5 , SC_STK_R5(sp)
        stw     r6 , SC_STK_R6(sp)
        stw     r7 , SC_STK_R7(sp)
        stw     r8 , SC_STK_R8(sp)
        stw     r9 , SC_STK_R9(sp)
        stw     r10, SC_STK_R10(sp)
        stw     r11, SC_STK_R11(sp)
        stw     r12, SC_STK_R12(sp)
        stw     r13, SC_STK_R13(sp)
        stw     r14, SC_STK_R14(sp)
        stw     r15, SC_STK_R15(sp)
        stw     r16, SC_STK_R16(sp)
        stw     r17, SC_STK_R17(sp)
        stw     r18, SC_STK_R18(sp)
        stw     r19, SC_STK_R19(sp)
        stw     r20, SC_STK_R20(sp)
        stw     r21, SC_STK_R21(sp)
        stw     r22, SC_STK_R22(sp)
        stw     r23, SC_STK_R23(sp)
        stw     r24, SC_STK_R24(sp)
        stw     r25, SC_STK_R25(sp)
        stw     r26, SC_STK_R26(sp)
        stw     r27, SC_STK_R27(sp)
        stw     r28, SC_STK_R28(sp)
        isync
        blr


        .align 2
        .globl  interrupt_restore_registers
#
interrupt_restore_registers:


        lwz     r0 , SC_STK_R0(sp)
        lwz     r2 , SC_STK_R2(sp)
        lwz     r3 , SC_STK_R3(sp)
        lwz     r4 , SC_STK_R4(sp)
        lwz     r5 , SC_STK_R5(sp)
        lwz     r6 , SC_STK_R6(sp)
        lwz     r7 , SC_STK_R7(sp)
        lwz     r8 , SC_STK_R8(sp)
        lwz     r9 , SC_STK_R9(sp)
        lwz     r10, SC_STK_R10(sp)
        lwz     r11, SC_STK_R11(sp)
        lwz     r12, SC_STK_R12(sp)
        lwz     r13, SC_STK_R13(sp)
        lwz     r14, SC_STK_R14(sp)
        lwz     r15, SC_STK_R15(sp)
        lwz     r16, SC_STK_R16(sp)
        lwz     r17, SC_STK_R17(sp)
        lwz     r18, SC_STK_R18(sp)
        lwz     r19, SC_STK_R19(sp)
        lwz     r20, SC_STK_R20(sp)
        lwz     r21, SC_STK_R21(sp)
        lwz     r22, SC_STK_R22(sp)
        lwz     r23, SC_STK_R23(sp)
        lwz     r24, SC_STK_R24(sp)
        lwz     r25, SC_STK_R25(sp)
        lwz     r26, SC_STK_R26(sp)
        lwz     r27, SC_STK_R27(sp)
        lwz     r28, SC_STK_R28(sp)
        lwz     r29, SC_STK_R29(sp)
        lwz     r30, SC_STK_R30(sp)

#************************************************************************
#       Use r31 as a swap reg to reload the SRR0, SRR1, CR, LR, then r31*
#************************************************************************
        lwz     r31,SC_STK_SRR0(sp)
        mtsrr0  r31

        lwz     r31,SC_STK_SRR1(sp)
        mtsrr1  r31

        lwz     r31,SC_STK_CR(sp)
        mtcr    r31

        lwz     r31,SC_STK_CTR(sp)
        mtctr   r31

        lwz     r31,SC_STK_XER(sp)
        mtxer   r31

        lwz     r31,SC_STK_LR(sp)
        mtlr    r31

        lwz     r31, SC_STK_R31(sp)

        subi    sp, sp, SC_STK_FRAME    # dealloc the stack frame

        isync
        rfi