📄 ppclib.s
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#-----------------------------------------------------------------------------+## This source code has been made available to you by IBM on an AS-IS# basis. Anyone receiving this source is licensed under IBM# copyrights to use it in any way he or she deems fit, including# copying it, modifying it, compiling it, and redistributing it either# with or without modifications. No license under IBM patents or# patent applications is to be implied by the copyright license.## Any user of this software should understand that IBM cannot provide# technical support for this software and will not be responsible for# any consequences resulting from the use of this software.## Any person who transfers this source code or any derivative work# must include the IBM copyright notice, this paragraph, and the# preceding two paragraphs in the transferred software.## COPYRIGHT I B M CORPORATION 1995# LICENSED MATERIAL - PROGRAM PROPERTY OF I B M#-----------------------------------------------------------------------------#-------------------------------------------------------------------------------## File Name: ppclib.s## Function: PowerPC Book 1 architected instructions ##------------------------------------------------------------------------------- .include "p405.inc" .include "board.inc"#-------------------------------------------------------------------------------# Function: ppcAbend# Description: Execute an invalid op code, causing a Program Check Interrupt# Input: none# Output: none#------------------------------------------------------------------------------- .text .align 2 .globl ppcAbendppcAbend: .long 0 .type ppcAbend,@function .size ppcAbend,.-ppcAbend#-------------------------------------------------------------------------------# Function: ppcAndMsr# Description: AND With Machine State Register (MSR)# Input: r3 = value to AND with MSR# Output: r3 = old MSR contents#------------------------------------------------------------------------------- .text .align 2 .globl ppcAndMsrppcAndMsr: mfmsr r6 and r7,r6,r3 mtmsr r7 ori r3,r6,0x000 blr .type ppcAndMsr,@function .size ppcAndMsr,.-ppcAndMsr#-------------------------------------------------------------------------------# Function: ppcCntlzw# Description: Count Leading Zeros# Input: r3 = input value# Output: r3 = number of leading zeroes in the input value#------------------------------------------------------------------------------- .text .align 2 .globl ppcCntlzwppcCntlzw: cntlzw r3,r3 blr .type ppcCntlzw,@function .size ppcCntlzw,.-ppcCntlzw#-------------------------------------------------------------------------------# Function: ppcDcbi# Description: Data Cache block Invalidate# Input: r3 = effective address# Output: none.#------------------------------------------------------------------------------- .text .align 2 .globl ppcDcbippcDcbi: dcbi r0,r3 blr .type ppcDcbi,@function .size ppcDcbi,.-ppcDcbi#-------------------------------------------------------------------------------# Function: ppcDcbf# Description: Data Cache block flush# Input: r3 = effective address# Output: none.#------------------------------------------------------------------------------- .text .align 2 .globl ppcDcbfppcDcbf: dcbf r0,r3 blr .type ppcDcbf,@function .size ppcDcbf,.-ppcDcbf#-------------------------------------------------------------------------------# Function: ppcDcbst# Description: Data Cache block Store# Input: r3 = effective address# Output: none.#------------------------------------------------------------------------------- .text .align 2 .globl ppcDcbstppcDcbst: dcbst r0,r3 blr .type ppcDcbst,@function .size ppcDcbst,.-ppcDcbst#-------------------------------------------------------------------------------# Function: ppcDcbz# Description: Data Cache Block set to Zero# Input: r3 = effective address# Output: none.#-------------------------------------------------------------------------------#ifndef PASS1_405GP .text .align 2 .globl ppcDcbzppcDcbz: dcbz r0,r3 blr .type ppcDcbz,@function .size ppcDcbz,.-ppcDcbz#endif#-------------------------------------------------------------------------------# Function: ppcHalt# Description: Halt Pseudo-Op# Input: none.# Output: none.#------------------------------------------------------------------------------- .text .align 2 .globl ppcHaltppcHalt: addis r3,0,0 # Init TCR to WP = 2^17 clks, no WD reset, all ints disabled ori r3,r3,0 mtspr tcr,r3ppcHaltloop: b ppcHaltloop # loop forever .type ppcHalt,@function .size ppcHalt,.-ppcHalt#-------------------------------------------------------------------------------# Function: ppcIsync# Description: Instruction Cache Synchronize# Input: none.# Output: none.#------------------------------------------------------------------------------- .text .align 2 .globl ppcIsync ppcIsync: isync blr .type ppcIsync,@function .size ppcIsync,.-ppcIsync#-------------------------------------------------------------------------------# Function: ppcIcbi # Description: Instruction Cache Block Invalidate# Input: r3 = effective address# Output: none.#------------------------------------------------------------------------------- .text .align 2 .globl ppcIcbippcIcbi: icbi r0,r3 blr .type ppcIcbi,@function .size ppcIcbi,.-ppcIcbi#-------------------------------------------------------------------------------# Function: ppcMfmsr# Description: Move From Machine State Register# Input: none# Output: r3 = msr#------------------------------------------------------------------------------- .text .align 2 .globl ppcMfmsrppcMfmsr: mfmsr r3 blr .type ppcMfmsr,@function .size ppcMfmsr,.-ppcMfmsr#-------------------------------------------------------------------------------# Function: ppcMfsprg0# Description: Move From SPRG0# Input: none# Output: r3 = sprg0#------------------------------------------------------------------------------- .text .align 2 .globl ppcMfsprg0ppcMfsprg0: mfspr r3,sprg0 blr .type ppcMfsprg0,@function .size ppcMfsprg0,.-ppcMfsprg0#-------------------------------------------------------------------------------# Function: ppcMfsprg1# Description: Move From SPRG1# Input: none# Output: r3 = sprg1#------------------------------------------------------------------------------- .text .align 2 .globl ppcMfsprg1ppcMfsprg1: mfspr r3,sprg1 blr .type ppcMfsprg1,@function .size ppcMfsprg1,.-ppcMfsprg1#-------------------------------------------------------------------------------# Function: ppcMfsprg2# Description: Move From SPRG2# Input: none# Output: r3 = sprg2#------------------------------------------------------------------------------- .text .align 2 .globl ppcMfsprg2ppcMfsprg2: mfspr r3,sprg2 blr .type ppcMfsprg2,@function .size ppcMfsprg2,.-ppcMfsprg2#-------------------------------------------------------------------------------# Function: ppcMfsprg3# Description: Move From SPRG3# Input: none# Output: r3 = sprg3#------------------------------------------------------------------------------- .text .align 2 .globl ppcMfsprg3ppcMfsprg3: mfspr r3,sprg3 blr .type ppcMfsprg3,@function .size ppcMfsprg3,.-ppcMfsprg3#-------------------------------------------------------------------------------# Function: ppcMfsrr0# Description: Move From SRR0# Input: none# Output: r3 = srr0#------------------------------------------------------------------------------- .text .align 2 .globl ppcMfsrr0ppcMfsrr0: mfsrr0 r3 blr .type ppcMfsrr0,@function .size ppcMfsrr0,.-ppcMfsrr0#-------------------------------------------------------------------------------# Function: ppcMfsrr1# Description: Move From SRR1# Input: none# Output: r3 = srr1#------------------------------------------------------------------------------- .text .align 2 .globl ppcMfsrr1ppcMfsrr1: mfsrr1 r3 blr .type ppcMfsrr1,@function .size ppcMfsrr1,.-ppcMfsrr1#-------------------------------------------------------------------------------# Function: ppcMfpvr# Description: Move From PVR# Input: none# Output: r3 = tid#------------------------------------------------------------------------------- .text .align 2 .globl ppcMfpvrppcMfpvr: mfpvr r3 blr .type ppcMfpvr,@function .size ppcMfpvr,.-ppcMfpvr#-------------------------------------------------------------------------------# Function: ppcMtmsr# Description: Move To Machine State Register# Input: none# Output: r3 = msr#------------------------------------------------------------------------------- .text .align 2 .globl ppcMtmsrppcMtmsr: mtmsr r3 blr .type ppcMtmsr,@function .size ppcMtmsr,.-ppcMtmsr#-------------------------------------------------------------------------------# Function: ppcMtsprg0# Description: Move To SPRG0# Input: r3 = value to be moved to sprg0# Output: none#------------------------------------------------------------------------------- .text .align 2 .globl ppcMtsprg0ppcMtsprg0: mtspr sprg0,r3 blr .type ppcMtsprg0,@function .size ppcMtsprg0,.-ppcMtsprg0#-------------------------------------------------------------------------------# Function: ppcMtsprg1# Description: Move To SPRG1# Input: r3 = value to be moved to sprg1# Output: none#------------------------------------------------------------------------------- .text .align 2 .globl ppcMtsprg1ppcMtsprg1: mtspr sprg1,r3 blr .type ppcMtsprg1,@function .size ppcMtsprg1,.-ppcMtsprg1#-------------------------------------------------------------------------------# Function: ppcMtsprg2# Description: Move To SPRG2# Input: r3 = value to be moved to sprg2# Output: none#------------------------------------------------------------------------------- .text .align 2 .globl ppcMtsprg2ppcMtsprg2: mtspr sprg2,r3 blr .type ppcMtsprg2,@function .size ppcMtsprg2,.-ppcMtsprg2#-------------------------------------------------------------------------------# Function: ppcMtsprg3# Description: Move To SPRG3# Input: r3 = value to be moved to sprg3# Output: none#------------------------------------------------------------------------------- .text .align 2 .globl ppcMtsprg3ppcMtsprg3: mtspr sprg3,r3 blr .type ppcMtsprg3,@function .size ppcMtsprg3,.-ppcMtsprg3#-------------------------------------------------------------------------------# Function: ppcMtsrr0# Description: Move To SRR0# Input: r3 = value to be moved to SRR0# Output: none#------------------------------------------------------------------------------- .text .align 2 .globl ppcMtsrr0ppcMtsrr0: mtsrr0 r3 blr .type ppcMtsrr0,@function .size ppcMtsrr0,.-ppcMtsrr0#-------------------------------------------------------------------------------# Function: ppcMtsrr1# Description: Move To SRR1# Input: r3 = value to be moved to SRR1# Output: none#------------------------------------------------------------------------------- .text .align 2 .globl ppcMtsrr1ppcMtsrr1: mtsrr1 r3 blr .type ppcMtsrr1,@function .size ppcMtsrr1,.-ppcMtsrr1#-------------------------------------------------------------------------------# Function: ppcOrMsr# Description: OR With Machine State Register (MSR)# Input: r3 = value to OR with MSR# Output: r3 = old MSR contents#------------------------------------------------------------------------------- .text .align 2 .globl ppcOrMsrppcOrMsr: mfmsr r6 or r7,r6,r3 mtmsr r7 ori r3,r6,0x0000 blr .type ppcOrMsr,@function .size ppcOrMsr,.-ppcOrMsr#-------------------------------------------------------------------------------# Function: ppcSync# Description: Processor Synchronize# Input: none.# Output: none.#------------------------------------------------------------------------------- .text .align 2 .globl ppcSyncppcSync: sync blr .type ppcSync,@function .size ppcSync,.-ppcSync#-------------------------------------------------------------------------------# Function: ppcEieio# Description: Enforce in-order execution of I/O# Input: none.# Output: none.⌨️ 快捷键说明
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