📄 pll_b.h
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/**********************************************************************/
/* File: pll_b.h */
/* */
/* Purpose: File containing the structures and prototypes for the */
/* Edge Port device driver */
/* */
/* (C) Copyright Motorola Inc, 2000. All rights reserved. */
/* */
/* $RCSfile: pll_b.h,v $ */
/* $Revision: 1.2 $ */
/* $Date: 2000/06/23 21:35:20 $ */
/* $Author: cthomas $ */
/* */
/**********************************************************************/
#include "mcore.h"
#ifndef _PLL_B_H
#define _PLL_B_H
/**********************************************************************/
/* Enumerations */
/**********************************************************************/
typedef enum
{
PLL_B_SYNCR, /* PLL Control registers */
PLL_B_SYNSR /* PLL Status Register */
} PLL_B_Register_t;
typedef enum
{
PLL_B_FALSE, /* PLL false flag indicator */
PLL_B_TRUE /* PLL true flag indicator */
} PLL_B_Boolean_t;
/***** Status function's enums ***************************************/
typedef enum
{
PLL_B_EXTERNAL = 0, /* External Clcok mode */
PLL_B_PLL /* PLL mode */
} PLL_B_ClockMode_t;
typedef enum
{
PLL_B_1_TO_1_PLL_MODE = 0x0, /* PLL is in 1 to 1 mode */
PLL_B_NORMAL_PLL_MODE /* Normal PLL mode */
} PLL_B_PLLMode_t;
typedef enum
{
PLL_B_CLOCK_SOURCE, /* Clock source */
PLL_B_CRYSTAL_SOURCE /* Crystal source */
} PLL_B_ClockSource_t;
typedef enum
{
PLL_B_HAS_LOST_LOCK, /* Detected lost lock & reset */
PLL_B_HAS_NOT_LOST_LOCK /* No detection of loss lock */
} PLL_B_StickyLockBit_t;
typedef enum
{
PLL_B_UNLOCKED, /* No lock at this time */
PLL_B_LOCKED /* Success lock detected */
} PLL_B_LockStatus_t;
typedef enum
{
PLL_B_HAS_NOT_LOST_CLOCK, /* Detected lost clock & reset */
PLL_B_HAS_LOST_CLOCK /* No detection of loss clock */
} PLL_B_StickyClockBit_t;
typedef enum
{
PLL_B_VALID_MODE, /* good mode to change freq. */
PLL_B_INVALID_MODE /* bad mode to change freq. */
} PLL_B_Mode_t;
/***** PLL_B_ReturnCode_t - PLL_D Error Codes ************************/
typedef enum
{
PLL_B_ERR_NONE = 0x0L, /* no error */
PLL_B_ERR_INVALID_HANDLE, /* PLL base address is zero */
PLL_B_ERR_BAD_RESULT_ADDR, /* Result pointer is zero */
PLL_B_ERR_INVALID_REGISTER, /* Register selection if invalid */
PLL_B_ERR_INVALID_LOSS_LOCK_RESET, /* Invalide Reset on loss of lock */
PLL_B_ERR_INVALID_FREQUENCY_MULTIPLIER,/* MFD is invalid */
PLL_B_ERR_INVALID_LOSS_CLOCK_RESET, /* Invalid Reset on loss of clock */
PLL_B_ERR_INVALID_FREQUENCY_DIVIDER,/* Frequency divider is invalid */
PLL_B_ERR_INVALID_MONITOR_CLOCK, /* Clock monitor is invalid */
PLL_B_ERR_INVALID_DISABLE_CLOCKOUT, /* Invalid Disable clockout */
PLL_B_ERR_INVALID_FAST_WAKEUP, /* Fast wakeup is invalid */
PLL_B_ERR_INVALID_STOP_MODE, /* Stop mode selection is invalid */
PLL_B_ERR_INVALID_STATUS_ALERT_ADDR /* Status Warning alerts */
} PLL_B_ReturnCode_t;
/***** PLL_B Control Register enum Definitions ************************/
/***** PLL_B_ResetOnLockFailureControl - Control Selection *****/
typedef enum
{
PLL_B_RESET_ON_LOCK_FAILURE_DISABLE, /* disable selection */
PLL_B_RESET_ON_LOCK_FAILURE_ENABLE /* enable selection */
} PLL_B_ResetOnLockFailureControl_t;
/***** PLL_B_VCO_MultiplyFactorDivider selection *****/
typedef enum
{
PLL_B_VCO_X_2, /* Set VCO clockout to 2 times the ref freq. */
PLL_B_VCO_X_3, /* 3 times */
PLL_B_VCO_X_4, /* 4 times */
PLL_B_VCO_X_5, /* 5 times */
PLL_B_VCO_X_6, /* 6 times */
PLL_B_VCO_X_7, /* 7 times */
PLL_B_VCO_X_8, /* 8 times */
PLL_B_VCO_X_9, /* 9 times */
PLL_B_VCO_X_NO_CHANGE
} PLL_B_VCOMultiplyFactorDivider_t;
/***** PLL_B_ResetOnClockFailureControl_t - Control Selection *****/
typedef enum
{
PLL_B_RESET_ON_CLOCK_FAILURE_DISABLE, /* disable selection */
PLL_B_RESET_ON_CLOCK_FAILURE_ENABLE /* enable selection */
} PLL_B_ResetOnClockFailureControl_t;
/***** PLL_B_VCO_ReducedFrequencyDivider Selection *****/
typedef enum
{
PLL_B_VCO_DIV_1 = 0, /* set Freq divider to 1 */
PLL_B_VCO_DIV_2, /* divisor of 2 */
PLL_B_VCO_DIV_4, /* divisor of 4 */
PLL_B_VCO_DIV_8, /* divisor of 8 */
PLL_B_VCO_DIV_16, /* divisor of 16 */
PLL_B_VCO_DIV_32, /* divisor of 32 */
PLL_B_VCO_DIV_64, /* divisor of 64 */
PLL_B_VCO_DIV_128, /* divisor of 128 */
PLL_B_VCO_DIV_NO_CHANGE
} PLL_B_VCOReducedFrequencyDivider_t;
/***** PLL_B_MonitorClockFailure_Control_t - Control Selection *****/
typedef enum
{
PLL_B_MONITOR_CLOCK_FAILURE_DISABLE, /* disable selection */
PLL_B_MONITOR_CLOCK_FAILURE_ENABLE /* enable selection */
} PLL_B_MonitorClockFailure_t;
/***** PLL_B_DisableClockOut_t - Control Selection *****/
typedef enum
{
PLL_B_CLOCK_OUT_ENABLE, /* enable VCO Clockout selection */
PLL_B_CLOCK_OUT_DISABLE /* disable VCO Clockout selection */
} PLL_B_DisableClockout_t;
/***** PLL_B_FastWakeupControl_t - Control Selection *****/
typedef enum
{
PLL_B_FAST_WAKEUP_DISABLE, /* disable selection */
PLL_B_FAST_WAKEUP_ENABLE /* enable selection */
} PLL_B_FastWakeupControl_t;
/***** PLL_B_StopModeControl_t - Control Selection *****/
typedef enum
{
PLL_B_ENABLE_PLL_OSC_CLKOUT = 0x0, /* Enable all options opmode */
PLL_B_ENABLE_PLL_OSC, /* Enable only PLL and OSC */
PLL_B_ENABLE_OSC, /* Enable only the OSC */
PLL_B_DISABLE_ALL /* Disable all */
} PLL_B_StopModeControl_t;
/**********************************************************************/
/* Structures */
/**********************************************************************/
/* PLL_B -- Register Definition */
typedef struct
{
UINT16 SYNCR; /* PLL flag Control registers */
volatile UINT16 SYNSR; /* PLL Status Register */
} PLL_B_t, *pPLL_B_t;
/***** PLL_B_GetResetStatus Stucture Definition *****/
typedef struct
{
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