ccm_a.h

摩托罗拉MMC2107在ucosII的移植代码

/************************************************************************/
/*  File: ccm_a.h                                                       */
/*                                                                      */
/*  Purpose: File containing the structures and prototypes for the      */
/*           CCM_A device driver                                        */
/*                                                                      */
/*  (C) Copyright Metrowerks, 2000.  All rights reserved.               */
/*                                                                      */
/*  $RCCMfile: ccm_a.h,v $                                              */
/*  $Revision: 1.1 $                                                    */
/*  $Date: 2000/06/23 20:22:20 $                                        */
/*  $Author: jeffk $                                                  */
/*                                                                      */
/************************************************************************/
      
#ifndef _CCM_A_H
#define _CCM_A_H

#include "mcore.h"

/*----------------------------------------------------------------------*/
/* Enumerations                                                         */
/*----------------------------------------------------------------------*/

typedef enum
{
  CCM_A_FALSE, /* Logical value FALSE */
  CCM_A_TRUE   /* Logical value TRUE */
} CCM_A_Boolean_t; /* CCM_A boolean enum */

/* RCON register Chip Configuration Mode Selection */

typedef enum {
              CCM_A_MASTER_MODE,   
              CCM_A_SINGLE_CHIP_MODE,
              CCM_A_FAST_MODE,
              CCM_A_EMULATION_MODE
             }CCM_A_ChipConfigurationMode_t;
             
typedef enum {
              CCM_A_DEFAULT_MASTER_MODE,   
              CCM_A_DEFAULT_SINGLE_CHIP_MODE
             }CCM_A_DefaultChipConfigurationMode_t;
             
                
/* Bus Monitor Timing Selection  */

typedef enum {
              CCM_A_TIME_OUT_64,   
              CCM_A_TIME_OUT_32,   
              CCM_A_TIME_OUT_16,
              CCM_A_TIME_OUT_8
             }CCM_A_BusMonitorTiming_t;

/* Bus Monitor Debug Mode Selection */

typedef enum {
              CCM_A_DISABLE_BUS_MONITOR,   /* Disable   */
              CCM_A_ENABLE_BUS_MONITOR     /* Enable */
             }CCM_A_BusMonitorDebugMode_t;

/* Bus Monitor External Enable Selection */

typedef enum {
              CCM_A_DISABLE_FOR_EXTERNAL_BUS_CYCLE,   /* Disable   */
              CCM_A_ENABLE_FOR_EXTERNAL_BUS_CYCLE     /* Enable */
             }CCM_A_BusMonitorExternal_t;

/* Show Interrupt Selection */

typedef enum {
              CCM_A_NORMAL_FUNCTION, /* RSTOUT functions normally   */
              CCM_A_INTERNAL_INTERRUPT_INDICATION  /* Internal interrupt*/
             }CCM_A_ShowInterrupt_t;

/* PSTAT Signal Enable Selection */

typedef enum {
              CCM_A_PSTAT_FUNCTION_DISABLED, /* Primary function   */
              CCM_A_PSTAT_FUNCTION_ENABLED             /* Enabled */
             }CCM_A_PSTATSignal_t;

/* TSIZ Signal Enable Selection  */

typedef enum {
              CCM_A_TSIZ_FUNCTION_DISABLED, /* Primary function   */
              CCM_A_TSIZ_FUNCTION_ENABLED             /* Enabled   */
             }CCM_A_TSIZSignal_t;

/* Emulate Internal Address Space using CS1 Selection */

typedef enum {
              CCM_A_CS1_DECODES_EXTERNAL_MEMORY,  /* Decode External */
              CCM_A_CS1_DECODES_INTERNAL_MEMORY   /* Decode Internal */
             }CCM_A_EmulateInternalAddressSpace_t;     

/* Show Cycle Enable Selection */

typedef enum {
              CCM_A_SHOW_CYCLES_DISABLED,  /* Enable Show Cycles   */
              CCM_A_SHOW_CYCLES_ENABLED    /*  Disable Show Cycles   */
             }CCM_A_ShowCycleEnable_t;     

/* Boot Selection */

typedef enum {
              CCM_A_INTERNAL_BOOT_DEVICE, /*  Internal boot  */
              CCM_A_EXTERNAL_BOOT_DEVICE  /*  External boot  */
             }CCM_A_BootSelect_t;

/* Boot Size Port Selection */

typedef enum {
              CCM_A_16_BIT_PORT,          /*  16 Bit Port  */
              CCM_A_32_BIT_PORT           /*  32 Bit Port  */
             }CCM_A_BootSizePort_t;

/* Pad Driver Load Selection */

typedef enum {
              CCM_A_DEFAULT_DRIVE_STRENGTH, /*  Default Drive Strength  */
              CCM_A_FULL_DRIVE_STRENGTH     /*  Full Drive Strength  */
             }CCM_A_PadDriverLoad_t;

/* PLL Reference Selection */

typedef enum {
              CCM_A_EXTERNAL_CLOCK,        /*  External clock  */
              CCM_A_CRYSTAL_OSCILLATOR     /*  Crystal Oscillator  */
             }CCM_A_PLLReference_t;

/* PLL Mode Selection */

typedef enum {
              CCM_A_1_TO_1_PLL_MODE,     /* 1:1 PLL mode   */
              CCM_A_NORMAL_PLL_MODE     /*  Normal PLL mode  */
             }CCM_A_PLLModeSelect_t;                         

/* Chip Configuration Module Register Selection */

typedef enum {
              CCM_A_CCR,                /* Select Chip configuration register */
              CCM_A_RCON,               /* Select Reset configuration register */
              CCM_A_CIR                 /* Select Chip Identification Register */
             }CCM_A_Register_t;

/* Error Return Code Selection */

   typedef enum{
                CCM_A_ERR_NONE,
                CCM_A_ERR_INVALID_HANDLE,
                CCM_A_ERR_BAD_RESULT_ADDR,
                CCM_A_ERR_INVALID_REGISTER,
                CCM_A_ERR_INVALID_LOAD_VALUE,
                CCM_A_ERR_INVALID_SHOW_CYCLE_VALUE,
                CCM_A_ERR_INVALID_EMULATE_ADDRESS_VALUE,
                CCM_A_ERR_INVALID_TSIZ_SIGNAL_VALUE,
                CCM_A_ERR_INVALID_PSTAT_SIGNAL_VALUE,
                CCM_A_ERR_INVALID_SHOW_INTERRUPT_VALUE,
                CCM_A_ERR_INVALID_BUS_MONITOR_DEBUG_MODE_VALUE,
                CCM_A_ERR_INVALID_BUS_MONITOR_VALUE,
                CCM_A_ERR_INVALID_BUS_MONITOR_TIMING_VALUE
      } CCM_A_ReturnCode_t;          /* CCM_A return codes */


/*----------------------------------------------------------------------*/
/*  Structures                                                          */
/*----------------------------------------------------------------------*/

/* Chip Identification Register Definition  */

typedef struct{
                       UINT8      PartIdentificationNumber;
                       UINT8      PartRevisionNumber;
} CCM_A_ChipIdentificationRegister_t,     *pCCM_A_ChipIdentification_t;

/* Reset Configuration Register Get Reset Status Definition */

typedef struct{
               CCM_A_DefaultChipConfigurationMode_t   ModeValue;
               CCM_A_BootSelect_t              BootSelectValue;
               CCM_A_BootSizePort_t            BootPortSizeValue;
               CCM_A_PadDriverLoad_t           PadDriverLoadValue;              
               CCM_A_PLLReference_t            PLLReferenceValue;
               CCM_A_PLLModeSelect_t           PLLModeSelectValue;
} CCM_A_ResetConfiguration_t,     *pCCM_A_ResetConfiguration_t;

/* Chip Configuration Module Register Definition */

typedef struct 
         {
           UINT16 CCR; /* Chip configuration register */
           UINT16 RESERVED0;  /* Reserved */
           UINT16 RCON; /* Reset configuration register */
           UINT16 CIR;     /* Chip Identification Register */
   } CCM_A_t, *pCCM_A_t;


/*----------------------------------------------------------------------*/
/* Register Bits & Masks                                                */
/*----------------------------------------------------------------------*/


/*  Chip Configuration Register  */

#define CCR_LOAD_BITNO 15
#define CCR_LOAD_MASK ( 1 << CCR_LOAD_BITNO )
#define CCR_SHEN_BITNO 13
#define CCR_SHEN_MASK (1 << CCR_SHEN_BITNO)
#define CCR_EMINT_BITNO 12
#define CCR_EMINT_MASK (1 << CCR_EMINT_BITNO)
#define CCR_MODE_MAX 0x7
#define CCR_MODE_BITNO 8
#define CCR_MODE_MASK (CCR_MODE_MAX << CCR_MODE_BITNO)
#define CCR_SZEN_BITNO 6
#define CCR_SZEN_MASK (1 << CCR_SZEN_BITNO)
#define CCR_PSTEN_BITNO 5
#define CCR_PSTEN_MASK (1 << CCR_PSTEN_BITNO)
#define CCR_SHINT_BITNO 4
#define CCR_SHINT_MASK ( 1 << CCR_SHINT_BITNO)
#define CCR_BME_BITNO 3
#define CCR_BME_MASK (1 << CCR_BME_BITNO)
#define CCR_BMD_BITNO 2
#define CCR_BMD_MASK (1 << CCR_BMD_BITNO)
#define CCR_BMT_MAX 0x3
#define CCR_BMT_BITNO 0
#define CCR_BMT_MASK (CCR_BMT_MAX << CCR_BMT_BITNO)

#define CCR_SINGLE_CHIP_MODE_RESET_MASK 0x0608
#define CCR_MASTER_MODE_RESET_MASK 0x0748
#define CCR_EMULATION_MODE_RESET_MASK 0x3068

/* Chip Configuration Register (CCR) Mode Field Values */

#define CCR_MASTER_MODE_MASK (0x7 << CCR_MODE_BITNO) 
#define CCR_SINGLE_CHIP_MODE_MASK (0x6 << CCR_MODE_BITNO)
#define CCR_FAST_MODE_MIN_MASK (0x4 << CCR_MODE_BITNO)
#define CCR_FAST_MODE_MAX_MASK (0x5 << CCR_MODE_BITNO)