edgeport_b.h

摩托罗拉MMC2107在ucosII的移植代码

/*********************************************************************/
/* File: edgeport_b.h                                                */
/*                                                                   */
/*  Purpose: File containing the structures and prototypes for the   */
/*           Edge Port device driver                                 */
/*                                                                   */
/* (C) Copyright Motorola Inc, 2000.   All rights reserved.          */
/*                                                                   */
/* $RCSfile: edgeport_b.h,v $                                        */
/* $Revision: 1.1 $                                                 */
/* $Date: 2000/06/23 20:00:09 $                                      */
/* $Author: csummers $                                                */
/*                                                                   */
/*********************************************************************/

#ifndef _EdgePort_B_H
#define _EdgePort_B_H

#include "mcore.h"

/*-------------------------------------------------------------------*/
/* Enumerations                                                      */
/*-------------------------------------------------------------------*/

typedef enum
{
  EDGEPORT_B_ERR_NONE = 0x0L,             /* No error (force long)   */
  EDGEPORT_B_ERR_INVALID_HANDLE,          /* Device handle is NULL   */
  EDGEPORT_B_ERR_INVALID_CONTROL,         /* Invalid control         */
  EDGEPORT_B_ERR_BAD_RESULT_ADDRESS,      /* Result Address is NULL  */
  EDGEPORT_B_ERR_INVALID_REGISTER,        /* Invalid register        */
  EDGEPORT_B_ERR_INVALID_DATA_VALUE,      /* Value greater than OxFF */
  EDGEPORT_B_ERR_INVALID_DATA_DIRECTION,  /* Data direction invalid  */
  EDGEPORT_B_ERR_INVALID_PIN_NUMBER,      /* Pin selected is invalid */
  EDGEPORT_B_ERR_INVALID_PIN_TYPE,        /* Pin type invalid        */
  EDGEPORT_B_ERR_INVALID_WRITE_VALUE      /* Write Value invalid     */
} EdgePort_B_ReturnCode_t;                /* EdgePort_B return codes */

typedef enum {
  EdgePort_B_EPPAR,        /* Edge Port Pin Assignment Register  */
  EdgePort_B_EPDDR,        /* Edge Port Data Direction Register  */
  EdgePort_B_EPFER,        /* Edge Port Flag Enable Register     */
  EdgePort_B_EPDR,         /* Edge Port Data Register            */
  EdgePort_B_EPPDR,        /* Edge Port Pin Data Register        */
  EdgePort_B_EPFR          /* Edge Port Flag Register            */
} EdgePort_B_Register_t;


typedef enum {
	EdgePort_B_Pin_Not_Detected,      /* Pin change not detected */
	EdgePort_B_Pin_Detected           /* Pin change detected     */
} EdgePort_B_Detect_t;

typedef enum {
	EdgePort_B_DISABLE,            /* Disable Interrupt Requests */
	EdgePort_B_ENABLE              /* Enable Interrupt Requests  */
} EdgePort_B_Control_t;

typedef enum {
	EdgePort_B_DATADIR_INPUT,      /* Pin configured as an input */
	EdgePort_B_DATADIR_OUTPUT     /* Pin configured as an output */
} EdgePort_B_DataDir_t;


typedef enum {
   EdgePort_B_PortPin_0,   /* Select Edge Port Pin 0  */
   EdgePort_B_PortPin_1,   /* Select Edge Port Pin 1  */
   EdgePort_B_PortPin_2,   /* Select Edge Port Pin 2  */
   EdgePort_B_PortPin_3,   /* Select Edge Port Pin 3  */
   EdgePort_B_PortPin_4,   /* Select Edge Port Pin 4  */
   EdgePort_B_PortPin_5,   /* Select Edge Port Pin 5  */
   EdgePort_B_PortPin_6,   /* Select Edge Port Pin 6  */
   EdgePort_B_PortPin_7    /* Select Edge Port Pin 7  */
} EdgePort_B_Port_t;
	

typedef enum {
	EdgePort_B_LevelDetect,    /* Level Sensitive Detection */
	EdgePort_B_RisingEdge,     /* Rising Edge Detection   */
	EdgePort_B_FallingEdge,    /* Falling Edge Detection  */
	EdgePort_B_BothEdge        /* Falling and Rising Edge */
} EdgePort_B_PinType_t;

typedef enum {
	EdgePort_B_CLEAR,    /* Data Value will be cleared with 0 */
	EdgePort_B_SET       /* Data Value will be set with 1     */
} EdgePort_B_DataVal_t, *pEdgePort_B_DataVal_t;

/*-------------------------------------------------------------------*/
/*  Structures                                                       */
/*-------------------------------------------------------------------*/
typedef struct 
{
   UINT16 EPPAR;           /* Edge Port Pins Assignment Register */
   UINT8 EPDDR;            /* Edge Port Data Direction Register */
   UINT8 EPFER;            /* Edge Port Flag Enable Register */
   volatile UINT8 EPDR;    /* Edge Port Data Register */
   volatile UINT8 EPPDR;   /* Edge Port Pin Data Register */
   volatile UINT8 EPFR;    /* Edge Port Flag Register */
} EdgePort_B_t, *pEdgePort_B_t;

typedef struct
{
 EdgePort_B_Detect_t Edge_Port_Flag_0; /* edge detected when true */
 EdgePort_B_Detect_t Edge_Port_Flag_1; /* edge detected when true */
 EdgePort_B_Detect_t Edge_Port_Flag_2; /* edge detected when true */
 EdgePort_B_Detect_t Edge_Port_Flag_3; /* edge detected when true */
 EdgePort_B_Detect_t Edge_Port_Flag_4; /* edge detected when true */
 EdgePort_B_Detect_t Edge_Port_Flag_5; /* edge detected when true */
 EdgePort_B_Detect_t Edge_Port_Flag_6; /* edge detected when true */
 EdgePort_B_Detect_t Edge_Port_Flag_7; /* edge detected when true */
}EdgePort_B_Status_t, *pEdgePort_B_Status_t;


/*-------------------------------------------------------------------*/
/* Register Bits & Masks                                             */
/*-------------------------------------------------------------------*/

#define EPPAR_EPPA0_BITNO  0
#define EPPAR_EPPA0_MASK   (3<<EPPAR_EPPA0_BITNO) /*0000000000000011*/
#define EPPAR_EPPA1_BITNO 	2
#define EPPAR_EPPA1_MASK   (3<<EPPAR_EPPA1_BITNO) /*0000000000001100*/
#define EPPAR_EPPA2_BITNO 	4
#define EPPAR_EPPA2_MASK   (3<<EPPAR_EPPA2_BITNO) /*0000000000110000*/
#define EPPAR_EPPA3_BITNO 	6
#define EPPAR_EPPA3_MASK   (3<<EPPAR_EPPA3_BITNO) /*0000000011000000*/
#define EPPAR_EPPA4_BITNO 	8
#define EPPAR_EPPA4_MASK   (3<<EPPAR_EPPA4_BITNO) /*0000001100000000*/
#define EPPAR_EPPA5_BITNO 	10
#define EPPAR_EPPA5_MASK   (3<<EPPAR_EPPA5_BITNO) /*0000110000000000*/
#define EPPAR_EPPA6_BITNO 	12
#define EPPAR_EPPA6_MASK   (3<<EPPAR_EPPA6_BITNO) /*0011000000000000*/
#define EPPAR_EPPA7_BITNO 	14
#define EPPAR_EPPA7_MASK   (3<<EPPAR_EPPA7_BITNO) /*1100000000000000*/
#define EPPAR_EPPA_BITNO	0
#define EPPAR_EPPA_MASK    (0XFFFF)
#define EPPAR_RESET_MASK   (0X00)


#define EPDDR_EPDD0_BITNO	0
#define EPDDR_EPDD0_MASK   (1<<EPDDR_EPDD0_BITNO) /*0000 0001*/
#define EPDDR_EPDD1_BITNO	1
#define EPDDR_EPDD1_MASK   (1<<EPDDR_EPDD1_BITNO) /*0000 0010*/
#define EPDDR_EPDD2_BITNO	2
#define EPDDR_EPDD2_MASK   (1<<EPDDR_EPDD2_BITNO) /*0000 0100*/
#define EPDDR_EPDD3_BITNO	3
#define EPDDR_EPDD3_MASK   (1<<EPDDR_EPDD3_BITNO) /*0000 1000*/
#define EPDDR_EPDD4_BITNO	4
#define EPDDR_EPDD4_MASK   (1<<EPDDR_EPDD4_BITNO) /*0001 0000*/
#define EPDDR_EPDD5_BITNO	5
#define EPDDR_EPDD5_MASK   (1<<EPDDR_EPDD5_BITNO) /*0010 0000*/
#define EPDDR_EPDD6_BITNO	6
#define EPDDR_EPDD6_MASK   (1<<EPDDR_EPDD6_BITNO) /*0100 0000*/
#define EPDDR_EPDD7_BITNO	7
#define EPDDR_EPDD7_MASK   (1<<EPDDR_EPDD7_BITNO) /*1000 0000*/
#define EPDDR_EPDD_BITNO	0
#define EPDDR_EPDD_MASK    (0XFF)
#define EPDDR_RESET_MASK   (0X00)


#define EPFER_EPFE0_BITNO	0
#define EPFER_EPFE0_MASK   (1<<EPFER_EPFE0_BITNO) /*0000 0001*/
#define EPFER_EPFE1_BITNO	1
#define EPFER_EPFE1_MASK   (1<<EPFER_EPFE1_BITNO) /*0000 0010*/
#define EPFER_EPFE2_BITNO	2
#define EPFER_EPFE2_MASK   (1<<EPFER_EPFE2_BITNO) /*0000 0100*/
#define EPFER_EPFE3_BITNO	3
#define EPFER_EPFE3_MASK   (1<<EPFER_EPFE3_BITNO) /*0000 1000*/
#define EPFER_EPFE4_BITNO	4
#define EPFER_EPFE4_MASK   (1<<EPFER_EPFE4_BITNO) /*0001 0000*/
#define EPFER_EPFE5_BITNO	5
#define EPFER_EPFE5_MASK   (1<<EPFER_EPFE5_BITNO) /*0010 0000*/
#define EPFER_EPFE6_BITNO	6
#define EPFER_EPFE6_MASK   (1<<EPFER_EPFE6_BITNO) /*0100 0000*/
#define EPFER_EPFE7_BITNO	7
#define EPFER_EPFE7_MASK   (1<<EPFER_EPFE7_BITNO) /*1000 0000*/
#define EPFER_EPFE_BITNO	0
#define EPFER_EPFE_MASK    (0XFF)
#define EPFER_RESET_MASK   (0X00)


#define EPDR_EPD0_BITNO		0
#define EPDR_EPD0_MASK     (1<<EPDR_EPD0_BITNO) /*0000 0001*/
#define EPDR_EPD1_BITNO		1
#define EPDR_EPD1_MASK     (1<<EPDR_EPD1_BITNO) /*0000 0010*/
#define EPDR_EPD2_BITNO		2
#define EPDR_EPD2_MASK     (1<<EPDR_EPD2_BITNO) /*0000 0100*/
#define EPDR_EPD3_BITNO		3
#define EPDR_EPD3_MASK     (1<<EPDR_EPD3_BITNO) /*0000 1000*/
#define EPDR_EPD4_BITNO		4
#define EPDR_EPD4_MASK     (1<<EPDR_EPD4_BITNO) /*0001 0000*/
#define EPDR_EPD5_BITNO		5
#define EPDR_EPD5_MASK     (1<<EPDR_EPD5_BITNO) /*0010 0000*/
#define EPDR_EPD6_BITNO		6
#define EPDR_EPD6_MASK     (1<<EPDR_EPD6_BITNO) /*0100 0000*/
#define EPDR_EPD7_BITNO		7
#define EPDR_EPD7_MASK     (1<<EPDR_EPD7_BITNO) /*1000 0000*/
#define EPDR_EPD_BITNO		0
#define EPDR_EPDR_MASK     (0XFF)
#define EPDR_RESET_MASK    (0XFF)


#define EPPDR_EPPD0_BITNO	0
#define EPPDR_EPPD0_MASK   (1<<EPPDR_EPPD0_BITNO) /*0000 0001*/
#define EPPDR_EPPD1_BITNO	1
#define EPPDR_EPPD1_MASK   (1<<EPPDR_EPPD1_BITNO) /*0000 0010*/
#define EPPDR_EPPD2_BITNO	2
#define EPPDR_EPPD2_MASK   (1<<EPPDR_EPPD2_BITNO) /*0000 0100*/
#define EPPDR_EPPD3_BITNO	3
#define EPPDR_EPPD3_MASK   (1<<EPPDR_EPPD3_BITNO) /*0000 1000*/
#define EPPDR_EPPD4_BITNO	4
#define EPPDR_EPPD4_MASK   (1<<EPPDR_EPPD4_BITNO) /*0001 0000*/
#define EPPDR_EPPD5_BITNO	5
#define EPPDR_EPPD5_MASK   (1<<EPPDR_EPPD5_BITNO) /*0010 0000*/
#define EPPDR_EPPD6_BITNO	6
#define EPPDR_EPPD6_MASK   (1<<EPPDR_EPPD6_BITNO) /*0100 0000*/
#define EPPDR_EPPD7_BITNO	7
#define EPPDR_EPPD7_MASK   (1<<EPPDR_EPPD7_BITNO) /*1000 0000*/


#define EPFR_EPF0_BITNO		0
#define EPFR_EPF0_MASK     (1<<EPFR_EPF0_BITNO) /*0000 0001*/
#define EPFR_EPF1_BITNO		1
#define EPFR_EPF1_MASK     (1<<EPFR_EPF1_BITNO) /*0000 0010*/
#define EPFR_EPF2_BITNO		2
#define EPFR_EPF2_MASK     (1<<EPFR_EPF2_BITNO) /*0000 0100*/
#define EPFR_EPF3_BITNO		3
#define EPFR_EPF3_MASK     (1<<EPFR_EPF3_BITNO) /*0000 1000*/
#define EPFR_EPF4_BITNO		4
#define EPFR_EPF4_MASK     (1<<EPFR_EPF4_BITNO) /*0001 0000*/
#define EPFR_EPF5_BITNO		5
#define EPFR_EPF5_MASK     (1<<EPFR_EPF5_BITNO) /*0010 0000*/
#define EPFR_EPF6_BITNO		6
#define EPFR_EPF6_MASK     (1<<EPFR_EPF6_BITNO) /*0100 0000*/
#define EPFR_EPF7_BITNO		7
#define EPFR_EPF7_MASK     (1<<EPFR_EPF7_BITNO) /*1000 0000*/
#define EPFR_EPF_BITNO		0
#define EPFR_EPFR_MASK     (0XFF)