📄 tim_a.h
字号:
TIM_A_ERR_INVALID_HANDLE,
TIM_A_ERR_INVALID_FUNCTION_ENABLE,
TIM_A_ERR_INVALID_FAST_CLEAR_ENABLE,
TIM_A_ERR_INVALID_INTERRUPT_ENABLE,
TIM_A_ERR_INVALID_PULLUP_INPUT_ENABLE,
TIM_A_ERR_INVALID_DRV_REDUCED_OUTPUT_ENABLE,
TIM_A_ERR_INVALID_RESET_COMPARE_3_ENABLE,
TIM_A_ERR_INVALID_PRE_SCALAR_SELECT,
TIM_A_ERR_INVALID_REGISTER,
TIM_A_ERR_INVALID_COMPARE_VALUE,
TIM_A_ERR_INVALID_CHANNEL,
TIM_A_ERR_INVALID_INPUT_CAPTURE_EDGE,
TIM_A_ERR_INVALID_OUTPUT_COMPARE_3_MASK,
TIM_A_ERR_INVALID_TOGGLE_ON_OVERFLOW,
TIM_A_ERR_INVALID_OUTPUT_ACTION,
} TIM_A_ReturnCode_t;
typedef enum {
TIM_A_FALSE,
TIM_A_TRUE
} TIM_A_Boolean_t;
/*--------------------------------------------------------------------*/
/* Structures */
/*--------------------------------------------------------------------*/
typedef struct
{
UINT16 CounterVal;
TIM_A_Boolean_t InterruptFlag;
} TIM_A_Status_t, *pTIM_A_Status_t;
/*--------------------------------------------------------------------*/
/* TIM_A PICSR Bits & Masks */
/*--------------------------------------------------------------------*/
#define PCSR_EN_BITNO 0
#define PCSR_EN_MASK (1 << PCSR_EN_BITNO)
#define PCSR_RLD_BITNO 1
#define PCSR_RLD_MASK (1 << PCSR_RLD_BITNO)
#define PCSR_PIF_BITNO 2
#define PCSR_PIF_MASK (1 << PCSR_PIF_BITNO)
#define PCSR_PIE_BITNO 3
#define PCSR_PIE_MASK (1 << PCSR_PIE_BITNO)
#define PCSR_OVW_BITNO 4
#define PCSR_OVW_MASK (1 << PCSR_OVW_BITNO)
#define PCSR_DBG_BITNO 5
#define PCSR_DBG_MASK (1 << PCSR_DBG_BITNO)
#define PCSR_DOZE_BITNO 6
#define PCSR_DOZE_MASK (1 << PCSR_DOZE_BITNO)
#define PCSR_PRE_BITNO 8
#define PCSR_PRE_MAX 0xF
#define PCSR_PRE_MASK (PCSR_PRE_MAX << PCSR_PRE_BITNO)
#define PCSR_RESET_MASK 0x0
#define PMR_PM_BITNO 0
#define PMR_PM_MAX 0xFFFF
#define PMR_PM_MASK (PMR_PM_MAX << PMR_PM_BITNO)
#define PCNTR_PC_BITNO 0
#define PCNTR_PC_MAX 0xFFFF
#define PCNTR_PC_MASK (PCNTR_PC_MAX << PCNTR_PC_BITNO)
#define PMR_RESET_MASK 0xFFFF
/*--------------------------------------------------------------------*/
/* Prototypes */
/*--------------------------------------------------------------------*/
TIM_A_ReturnCode_t TIM_A_Init_f(
pTIM_A_t TIMPtr,
TIM_A_TIMEnable_t TIMEnable,
TIM_A_FastClearEnable_t FastClearEnable,
TIM_A_InterruptEnable_t InterruptEnable,
TIM_A_PullupInputEnable_t InputPullupEnable,
TIM_A_DrvReducedOutputEnable_t DriveReductionEnable,
TIM_A_CounterResetOn3Enable_t ResetCompare3Enable,
TIM_A_PreScalarSelect_t PreScalarSelect );
TIM_A_ReturnCode_t TIM_A_ConfigChannelInputCapture_f(
pTIM_A_t TIMPtr,
TIM_A_Channel_t Ch,
TIM_A_InputCaptureEdge_t InputCaptureEdge,
TIM_A_InterruptEnable_t InterruptEnable );
TIM_A_ReturnCode_t TIM_A_ConfigChannelOuputCompare_f(
pTIM_A_t TIMPtr,
TIM_A_Channel_t Ch,
TIM_A_OutputCompare3Mask_t OutputCompare3Mask,
TIM_A_ToggleOnOverflow_t ToggleOnOverflow,
TIM_A_OutputAction_t OutputAction,
TIM_A_InterruptEnable_t InterruptEnable,
UINT16 CompareValue );
TIM_A_ReturnCode_t TIM_A_SetCompareValue_f(
pTIM_A_t TIMPtr,
TIM_A_Channel_t Ch,
UINT16 CompareValue );
/**********************************************************************/
/* Macro: TIM_A_Init */
/* */
/* Purpose: Initialize the Programmable Interval Timer */
/* */
/* Input: */
/* TIMPtr : TIM register block base address. */
/* PreScalarSelect : Determines how the TIM clock is generated */
/* from the system clock. */
/* */
/* Output: */
/* TIM_A_ERR_NONE : No error. */
/* TIM_A_ERR_INVALID_HANDLE : Device handle is NULL.*/
/* TIM_A_ERR_INVALID_ENABLE : */
/* TIM_A_ERR_INVALID_FAST_CLEAR_ENABLE : */
/* TIM_A_ERR_INVALID_INTERRUPT_ENABLE : */
/* TIM_A_ERR_INVALID_INTERRUPT_FLAG_CONTROL : */
/* TIM_A_ERR_INVALID_PULLUP_INPUT_ENABLE : */
/* TIM_A_ERR_INVALID_DRV_REDUCED_OUTPUT_ENABLE: */
/* TIM_A_ERR_INVALID_RESET_COMPARE_3_ENABLE : */
/* TIM_A_ERR_INVALID_PRE_SCALAR_SELECT : Pre-scalar select is */
/* invalid. */
/**********************************************************************/
#define TIM_A_Init( \
TIMPtr, \
TIMEnable, \
FastClearEnable, \
InterruptEnable, \
InputPullupEnable, \
DriveReductionEnable, \
ResetCompare3Enable, \
PreScalarSelect \
) \
( \
(TIM_A_PARAM_CHECKING) ? \
( \
((TIMPtr) == NULL) ? \
TIM_A_ERR_INVALID_HANDLE : \
(((TIMEnable) < TIM_A_FUNCTION_DISABLED) || \
((TIMEnable) > TIM_A_FUNCTION_ENABLED)) ? \
TIM_A_ERR_INVALID_FUNCTION_ENABLE : \
(((FastClearEnable) < TIM_A_FAST_CLEAR_DISABLED) || \
((FastClearEnable) > TIM_A_FAST_CLEAR_ENABLED)) ? \
TIM_A_ERR_INVALID_FAST_CLEAR_ENABLE : \
(((InterruptEnable) < TIM_A_INTERRUPT_DISABLED) || \
((InterruptEnable) > TIM_A_INTERRUPT_ENABLED)) ? \
TIM_A_ERR_INVALID_INTERRUPT_ENABLE : \
(((InputPullupEnable) < TIM_A_PULLUP_INPUT_DISABLED) || \
((InputPullupEnable) > TIM_A_PULLUP_INPUT_ENABLED)) ? \
TIM_A_ERR_INVALID_PULLUP_INPUT_ENABLE : \
(((DriveReductionEnable) < TIM_A_DRV_REDUCED_OUTPUT_DISABLED) || \
((DriveReductionEnable) > TIM_A_DRV_REDUCED_OUTPUT_ENABLED)) ? \
TIM_A_ERR_INVALID_DRV_REDUCED_OUTPUT_ENABLE : \
(((ResetCompare3Enable) < TIM_A_RESET_COMPARE_3_DISABLED) || \
((ResetCompare3Enable) > TIM_A_RESET_COMPARE_3_ENABLED)) ? \
TIM_A_ERR_INVALID_RESET_COMPARE_3_ENABLE : \
(((PreScalarSelect) < TIM_A_SCALAR_00) || \
((PreScalarSelect) > TIM_A_SCALAR_07)) ? \
TIM_A_ERR_INVALID_PRE_SCALAR_SELECT : \
TIM_A_Init_f( (TIMPtr), \
(TIMEnable), \
(FastClearEnable), \
(InterruptEnable), \
(InputPullupEnable), \
(DriveReductionEnable), \
(ResetCompare3Enable), \
(PreScalarSelect) \
) \
) \
: \
TIM_A_Init_f( (TIMPtr), \
(TIMEnable), \
(FastClearEnable), \
(InterruptEnable), \
(InputPullupEnable), \
(DriveReductionEnable), \
(ResetCompare3Enable), \
(PreScalarSelect) \
) \
) /* end of TIM_A_Init Macro */
/**********************************************************************/
/* Macro: TIM_A_ConfigChannelInputCapture */
/* */
/* Purpose: Return the status bit of the TIM */
/* */
/* Input: */
/* TIMPtr : TIM base address associated. */
/* Ch : Timer channel (0-3) */
/* CompareValue : Output Compare value. */
/* */
/* Output: */
/* TIM_A_ERR_NONE : For successful */
/* completion */
/* TIM_A_ERR_INVALID_HANDLE : TIM base address */
/* parameter is zero */
/* TIM_A_ERR_INVALID_CHANNEL : TIM channel is out of */
/* range of 0-3 */
/**********************************************************************/
#define TIM_A_ConfigChannelInputCapture( \
TIMPtr, \
Ch, \
InputCaptureEdge, \
InterruptEnable ) \
( \
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