📄 core_b.h
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CORE_B_TRACE_CHANGE_OF_FLOW
} CORE_B_Trace_t;
/* CORE_B_ExceptionControl_t -- Exception Control */
typedef enum{
CORE_B_EXCEPTION_DISABLE,
CORE_B_EXCEPTION_ENABLE
} CORE_B_ExceptionControl_t;
/* CORE_B_InterruptInstrBoundary_t -- Interrupt on instruction boundary */
typedef enum{
CORE_B_INTERRUPT_ON_INSTRUCTION_BOUNDARIES,
CORE_B_INTERRUPT_WITHIN_INSTRUCTION
} CORE_B_InterruptInstrBoundary_t;
/* CORE_B_InterruptControl_t -- Interrupt Control */
typedef enum{
CORE_B_INTERRUPT_DISABLE,
CORE_B_INTERRUPT_ENABLE_ONLY_NORMAL,
CORE_B_INTERRUPT_ENABLE_FAST_AND_NORMAL
} CORE_B_InterruptControl_t;
/*----------------------------------------------------------------------*/
/* Structures */
/*----------------------------------------------------------------------*/
/* Derived Data Type Definitions */
typedef volatile void *pVectorTable_t; /* base address for vector table */
typedef UINT32 VectorValue_t; /* vector table entry */
/*----------------------------------------------------------------------*/
/* Register Bits & Masks */
/*----------------------------------------------------------------------*/
/* Register Macros */
/* MCORE Control Register Macros */
#define PSR_C_BITNO 0 /* Condition code/carry bit */
#define PSR_C_MASK (1 << PSR_C_BITNO)
#define PSR_AF_BITNO 1 /* Alternate File Enable */
#define PSR_AF_MASK (1 << PSR_AF_BITNO)
#define PSR_FE_BITNO 4 /* Fast Int. Enable */
#define PSR_FE_MASK (1 << PSR_FE_BITNO)
#define PSR_IE_BITNO 6 /* Int. Enable */
#define PSR_IE_MASK (1 << PSR_IE_BITNO)
#define PSR_IC_BITNO 7 /* Int. Control */
#define PSR_IC_MASK (1 << PSR_IC_BITNO)
#define PSR_EE_BITNO 8 /* Exception Enable */
#define PSR_EE_MASK (1 << PSR_EE_BITNO)
#define PSR_MM_BITNO 9 /* Misalignment Exception Mask */
#define PSR_MM_MASK (1 << PSR_MM_BITNO)
#define PSR_SC_BITNO 10 /* Spare Control */
#define PSR_SC_MASK (1 << PSR_SC_BITNO)
#define PSR_TC_BITNO 12 /* Translation Control */
#define PSR_TC_MASK (1 << PSR_TC_BITNO)
#define PSR_TP_BITNO 13 /* Trace Pending */
#define PSR_TP_MASK (1 << PSR_TP_BITNO)
#define PSR_TM_BITNO 14 /* Trace Mode */
#define PSR_TM_MAX 3
#define PSR_TM_MASK (PSR_TM_MAX << PSR_TM_BITNO)
#define PSR_VEC_BITNO 16 /* Vector Number */
#define PSR_VEC_MAX 127
#define PSR_VEC_MASK ( PSR_VEC_MAX << PSR_VEC_BITNO )
#define PSR_U0_BITNO 24 /* Harware Accelerator Control 0 */
#define PSR_U0_MASK (1 << PSR_U0_BITNO)
#define PSR_U1_BITNO 25 /* Harware Accelerator Control 1 */
#define PSR_U1_MASK (1 << PSR_U1_BITNO)
#define PSR_U2_BITNO 26 /* Harware Accelerator Control 2 */
#define PSR_U2_MASK (1 << PSR_U2_BITNO)
#define PSR_U3_BITNO 27 /* Harware Accelerator Control 3 */
#define PSR_U3_MASK (1 << PSR_U3_BITNO)
#define PSR_SP_BITNO 28 /* Spare bits */
#define PSR_SP_MAX 3 /* SP maximum field value */
#define PSR_SP_MASK ( PSR_SP_MAX << PSR_SP_BITNO )
#define PSR_S_BITNO 31 /* Supervisor Mode */
#define PSR_S_MASK (1 << PSR_S_BITNO)
#define PSR_RESET_MASK 0x80000000
#define PSR_TOUCHABLE_BITS_MASK 0x007FF7D3
#define VBR_VECTORBASE_BITNO 10
#define VBR_VECTORBASE_MAX 0x003FFFFF
#define VBR_VECTORBASE_MASK (VBR_VECTORBASE_MAX << VBR_VECTORBASE_BITNO)
#define VBR_RESET_MASK 0x00000000
/*----------------------------------------------------------------------*/
/* Misc. Macros */
/*----------------------------------------------------------------------*/
#define CORE_B_MAXIMUM_VECTORS 127 /*Number of Vectors in Vect Table */
#define VECTOR_ADDR_BOUNDARY 1024 /*MCORE Vector Base Addr Boundary */
#define PSR_TM_NORMAL (0x00 << PSR_TM_BITNO)
#define PSR_TM_INSTRUCTION (0x01 << PSR_TM_BITNO)
#define PSR_TM_RESERVED (0x10 << PSR_TM_BITNO)
#define PSR_TM_CHANGE_OF_FLOW (0x11 << PSR_TM_BITNO)
/*--------------------------------------------------------------------*/
/* Prototypes */
/*--------------------------------------------------------------------*/
CORE_B_ReturnCode_t CORE_B_InitVectorTable_f( pVectorTable_t,
VectorValue_t );
CORE_B_ReturnCode_t CORE_B_InitVectorEntry_f( pVectorTable_t,
CORE_B_Vector_t,
VectorValue_t );
CORE_B_ReturnCode_t CORE_B_SetProcessorStatus_f( CORE_B_Trace_t,
CORE_B_ExceptionControl_t,
CORE_B_InterruptInstrBoundary_t,
CORE_B_InterruptControl_t );
CORE_B_ReturnCode_t CORE_B_SetVectorBase_f( pVectorTable_t );
CORE_B_ReturnCode_t CORE_B_SetRegister_f( CORE_B_Register_t,
UINT32 );
CORE_B_ReturnCode_t CORE_B_GetRegister_f( CORE_B_Register_t,
UINT32 * );
CORE_B_ReturnCode_t CORE_B_Reset_f();
/**********************************************************************/
/* Macro: CORE_B_InitVectorTable */
/* */
/* Purpose: Call CORE_B_InitVectorTable_f function with optional */
/* parameter checking. */
/* Input: */
/* VectorBasePtr : Base address of the vector table. */
/* Vector : Vector taken upon Int. or exception */
/* */
/* Output: */
/* CORE_B_ERR_NONE : No error */
/* CORE_B_ERR_INVALID_VECTOR_BASE : VectorBasePtr not on a 1KB */
/* boundary or is zero */
/* CORE_B_ERR_INVALID_VECTOR_VALUE : Vector value is zero */
/**********************************************************************/
#define CORE_B_InitVectorTable( VectorBasePtr, \
VectorValue) \
( \
(CORE_B_PARAM_CHECKING) ? \
( \
((((UINT32)(VectorBasePtr) % VECTOR_ADDR_BOUNDARY ) != 0) || \
(VectorBasePtr == 0)) ? \
CORE_B_ERR_INVALID_VECTOR_BASE : \
(VectorValue == 0) ? \
CORE_B_ERR_INVALID_VECTOR_VALUE : \
CORE_B_InitVectorTable_f( (VectorBasePtr), \
(VectorValue) ) \
) \
: \
CORE_B_InitVectorTable_f( (VectorBasePtr), \
(VectorValue) ) \
) /* End of CORE_B_InitVectorTable Macro */
/**********************************************************************/
/* Macro: CORE_B_InitVectorEntry */
/* */
/* Purpose: Call CORE_B_InitVectorEntry_f function with optional */
/* parameter checking. */
/* */
/* Input: */
/* vectorBasePtr : Base address of the vector table. */
/* vectorOffset : Offset into the vector table */
/* vectorValue : Vector taken upon Int. or exception */
/* */
/* Output: */
/* CORE_B_ERR_NONE : No error */
/* CORE_B_ERR_INVALID_VECTOR_BASE : VectorBasePtr is zero or not on */
/* a 1KB boundary */
/* CORE_B_ERR_INVALID_VECTOR_OFFSET : VectorOffset not an */
/* enumeration of CORE_B_Vector_t*/
/* CORE_B_ERR_INVALID_VECTOR_VALUE : Vector Value is zero */
/**********************************************************************/
#define CORE_B_InitVectorEntry( vectorBasePtr, \
vectorOffset, \
vectorValue ) \
( \
(CORE_B_PARAM_CHECKING) ? \
( \
((((UINT32)(vectorBasePtr) % VECTOR_ADDR_BOUNDARY ) != 0) || \
(vectorBasePtr == 0)) ? \
CORE_B_ERR_INVALID_VECTOR_BASE : \
(((vectorOffset) < CORE_B_RESET_VECTOR) || \
((vectorOffset) > CORE_B_RESERVED_127_VECTOR)) ? \
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