core_b.h

摩托罗拉MMC2107在ucosII的移植代码

/**********************************************************************/
/*    File: core_b.h                                                  */ 
/*                                                                    */
/*    (C) Copyright Motorola Inc, 2000.  All rights reserved.         */
/*                                                                    */
/*    $RCSfile: core_b.h,v $                                          */
/*    $Revision: 1.1 $                                                */
/*    $Date: 2000/06/23 20:00:09 $                                    */
/*    $Author: csummers $                                              */
/*                                                                    */
/**********************************************************************/
#ifndef _CORE_B_H
#define _CORE_B_H

#include "mcore.h"
#include "plibdefs_mmc2107.h"

/*----------------------------------------------------------------------*/
/* Enumerations                                                         */
/*----------------------------------------------------------------------*/

/* CORE_B_ReturnCode_t -- Error return codes codes for CORE_B */

typedef enum
{
  CORE_B_ERR_NONE = 0x0L,                 /* No error (force long)     */
  CORE_B_ERR_BAD_RESULT_ADDR,             /* Result Address is NULL    */
  CORE_B_ERR_INVALID_REGISTER,            /* Invalid register selection*/
  CORE_B_ERR_INVALID_VECTOR_BASE,         /* Invalid vector base       */  
  CORE_B_ERR_INVALID_VECTOR_VALUE,        /* Invalid vector entry      */
  CORE_B_ERR_INVALID_VECTOR_OFFSET,       /* Invalid vector offset     */
  CORE_B_ERR_INVALID_TRACE_MODE,          /* Invalid trace mode        */
  CORE_B_ERR_INVALID_EXCEPTION_CONTROL,   /* Invalid exception control */
  CORE_B_ERR_INVALID_INSTRUCTION_BOUNDARY,/* Invalid instr. boundary   */
  CORE_B_ERR_INVALID_INTERRUPT_CONTROL    /* Invalid interrupt control */
} CORE_B_ReturnCode_t; /* CORE_B return codes */


/* CORE_B_Register_t - Int. Cntrl. Reg Selection */
typedef enum {
  CORE_B_PSR,      /* Select Processor Status Register */
  CORE_B_VBR,      /* Select Vector Base Register */
  CORE_B_EPSR,     /* Select Exception Saved Processor Stat Reg */
  CORE_B_FPSR,     /* Select Interrupt Saved Processor Stat Reg */
  CORE_B_EPC,      /* Select Exception Saved Program Counter */
  CORE_B_FPC,      /* Select Interrupt Saved Program Counter */
  CORE_B_SS0,      /* Select Supervisor Storage Register 0 */
  CORE_B_SS1,      /* Select Supervisor Storage Register 1 */
  CORE_B_SS2,      /* Select Supervisor Storage Register 2 */
  CORE_B_SS3,      /* Select Supervisor Storage Register 3 */
  CORE_B_SS4,      /* Select Supervisor Storage Register 4 */
  CORE_B_GCR,      /* Select Global Control Register */
  CORE_B_GSR       /* Select Global Status Register */
} CORE_B_Register_t;

/* CORE_B_Vector_t - MCORE Vector Selection (value sensitive) */
typedef enum{
  CORE_B_RESET_VECTOR = 0,
  CORE_B_MISALIGNED_ACCESS_VECTOR,
  CORE_B_ACCESS_ERROR_VECTOR,
  CORE_B_DIVIDE_BY_ZERO_VECTOR,
  CORE_B_ILLEGAL_INSTRUCTION_VECTOR,
  CORE_B_PRIVILEGE_VIOLATION_VECTOR,
  CORE_B_TRACE_EXCEPTION_VECTOR,
  CORE_B_BREAKPOINT_EXCEPTION_VECTOR,
  CORE_B_UNRECOVERABLE_ERROR_VECTOR,
  CORE_B_SOFT_RESET_VECTOR,
  CORE_B_INT_AUTOVECTOR,
  CORE_B_FINT_AUTOVECTOR,
  CORE_B_HARDWARE_ACCELERATOR_VECTOR, 
  CORE_B_RESERVED_13_VECTOR,             
  CORE_B_RESERVED_14_VECTOR,
  CORE_B_RESERVED_15_VECTOR,
  CORE_B_TRAP_0_VECTOR,
  CORE_B_TRAP_1_VECTOR,
  CORE_B_TRAP_2_VECTOR,
  CORE_B_TRAP_3_VECTOR,
  CORE_B_RESERVED_20_VECTOR,
  CORE_B_RESERVED_21_VECTOR,
  CORE_B_RESERVED_22_VECTOR,
  CORE_B_RESERVED_23_VECTOR,
  CORE_B_RESERVED_24_VECTOR,
  CORE_B_RESERVED_25_VECTOR,
  CORE_B_RESERVED_26_VECTOR,
  CORE_B_RESERVED_27_VECTOR,
  CORE_B_RESERVED_28_VECTOR,
  CORE_B_RESERVED_29_VECTOR,
  CORE_B_RESERVED_30_VECTOR,
  CORE_B_RESERVED_31_VECTOR,
  CORE_B_RESERVED_32_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_33_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_34_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_35_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_36_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_37_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_38_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_39_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_40_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_41_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_42_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_43_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_44_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_45_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_46_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_47_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_48_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_49_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_50_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_51_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_52_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_53_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_54_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_55_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_56_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_57_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_58_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_59_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_60_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_61_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_62_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_63_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_64_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_65_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_66_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_67_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_68_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_69_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_70_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_71_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_72_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_73_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_74_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_75_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_76_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_77_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_78_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_79_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_80_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_81_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_82_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_83_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_84_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_85_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_86_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_87_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_88_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_89_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_90_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_91_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_92_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_93_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_94_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_95_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_96_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_97_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_98_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_99_VECTOR,    /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_100_VECTOR,   /* Reserved for Vectored Int. Cntlr */ 
  CORE_B_RESERVED_101_VECTOR,   /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_102_VECTOR,   /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_103_VECTOR,   /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_104_VECTOR,   /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_105_VECTOR,   /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_106_VECTOR,   /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_107_VECTOR,   /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_108_VECTOR,   /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_109_VECTOR,   /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_110_VECTOR,   /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_111_VECTOR,   /* Reserved for Vectored Int. Cntlr */ 
  CORE_B_RESERVED_112_VECTOR,   /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_113_VECTOR,   /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_114_VECTOR,   /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_115_VECTOR,   /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_116_VECTOR,   /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_117_VECTOR,   /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_118_VECTOR,   /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_119_VECTOR,   /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_120_VECTOR,   /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_121_VECTOR,   /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_122_VECTOR,   /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_123_VECTOR,   /* Reserved for Vectored Int. Cntlr */ 
  CORE_B_RESERVED_124_VECTOR,   /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_125_VECTOR,   /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_126_VECTOR,   /* Reserved for Vectored Int. Cntlr */
  CORE_B_RESERVED_127_VECTOR    /* Reserved for Vectored Int. Cntlr */
} CORE_B_Vector_t;

/* CORE_B_Trace_t - MCORE Trace Mode */
typedef enum{
  CORE_B_TRACE_NORMAL,
  CORE_B_TRACE_INSTRUCTION,