📄 os_viewc.c
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/*
*********************************************************************************************************
* uC/OS-View
*
* (c) Copyright 2004, Micrium, Weston, FL
* All Rights Reserved
*
* Freescale i.MX21 (ARM9)
* IAR C Compiler
*********************************************************************************************************
*/
#include <includes.h>
/*
*********************************************************************************************************
* Constants
*********************************************************************************************************
*/
#define INT_UART1 20 /* UART1 Interrupt Bit Number */
/*
*********************************************************************************************************
* VARIABLES
*********************************************************************************************************
*/
/*
*********************************************************************************************************
* EXIT uC/OS-View
*
* Description: This function is called if your target needs to 'uninstall' uC/OS-View.
*
* Note(s) :
*********************************************************************************************************
*/
void OSView_Exit (void)
{
}
/*
*********************************************************************************************************
* Obtain CPU name
*********************************************************************************************************
*/
void OSView_GetCPUName (INT8U *s)
{
OS_StrCopy(s, "Freescale i.MX21 (ARM9)");
}
/*
*********************************************************************************************************
* Obtain Interrupt Stack information
*********************************************************************************************************
*/
INT32U OSView_GetIntStkBase (void)
{
return (0); /* We are not using an ISR stack */
}
INT32U OSView_GetIntStkSize (void)
{
return (0); /* We are not using an ISR stack */
}
/*$PAGE*/
/*
*********************************************************************************************************
* INITIALISE uC/OS-View COM PORT
*
* Description: Initialize the hardware required for the OS to run. This will work on any target hardware,
* but may have to be tailored a little (regarding the clock frequency). Of course the same
* holds true if for some reason you choose to use another timer.
*
* Note(s) : 1) This function assumes that a free running timer has been initialized. The timer can
* either be a 16 bits or 32 bits timer. Your application needs to provide a function
* called OSView_TmrRd() that reads the current counts of this timer. The free running
* timer is initialized by the BSP function OSView_TmrInit().
*********************************************************************************************************
*/
void OSView_InitTarget (INT32U baud_rate)
{
OSView_TmrInit(); /* Initialize the free running timer */
#if OS_VIEW_COMM_SEL == OS_VIEW_UART_1
PCCR0 |= 1; /* Value out of reset, UART1_EN = 1 */
UCR1_1 = 0; /* DISABLE the UART to reprogram it! */
USR1_1 = 0xFFFFFFFF; /* Clear pending interrupts */
USR2_1 = 0xFFFFFFFF; /* Clear pending interrupts */
switch (baud_rate) { /* Setup Baud Rate */
case 9600:
UBIR_1 = 1108;
UBMR_1 = 9999;
break;
case 19200:
UBIR_1 = 2216;
UBMR_1 = 9999;
break;
case 38400:
UBIR_1 = 4434;
UBMR_1 = 9999;
break;
case 57600:
UBIR_1 = 6651;
UBMR_1 = 9999;
break;
case 115200:
UBIR_1 = 13303;
UBMR_1 = 9999;
break;
default: /* Assume 38,400 by default */
UBIR_1 = 4434;
UBMR_1 = 9999;
break;
}
UCR2_1 = 0x00004027; /* UART1, Do not reset */
/* 8 Bits, 1 Stop, No Parity */
/* Enable the Receiver */
/* Enable the Transmitter */
/* Ignore the RTS pin */
UFCR_1 = 0x00000801; /* Rx FIFO triggers when 1 byte received */
/* Clear RFDIV bits, setting RFDIV = 6 */
/* This is the value after reset */
UCR4_1 |= UART_TCEN; /* Enable Tx interrupts */
UCR1_1 |= 1 << 0; /* Enable the UART */
OSView_TmrCntsPrev = 0;
BSP_Set_IRQ_Vector(INT_UART1, OSView_RxTxISRHandler); /* Register the interrupt routine */
BSP_IntEn(INT_UART1); /* Enable the UART global interrupt src */
#endif
}
/*$PAGE*/
/*
*********************************************************************************************************
* Disable Rx Interrupts
*********************************************************************************************************
*/
void OSView_RxIntDis (void)
{
#if OS_CRITICAL_METHOD == 3 /* Allocate storage for CPU status register */
OS_CPU_SR cpu_sr;
cpu_sr = 0; /* Prevent compiler warning */
#endif
OS_ENTER_CRITICAL();
#if OS_VIEW_COMM_SEL == OS_VIEW_UART_1
UCR1_1 &= ~UART_RRDYEN; /* Disable receive interrupts */
#endif
OS_EXIT_CRITICAL();
}
/*$PAGE*/
/*
*********************************************************************************************************
* Enable Rx Interrupts
*********************************************************************************************************
*/
void OSView_RxIntEn (void)
{
#if OS_CRITICAL_METHOD == 3 /* Allocate storage for CPU status register */
OS_CPU_SR cpu_sr;
cpu_sr = 0; /* Prevent compiler warning */
#endif
OS_ENTER_CRITICAL();
#if OS_VIEW_COMM_SEL == OS_VIEW_UART_1
UCR1_1 |= UART_RRDYEN; /* Enable receive interrupts */
#endif
OS_EXIT_CRITICAL();
}
/*$PAGE*/
/*
*********************************************************************************************************
* Rx Communication handler for uC/OS-View
*
* Description: This function is called by OSView_RxISR (see OS_VIEWa.ASM) to process a received
* character interrupt.
*
* Note(s) : This adaptation of uC/OS-View assumes that a 'combined' interrupt is generated by the UART
* and thus this function is not needed.
*********************************************************************************************************
*/
void OSView_RxISRHandler (void)
{
}
/*$PAGE*/
/*
*********************************************************************************************************
* Rx/Tx Communication handler for uC/OS-View
*
* Description: This function is called when the i.MX21 received or transmits a serial byte
* Note(s) : The receive interrupt is cleared automatically when the FIFO has no bytes
* in it. In this case, the FIFO is set to cause an interrupt when 1 byte
* arrives, therefore, 1 read clears the flag.
*********************************************************************************************************
*/
void OSView_RxTxISRHandler (void)
{
INT8U rx_data;
if ((USR1_1 & UART_RRDY) == UART_RRDY) { /* Received a character? */
rx_data = (INT8U)(URXD_1 & 0x00FF); /* Read data. */
OSView_RxHandler(rx_data); /* Call the generic Rx handler */
}
if ((USR1_1 & UART_TRDY) == UART_TRDY) { /* Transmitted a character? */
OSView_TxHandler();
}
}
/*$PAGE*/
/*
*********************************************************************************************************
* Communication for uC/OS-View
*
* Description: Send 1 character to COM Port
*
* Note(s) : 1) Assumes UART #0
*********************************************************************************************************
*/
void OSView_Tx1 (INT8U c)
{
#if OS_VIEW_COMM_SEL == OS_VIEW_UART_1
UTXD_1 = (INT32U)c;
#endif
}
/*$PAGE*/
/*
*********************************************************************************************************
* Disable Tx Interrupts
*********************************************************************************************************
*/
void OSView_TxIntDis (void)
{
#if OS_CRITICAL_METHOD == 3 /* Allocate storage for CPU status register */
OS_CPU_SR cpu_sr;
cpu_sr = 0; /* Prevent compiler warning */
#endif
OS_ENTER_CRITICAL();
#if OS_VIEW_COMM_SEL == OS_VIEW_UART_1
UCR4_1 &= ~UART_TCEN; /* Disable transmit complete interrupts */
#endif
OS_EXIT_CRITICAL();
}
/*
*********************************************************************************************************
* Enable Tx Interrupts
*********************************************************************************************************
*/
void OSView_TxIntEn (void)
{
#if OS_CRITICAL_METHOD == 3 /* Allocate storage for CPU status register */
OS_CPU_SR cpu_sr;
cpu_sr = 0; /* Prevent compiler warning */
#endif
OS_ENTER_CRITICAL();
#if OS_VIEW_COMM_SEL == OS_VIEW_UART_1
UCR4_1 |= UART_TCEN; /* Enable transmit complete interrupts */
#endif
OS_EXIT_CRITICAL();
}
/*
*********************************************************************************************************
* Tx Communication handler for uC/OS-View
* (PORT SPECIFIC)
*
* Description: Handle transmission of a character
*
* Note(s) : 1) This function is called by OSView_RxISR (see OS_VIEWa.ASM)
* 2) This adaptation of uC/OS-View assumes that a 'combined' interrupt is generated by the
* UART and thus this function is not needed.
*********************************************************************************************************
*/
void OSView_TxISRHandler (void)
{
}
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