📄 jflash.cpp
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{
// Preset SA-1110 pins to default values (all others set in sa1110jtag.h)
int i;
int out_dat[300];
for(i = 0; i < 291; i++)
{
pin[i]=0;
}
putp(1,0,IP); //Run-Test/Idle
putp(1,0,IP); //Run-Test/Idle
putp(1,0,IP); //Run-Test/Idle
putp(1,0,IP); //Run-Test/Idle
putp(1,1,IP); //select DR scan
putp(1,0,IP); //capture DR
putp(1,0,IP); //shift IR
for(i = 0; i < 291; i++) // shift write data in to JTAG port and read data out
out_dat[i] = putp(pin[i],0,rp);
//putp(0,0,IP);
putp(0,1,IP); //Exit1-DR
putp(1,1,IP); //Update-DR
putp(1,0,IP); //Run-Test/Idle
putp(1,0,IP); //Run-Test/Idle
putp(1,0,IP); //Run-Test/Idle
DWORD busdat = 0;
for(i = 0; i < 32; i++) // convert serial data to single DWORD
{
busdat = busdat | (DWORD)(out_dat[dat_order[i] - 2] << i);
}
extest();
return(busdat);
}
DWORD access_bus(int rw, DWORD address, DWORD data, int rp)
{
// Preset SA-1110 pins to default values (all others set in sa1110jtag.h)
pin[nCS0_OUT] = 1;
pin[nCS1_OUT] = 1;
pin[nCS2_OUT] = 1;
pin[nCS3_OUT] = 1;
pin[nCS4_OUT] = 1;
pin[nCS5_OUT] = 1;
pin[nOE_OUT] = 0;
pin[nWE_OUT] = 1;
pin[RD_nWR_OUT] = 0;
pin[D31_0_EN] = 1;
for(int i = 0; i < 26; i++)
pin[i+28] = (int)((address >> i) & 1); // set address 0 thru 25
if(rw == READ)
{
pin[RD_nWR_OUT] = 1;
switch(address >> 27)
{
case 0:{pin[nCS0_OUT] = 0; break;}
case 1:{pin[nCS1_OUT] = 0; break;}
case 2:{pin[nCS2_OUT] = 0; break;}
case 3:{pin[nCS3_OUT] = 0; break;}
case 4:{pin[nCS4_OUT] = 0; break;}
case 5:{pin[nCS5_OUT] = 0; break;}
}
}
if(rw == WRITE)
{
pin[nWE_OUT] = 0;
pin[nOE_OUT] = 1;
pin[D31_0_EN] = 0; // switch data pins to drive
switch(address >> 27) // set CS pin for corresponding address
{
case 0:{pin[nCS0_OUT] = 0; break;}
case 1:{pin[nCS1_OUT] = 0; break;}
case 2:{pin[nCS2_OUT] = 0; break;}
case 3:{pin[nCS3_OUT] = 0; break;}
case 4:{pin[nCS4_OUT] = 0; break;}
case 5:{pin[nCS5_OUT] = 0; break;}
}
for(DWORD li = 0L; li < 32L; li++)
pin[dat_order[li]] = (int)((data >> li) & 1L); // set data pins
}
if(rw == SETUP || rw == HOLD) // just like a write except WE, WE needs setup time
{
pin[nOE_OUT] = 1;
pin[D31_0_EN] = 0;
for(DWORD li = 0L; li < 32L; li++)
pin[dat_order[li]] = (int)((data >> li) & 1L); // serialize data pins
}
if(rw == RS) // setup prior to RD_nWR_OUT
{
pin[nOE_OUT] = 1;
}
putp(1,0,IP); //Run-Test/Idle
putp(1,0,IP); //Run-Test/Idle
putp(1,0,IP); //Run-Test/Idle
putp(1,0,IP); //Run-Test/Idle
putp(1,1,IP); //select DR scan
putp(1,0,IP); //capture DR
putp(1,0,IP); //shift IR
int out_dat[300];
for(i = 0; i < 291; i++) // shift write data in to JTAG port and read data out
out_dat[i] = putp(pin[i],0,rp);
// putp(0,0,IP);
putp(0,1,IP); //Exit1-DR
putp(1,1,IP); //Update-DR
putp(1,0,IP); //Run-Test/Idle
putp(1,0,IP); //Run-Test/Idle
putp(1,0,IP); //Run-Test/Idle
DWORD busdat = 0;
for(i = 0; i < 32; i++) // convert serial data to single DWORD
{
busdat = busdat | (DWORD)(out_dat[dat_order[i] - 2] << i);
}
extest();
return(busdat);
}
int test_port(void)
{
// search for valid parallel port
_outp(LPT1, 0x55);
if((int)_inp(LPT1) == 0x55)return LPT1;
_outp(LPT2, 0x55);
if((int)_inp(LPT2) == 0x55)return LPT2;
_outp(LPT1, 0x55);
if((int)_inp(LPT3) == 0x55)return LPT3;
return(0); // return zero if none found
}
int check_id(char *device_id)
{
// compare passed device ID to the one returned from the ID command
char in_id[40];
BOOL error_flag = FALSE;
for(int i = 34; i >= 0; i--)
{
if(i == 4 || i == 21 || i == 33)
{
in_id[i] = ' ';
i--;
}
if(putp(1,0,RP) == 0)
in_id[i] = '0';
else
in_id[i] = '1';
if((in_id[i] != *(device_id + i)) && (*(device_id + i) != '*'))
{
error_flag = TRUE;
}
}
in_id[35] = 0;
printf("ACT: %s\n",in_id);
printf("EXP: %s\n",device_id);
if(error_flag)
{
printf("error, failed to read device ID\n");
printf("check cables and power\n");
return -1;
}
if(!strcmp(device_id,SA1110ID)) // print SA-1110 device revision
{
int sa_rev =
(int)(in_id[0] - '0') * 8 +
(int)(in_id[1] - '0') * 4 +
(int)(in_id[2] - '0') * 2 +
(int)(in_id[3] - '0');
switch(sa_rev)
{
case 0: printf("SA-1110 revision A0\n"); break;
case 4: printf("SA-1110 revision B0\n"); break;
case 5: printf("SA-1110 revision B1\n"); break;
case 6: printf("SA-1110 revision B2\n"); break;
case 8: printf("SA-1110 revision B4\n"); break;
default: printf("SA-1110 revision B4 + %d\n",sa_rev - 8);
}
}
return 0;
}
void error_out(char *error_string)
{
printf("%s\n",error_string);
exit(0);
}
void erase_flash(DWORD base_address, DWORD fsize, DWORD block_size, DWORD max_erase_time, int block_number)
{
time_t start, now;
printf("Starting erase\n");
for(DWORD lj = base_address; lj < fsize + base_address; lj = lj + block_size) // Erase only blocks to be programmed
{
access_rom(SETUP, 0, 0x200020L, IP); // Erase block command
access_rom(WRITE, 0, 0x200020L, IP);
access_rom(HOLD, 0, 0x200020L, IP);
access_rom(SETUP, lj, 0xd000d0L, IP); // Erase confirm at the block address
access_rom(WRITE, lj, 0xd000d0L, IP);
access_rom(HOLD, lj, 0xd000d0L, IP);
time(&start);
printf("Erasing block %3d \r",block_number++);
while(access_rom(RS, 0, 0, RP) != 0x800080L) // Loop until successful status return
{
access_rom(READ, 0, 0, RP);
time(&now);
if(difftime(now,start) > max_erase_time + 1) // Check for erase timeout
error_out("Error, Block erase timed out");
}
}
printf("Erasing done \n");
}
void program_flash(DWORD max_write_buffer, DWORD base_address, DWORD fsize)
{
time_t start, now;
DWORD li;
printf("Starting programming\n");
// "Write Buffer" flow.
// This uses almost half the cycles required by "word programming" flow
// Status register is not read to save time. There is also no checking to see
// if maximum "Write Buffer Program Time" is violated. However even with the
// fastest parallel port bus speed this should not be a problem
// (i.e. 16 words * 300 JTAG chain length * 4 parallel port cycles * 1uS fast
// parallel port cycle = 19mS, typical write buffer program times are in the 200uS range).
DWORD write_word_count = (max_write_buffer - 1) + ((max_write_buffer - 1) << 16);
time(&start);
for(DWORD lj = base_address; lj < fsize + base_address; lj = lj + max_write_buffer)
{
access_rom(WRITE, lj, 0xe800e8L, IP); // write buffer command
access_rom(HOLD, lj, 0xe800e8L, IP);
access_rom(WRITE, lj, write_word_count, IP); // write word count (max write buffer size)
access_rom(HOLD, lj, write_word_count, IP);
time(&now);
if(difftime(now,start) > STATUS_UPDATE) // Update status every 2 seconds
{
printf("Writing flash at hex address %8lx, %5.2f%% done \r"
,lj,(float)(lj - base_address)/(float)fsize*100.0);
time(&start);
}
for(DWORD lk = 0; lk < max_write_buffer; lk++)
{
fread((DWORD *)&li, sizeof(DWORD) , 1, in_file);
access_rom(WRITE, lj+lk, li, IP); // Write buffer data
access_rom(HOLD, lj+lk, li, IP); // New
}
access_rom(WRITE, 0, 0xd000d0L, IP); // Program Buffer to Flash Confirm
access_rom(HOLD, 0, 0xd000d0L, IP); //New
}
printf("Programming done \nStarting verify\n");
rewind(in_file);
}
void verify_flash(DWORD base_address, DWORD fsize)
{
time_t start, now;
DWORD li, li1;
time(&start);
for(DWORD lj = base_address + 1; lj <= fsize + base_address; lj++)
{
fread((DWORD *)&li, sizeof(DWORD) , 1, in_file);
li1 = access_rom(READ, lj, 0x0L, RP);
time(&now);
if(difftime(now,start) > STATUS_UPDATE) // Update status every 2 seconds
{
printf("Verifying flash at hex address %8lx, %5.2f%% done \r"
,lj,(float)(lj - base_address)/(float)fsize*100.0);
time(&start);
}
if(li != li1)
{
printf("verify error at address = %lx exp_dat = %lx act_dat = %lx\n",lj - 1,li,li1);
exit(1);
}
}
printf("Verification successful! \n");
}
void test_logic_reset(void)
{
putp(1,1,IP); // keep TMS set to 1 force a test logic reset
putp(1,1,IP); // no matter where you are in the TAP controller
putp(1,1,IP);
putp(1,1,IP);
putp(1,1,IP);
putp(1,1,IP);
}
void test_lock_flash(DWORD base_address, DWORD fsize, DWORD block_size, DWORD max_erase_time, int block_number)
{
time_t start, now;
for(DWORD lj = base_address; lj < fsize + base_address; lj = lj + block_size) // Test only blocks to be programmed
{
access_rom(SETUP, 0, 0x900090L, IP); // Read Identifier Codes
access_rom(WRITE, 0, 0x900090L, IP);
access_rom(HOLD, 0, 0x900090L, IP);
access_rom(READ, lj + 2, 0, IP); // read lock configuration (extra read to get JTAG pipeline going)
if(access_rom(READ, lj + 2, 0, RP) == 0x10001)
{
printf("Block of Flash Memory is Write Locked, would you like to unlock it? [y/n]: ");
if(toupper(_getche()) == 'Y')
{
printf("\nblock is locked\n");
access_rom(SETUP, 0, 0x600060L, IP); // Clear block lock bit command
access_rom(WRITE, 0, 0x600060L, IP);
access_rom(HOLD, 0, 0x600060L, IP);
access_rom(SETUP, lj, 0xd000d0L, IP); // Confirm
access_rom(WRITE, lj, 0xd000d0L, IP);
access_rom(HOLD, lj, 0xd000d0L, IP);
time(&start);
printf("Unlocking block %3d \r",block_number++);
while(access_rom(RS, 0, 0, RP) != 0x800080L) // Loop until successful status return
{
access_rom(READ, 0, 0, RP);
time(&now);
if(difftime(now,start) > max_erase_time + 1) // Check for status timeout
error_out("\nError, Clear lock timed out");
}
}
else
error_out("\nUnable to program Write Locked Flash Memory Block");
}
}
}
void set_lock_flash(DWORD base_address, DWORD fsize, DWORD block_size, DWORD max_erase_time, int block_number)
{
time_t start, now;
printf("Starting set block lock bit\n");
for(DWORD lj = base_address; lj < fsize + base_address; lj = lj + block_size) // Erase only blocks to be programmed
{
access_rom(SETUP, 0, 0x600060L, IP); // block lock bit command
access_rom(WRITE, 0, 0x600060L, IP);
access_rom(HOLD, 0, 0x600060L, IP);
access_rom(SETUP, lj, 0x10001L, IP); // Confirm
access_rom(WRITE, lj, 0x10001L, IP);
access_rom(HOLD, lj, 0x10001L, IP);
time(&start);
printf("Erasing block %3d \r",block_number++);
while(access_rom(RS, 0, 0, RP) != 0x800080L) // Loop until successful status return
{
access_rom(READ, 0, 0, RP);
time(&now);
if(difftime(now,start) > max_erase_time + 1) // Check for status timeout
error_out("Error, Clear lock timed out");
}
}
printf("Set lock bit done \n");
}
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