s390.md

gcc3.2.1源代码

    {
      case 0:
	return \"mvc\\t%O0(%b2+1,%R0),%1\";

      case 1:
	output_asm_insn (\"bras\\t%3,.+10\", operands);
	output_asm_insn (\"mvc\\t%O0(1,%R0),%1\", operands);
	return \"ex\\t%2,0(%3)\";

      default:
        abort ();
    }
}"
  [(set_attr "op_type" "SS,NN")
   (set_attr "atype"   "mem,mem")
   (set_attr "length"  "*,14")])

(define_insn "movstrsi_short"
  [(set (match_operand:BLK 0 "s_operand" "=oQ,oQ")
        (match_operand:BLK 1 "s_operand" "oQ,oQ"))
   (use (match_operand:SI 2 "nonmemory_operand" "n,a"))
   (clobber (match_scratch:SI 3 "=X,&a"))]
  "!TARGET_64BIT"
  "*
{
  switch (which_alternative)
    {
      case 0:
	return \"mvc\\t%O0(%b2+1,%R0),%1\";

      case 1:
	output_asm_insn (\"bras\\t%3,.+10\", operands);
	output_asm_insn (\"mvc\\t%O0(1,%R0),%1\", operands);
	return \"ex\\t%2,0(%3)\";

      default:
        abort ();
    }
}"
  [(set_attr "op_type" "SS,NN")
   (set_attr "atype"   "mem,mem")
   (set_attr "length"  "*,14")])

; Move a block that is a multiple of 256 bytes in length

(define_insn "movstrdi_long"
  [(set (match_operand:DI 4 "register_operand" "=d")
        (const_int 0))
   (set (match_operand:DI 0 "register_operand" "=a")
        (plus:DI (match_operand:DI 2 "register_operand" "0")
                 (ashift:DI (match_operand:DI 5 "register_operand" "4")
                            (const_int 8))))
   (set (match_operand:DI 1 "register_operand" "=a")
        (plus:DI (match_operand:DI 3 "register_operand" "1")
                 (ashift:DI (match_dup 5) (const_int 8))))
   (set (mem:BLK (match_dup 2))
        (mem:BLK (match_dup 3)))
   (use (match_dup 5))]
  "TARGET_64BIT"
  "*
{
  output_asm_insn (\"mvc\\t0(256,%0),0(%1)\", operands);
  output_asm_insn (\"la\\t%0,256(%0)\", operands);
  output_asm_insn (\"la\\t%1,256(%1)\", operands);
  return \"brct\\t%4,.-14\";
}"
  [(set_attr "op_type" "NN")
   (set_attr "atype"   "mem")
   (set_attr "length"  "18")])

(define_insn "movstrsi_long"
  [(set (match_operand:SI 4 "register_operand" "=d")
        (const_int 0))
   (set (match_operand:SI 0 "register_operand" "=a")
        (plus:SI (match_operand:SI 2 "register_operand" "0")
                 (ashift:SI (match_operand:SI 5 "register_operand" "4")
                            (const_int 8))))
   (set (match_operand:SI 1 "register_operand" "=a")
        (plus:SI (match_operand:SI 3 "register_operand" "1")
                 (ashift:SI (match_dup 5) (const_int 8))))
   (set (mem:BLK (match_dup 2))
        (mem:BLK (match_dup 3)))
   (use (match_dup 5))]
  "!TARGET_64BIT"
  "*
{
  output_asm_insn (\"mvc\\t0(256,%0),0(%1)\", operands);
  output_asm_insn (\"la\\t%0,256(%0)\", operands);
  output_asm_insn (\"la\\t%1,256(%1)\", operands);
  return \"brct\\t%4,.-14\";
}"
  [(set_attr "op_type" "NN")
   (set_attr "atype"   "mem")
   (set_attr "length"  "18")])

; Move a block that is larger than 255 bytes in length.

(define_insn "movstrdi_64"
  [(set (match_operand:TI 0 "register_operand" "=d")
        (ashift:TI (plus:TI (match_operand:TI 2 "register_operand" "0")
                            (lshiftrt:TI (match_dup 2) (const_int 64)))
                   (const_int 64)))
   (set (match_operand:TI 1 "register_operand" "=d")
        (ashift:TI (plus:TI (match_operand:TI 3 "register_operand" "1")
                            (lshiftrt:TI (match_dup 3) (const_int 64)))
                   (const_int 64)))
   (set (mem:BLK (subreg:DI (match_dup 2) 0))
        (mem:BLK (subreg:DI (match_dup 3) 0)))
   (clobber (reg:CC 33))]
  "TARGET_64BIT"
  "mvcle\\t%0,%1,0\;jo\\t.-4"
  [(set_attr "op_type" "NN")
   (set_attr "atype"   "mem")
   (set_attr "length"  "8")])

(define_insn "movstrsi_31"
  [(set (match_operand:DI 0 "register_operand" "=d")
        (ashift:DI (plus:DI (match_operand:DI 2 "register_operand" "0")
                            (lshiftrt:DI (match_dup 2) (const_int 32)))
                   (const_int 32)))
   (set (match_operand:DI 1 "register_operand" "=d")
        (ashift:DI (plus:DI (match_operand:DI 3 "register_operand" "1")
                            (lshiftrt:DI (match_dup 3) (const_int 32)))
                   (const_int 32)))
   (set (mem:BLK (subreg:SI (match_dup 2) 0))
        (mem:BLK (subreg:SI (match_dup 3) 0)))
   (clobber (reg:CC 33))]
  "!TARGET_64BIT"
  "mvcle\\t%0,%1,0\;jo\\t.-4"
   [(set_attr "op_type" "NN")
    (set_attr "atype" "mem")
    (set_attr "length"  "8")])

;
; clrstrdi instruction pattern(s).
;

(define_expand "clrstrdi"
  [(set (match_operand:BLK 0 "general_operand" "")
        (const_int 0))
   (use (match_operand:DI 1 "general_operand" ""))
   (match_operand 2 "" "")]
  "TARGET_64BIT"
  "
{
   rtx addr = force_operand (XEXP (operands[0], 0), NULL_RTX);

   operands[0] = change_address (operands[0], VOIDmode, addr);

   if (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) < 256)
     {
        emit_insn (gen_clrstrsico (operands[0], operands[1]));
        DONE;
     }
   else
     {
      rtx reg0 = gen_reg_rtx (TImode);
      rtx reg1 = gen_reg_rtx (TImode);
      rtx len = operands[1];

      if (! CONSTANT_P (len))
          len = force_reg (DImode, len);

      /* Load up the address+length pairs.  */

      emit_move_insn (gen_highpart (DImode, reg0), addr);
      emit_move_insn (gen_lowpart (DImode, reg0), len);

      emit_move_insn (gen_lowpart (DImode, reg1), const0_rtx);
 
      /* Clear! */
      emit_insn (gen_clrstrsi_64 (reg0, reg1, reg0));
      DONE;	
     }
}")

;
; clrstrsi instruction pattern(s).
;

(define_expand "clrstrsi"
  [(set (match_operand:BLK 0 "general_operand" "")
        (const_int 0))
   (use (match_operand:SI 1 "general_operand" ""))
   (match_operand 2 "" "")]
   "!TARGET_64BIT"
   "
{
   rtx addr = force_operand (XEXP (operands[0], 0), NULL_RTX);

   operands[0] = change_address (operands[0], VOIDmode, addr);

   if (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) < 256)
     {
        emit_insn (gen_clrstrsico (operands[0], operands[1]));
        DONE;
     }
   else
     {
      rtx reg0 = gen_reg_rtx (DImode);
      rtx reg1 = gen_reg_rtx (DImode);
      rtx len = operands[1];

      if (! CONSTANT_P (len))
          len = force_reg (SImode, len);

      /* Load up the address+length pairs.  */

      emit_move_insn (gen_highpart (SImode, reg0), addr);
      emit_move_insn (gen_lowpart (SImode, reg0), len);

      emit_move_insn (gen_lowpart (SImode, reg1), const0_rtx);
 
      /* CLear! */
      emit_insn (gen_clrstrsi_31 (reg0, reg1, reg0));
      DONE;	
     }
}")

; Clear memory with length less than 256 bytes 

(define_insn "clrstrsico"
  [(set (match_operand:BLK 0 "s_operand" "=Qo")
        (const_int 0))
   (use (match_operand 1 "immediate_operand" "I"))
   (clobber (reg:CC 33))]
  ""
  "xc\\t%O0(%1,%R0),%0"	
  [(set_attr "op_type" "RS")
   (set_attr "type"    "cs")
   (set_attr "atype"   "mem")])

; Clear memory with length greater 256 bytes or lenght not constant

(define_insn "clrstrsi_64"
  [(set (match_operand:TI 0 "register_operand" "=d")
        (ashift:TI (plus:TI (match_operand:TI 2 "register_operand" "0")
                            (lshiftrt:TI (match_dup 2) (const_int 64)))
                   (const_int 64)))
   (set (mem:BLK (subreg:DI (match_dup 2) 0))
        (const_int 0))
   (use (match_operand:TI 1 "register_operand" "d"))
   (clobber (reg:CC 33))]
  "TARGET_64BIT"
  "mvcle\\t%0,%1,0\;jo\\t.-4"
  [(set_attr "op_type" "NN")
   (set_attr "atype"   "mem")
   (set_attr "type"    "vs")
   (set_attr "length"  "8")])

(define_insn "clrstrsi_31"
  [(set (match_operand:DI 0 "register_operand" "=d")
        (ashift:DI (plus:DI (match_operand:DI 2 "register_operand" "0")
                            (lshiftrt:DI (match_dup 2) (const_int 32)))
                   (const_int 32)))
   (set (mem:BLK (subreg:SI (match_dup 2) 0))
        (const_int 0))
   (use (match_operand:DI 1 "register_operand" "d"))
   (clobber (reg:CC 33))]
  "!TARGET_64BIT"
  "mvcle\\t%0,%1,0\;jo\\t.-4"
  [(set_attr "op_type" "NN")
   (set_attr "atype"   "mem")
   (set_attr "type"    "vs")
   (set_attr "length"  "8")])

;
; cmpstrdi instruction pattern(s).
;

(define_expand "cmpstrdi"
   [(set (match_operand:DI 0 "register_operand" "")
         (compare:DI (match_operand:BLK 1 "s_operand" "")
                  (match_operand:BLK 2 "s_operand" "") ) )
             (use (match_operand:DI 3  "general_operand" ""))
             (use (match_operand:DI 4  "" ""))]
   "TARGET_64BIT"
   "
{
  rtx addr0, addr1;

  /* for pre/post increment */
  operands[1] = protect_from_queue (operands[1], 0);
  operands[2] = protect_from_queue (operands[2], 0);
  operands[3] = protect_from_queue (operands[3], 0);

  addr0 = force_operand (XEXP (operands[1], 0), NULL_RTX);
  addr1 = force_operand (XEXP (operands[2], 0), NULL_RTX);

  if (GET_CODE (operands[3]) == CONST_INT && INTVAL (operands[3]) < 256) 
    {
      if (INTVAL (operands[3]) == 0) {
	emit_move_insn (operands[0], operands[3]);
	DONE;
      }

      operands[1] = change_address (operands[1], VOIDmode, addr0);
      operands[2] = change_address (operands[2], VOIDmode, addr1);

      emit_insn (gen_cmpstr_const (operands[1], operands[2], operands[3]));
      emit_insn (gen_cmpint_di (operands[0]));
      DONE;
    }
  else
    {	
      /* implementation suggested by  Richard Henderson <[e-mail]> */
      rtx reg0 = gen_reg_rtx (TImode);
      rtx reg1 = gen_reg_rtx (TImode);
      rtx len = operands[3];

      if (! CONSTANT_P (len))
          len = force_reg (DImode, len);

      /* Load up the address+length pairs.  */
      emit_move_insn (gen_highpart (DImode, reg0), addr0); 
      emit_move_insn (gen_lowpart (DImode, reg0), len);

      emit_move_insn (gen_highpart (DImode, reg1), addr1);
      emit_move_insn (gen_lowpart (DImode, reg1), len);

      /* Compare! */
      emit_insn (gen_cmpstr_64 (reg0, reg1, reg0, reg1));
      emit_insn (gen_cmpint_di (operands[0]));
      DONE;
    }
}")

;
; cmpstrsi instruction pattern(s).
;

(define_expand "cmpstrsi"
   [(set (match_operand:SI 0 "register_operand" "")
         (compare:SI (match_operand:BLK 1 "s_operand" "")
                  (match_operand:BLK 2 "s_operand" "") ) )
             (use (match_operand:SI 3  "general_operand" ""))
             (use (match_operand:SI 4  "" ""))]
   ""
   "
{
  rtx addr0, addr1;

  /* for pre/post increment */
  operands[1] = protect_from_queue (operands[1], 0);
  operands[2] = protect_from_queue (operands[2], 0);
  operands[3] = protect_from_queue (operands[3], 0);

  addr0 = force_operand (XEXP (operands[1], 0), NULL_RTX);
  addr1 = force_operand (XEXP (operands[2], 0), NULL_RTX);

  if (GET_CODE (operands[3]) == CONST_INT && INTVAL (operands[3]) < 256) 
    {
      if (INTVAL (operands[3]) == 0) {
	emit_move_insn (operands[0], operands[3]);
	DONE;
      }

      operands[1] = change_address (operands[1], VOIDmode, addr0);
      operands[2] = change_address (operands[2], VOIDmode, addr1);

      emit_insn (gen_cmpstr_const (operands[1], operands[2], operands[3]));
      emit_insn (gen_cmpint_si (operands[0]));
      DONE;
    }
  else
    {	
      /* implementation suggested by  Richard Henderson <[e-mail]> */
      rtx reg0, reg1;
      rtx len = operands[3];

      if (TARGET_64BIT)
	{
	  reg0 = gen_reg_rtx (TImode);
	  reg1 = gen_reg_rtx (TImode);
	}
      else
	{
	  reg0 = gen_reg_rtx (DImode);
	  reg1 = gen_reg_rtx (DImode);
        }  

      /* Load up the address+length pairs.  */
      emit_move_insn (gen_highpart (Pmode, reg0), addr0); 
      convert_move (gen_lowpart (Pmode, reg0), len, 1);

      emit_move_insn (gen_highpart (Pmode, reg1), addr1);
      convert_move (gen_lowpart (Pmode, reg1), len, 1);

      /* Compare! */
      if (TARGET_64BIT) 
          emit_insn (gen_cmpstr_64 (reg0, reg1, reg0, reg1));
      else
          emit_insn (gen_cmpstr_31 (reg0, reg1, reg0, reg1));

      emit_insn (gen_cmpint_si (operands[0]));
      DONE;
    }
}")

; Compare a block that is less than 256 bytes in length.

(define_insn "cmpstr_const"
  [(set (reg:CCS 33)
        (compare:CCS (match_operand:BLK 0 "s_operand" "oQ")
                     (match_operand:BLK 1 "s_operand" "oQ")))
   (use (match_operand 2 "immediate_operand" "I"))]
  "(unsigned) INTVAL (operands[2]) < 256"
  "clc\\t%O0(%c2,%R0),%1"
  [(set_attr "op_type" "SS")
   (set_attr "atype"   "mem")
   (set_attr "type"    "cs")])

; Compare a block that is larger than 255 bytes in length.

(define_insn "cmpstr_64"
  [(clobber (match_operand:TI 0 "register_operand" "=d"))
   (clobber (match_operand:TI 1 "register_operand" "=d"))
   (set (reg:CCS 33)
        (compare:CCS (mem:BLK (subreg:DI (match_operand:TI 2 "register_operand" "0") 0))
                     (mem:BLK (subreg:DI (match_operand:TI 3 "register_operand" "1") 0))))]
  "TARGET_64BIT"
  "clcl\\t%0,%1"
  [(set_attr "op_type" "RR")
   (set_attr "atype"   "mem")
   (set_attr "type"    "vs")])

(define_insn "cmpstr_31"
  [(clobber (match_operand:DI 0 "register_operand" "=d"))
   (clobber (match_operand:DI 1 "register_operand" "=d"))
   (set (reg:CCS 33)
        (compare:CCS (