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(match_operand:DF 1 "memory_operand" ""))] "!TARGET_64BIT && reload_completed && !fp_operand (operands[0], VOIDmode) && !fp_operand (operands[1], VOIDmode) && !s_operand (operands[1], VOIDmode)" [(set (match_dup 2) (match_dup 3)) (set (match_dup 0) (mem:DI (match_dup 2)))] "operands[2] = operand_subword (operands[0], 1, 0, DFmode); operands[3] = legitimize_la_operand (XEXP (operands[1], 0));");; movsf instruction pattern(s).;(define_expand "movsf" [(set (match_operand:SF 0 "nonimmediate_operand" "") (match_operand:SF 1 "general_operand" ""))] "" "{ /* During and after reload, we need to force constants to the literal pool ourselves, if necessary. */ if ((reload_in_progress || reload_completed) && CONSTANT_P (operands[1])) operands[1] = force_const_mem (SFmode, operands[1]);}")(define_insn "*movsf_ss" [(set (match_operand:SF 0 "s_operand" "=Qo") (match_operand:SF 1 "s_imm_operand" "Qo"))] "" "mvc\\t%O0(4,%R0),%1" [(set_attr "op_type" "SS") (set_attr "atype" "mem")])(define_insn "*movsf" [(set (match_operand:SF 0 "nonimmediate_operand" "=f,f,m,d,d,m") (match_operand:SF 1 "general_operand" "f,m,f,d,m,d"))] "" "@ ler\\t%0,%1 le\\t%0,%1 ste\\t%1,%0 lr\\t%0,%1 l\\t%0,%1 st\\t%1,%0" [(set_attr "op_type" "RR,RX,RX,RR,RX,RX") (set_attr "atype" "reg,mem,mem,reg,mem,mem")]);; load_multiple pattern(s).;(define_expand "load_multiple" [(match_par_dup 3 [(set (match_operand 0 "" "") (match_operand 1 "" "")) (use (match_operand 2 "" ""))])] "" "{ int regno; int count; rtx from; int i, off; /* Support only loading a constant number of fixed-point registers from memory and only bother with this if more than two */ if (GET_CODE (operands[2]) != CONST_INT || INTVAL (operands[2]) < 2 || INTVAL (operands[2]) > 16 || GET_CODE (operands[1]) != MEM || GET_CODE (operands[0]) != REG || REGNO (operands[0]) >= 16) FAIL; count = INTVAL (operands[2]); regno = REGNO (operands[0]); operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count)); if (no_new_pseudos) { if (GET_CODE (XEXP (operands[1], 0)) == REG) { from = XEXP (operands[1], 0); off = 0; } else if (GET_CODE (XEXP (operands[1], 0)) == PLUS && GET_CODE (XEXP (XEXP (operands[1], 0), 0)) == REG && GET_CODE (XEXP (XEXP (operands[1], 0), 1)) == CONST_INT) { from = XEXP (XEXP (operands[1], 0), 0); off = INTVAL (XEXP (XEXP (operands[1], 0), 1)); } else FAIL; if (from == frame_pointer_rtx || from == arg_pointer_rtx) FAIL; } else { from = force_reg (Pmode, XEXP (operands[1], 0)); off = 0; } for (i = 0; i < count; i++) XVECEXP (operands[3], 0, i) = gen_rtx_SET (VOIDmode, gen_rtx_REG (Pmode, regno + i), change_address (operands[1], Pmode, plus_constant (from, off + i * UNITS_PER_WORD)));}")(define_insn "*load_multiple_di" [(match_parallel 0 "load_multiple_operation" [(set (match_operand:DI 1 "register_operand" "=r") (match_operand:DI 2 "s_operand" "oQ"))])] "" "*{ int words = XVECLEN (operands[0], 0); if (XVECLEN (operands[0], 0) == 1) return \"lg\\t%1,0(%2)\"; operands[0] = gen_rtx_REG (DImode, REGNO (operands[1]) + words - 1); return \"lmg\\t%1,%0,%2\";}" [(set_attr "op_type" "RXE") (set_attr "atype" "mem") (set_attr "type" "lm")])(define_insn "*load_multiple_si" [(match_parallel 0 "load_multiple_operation" [(set (match_operand:SI 1 "register_operand" "=r") (match_operand:SI 2 "s_operand" "oQ"))])] "" "*{ int words = XVECLEN (operands[0], 0); if (XVECLEN (operands[0], 0) == 1) return \"l\\t%1,0(%2)\"; operands[0] = gen_rtx_REG (SImode, REGNO (operands[1]) + words - 1); return \"lm\\t%1,%0,%2\";}" [(set_attr "op_type" "RXE") (set_attr "atype" "mem") (set_attr "type" "lm")]);; store multiple pattern(s). ;(define_expand "store_multiple" [(match_par_dup 3 [(set (match_operand 0 "" "") (match_operand 1 "" "")) (use (match_operand 2 "" ""))])] "" "{ int regno; int count; rtx to; int i, off; /* Support only storing a constant number of fixed-point registers to memory and only bother with this if more than two. */ if (GET_CODE (operands[2]) != CONST_INT || INTVAL (operands[2]) < 2 || INTVAL (operands[2]) > 16 || GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != REG || REGNO (operands[1]) >= 16) FAIL; count = INTVAL (operands[2]); regno = REGNO (operands[1]); operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count)); if (no_new_pseudos) { if (GET_CODE (XEXP (operands[0], 0)) == REG) { to = XEXP (operands[0], 0); off = 0; } else if (GET_CODE (XEXP (operands[0], 0)) == PLUS && GET_CODE (XEXP (XEXP (operands[0], 0), 0)) == REG && GET_CODE (XEXP (XEXP (operands[0], 0), 1)) == CONST_INT) { to = XEXP (XEXP (operands[0], 0), 0); off = INTVAL (XEXP (XEXP (operands[0], 0), 1)); } else FAIL; if (to == frame_pointer_rtx || to == arg_pointer_rtx) FAIL; } else { to = force_reg (Pmode, XEXP (operands[0], 0)); off = 0; } for (i = 0; i < count; i++) XVECEXP (operands[3], 0, i) = gen_rtx_SET (VOIDmode, change_address (operands[0], Pmode, plus_constant (to, off + i * UNITS_PER_WORD)), gen_rtx_REG (Pmode, regno + i));}")(define_insn "*store_multiple_di" [(match_parallel 0 "store_multiple_operation" [(set (match_operand:DI 1 "s_operand" "=oQ") (match_operand:DI 2 "register_operand" "r"))])] "" "*{ int words = XVECLEN (operands[0], 0); if (XVECLEN (operands[0], 0) == 1) return \"stg\\t%1,0(%2)\"; operands[0] = gen_rtx_REG (DImode, REGNO (operands[2]) + words - 1); return \"stmg\\t%2,%0,%1\";}" [(set_attr "op_type" "RXE") (set_attr "atype" "mem") (set_attr "type" "stm")])(define_insn "*store_multiple_si" [(match_parallel 0 "store_multiple_operation" [(set (match_operand:SI 1 "s_operand" "=oQ") (match_operand:SI 2 "register_operand" "r"))])] "" "*{ int words = XVECLEN (operands[0], 0); if (XVECLEN (operands[0], 0) == 1) return \"st\\t%1,0(%2)\"; operands[0] = gen_rtx_REG (SImode, REGNO (operands[2]) + words - 1); return \"stm\\t%2,%0,%1\";}" [(set_attr "op_type" "RXE") (set_attr "atype" "mem") (set_attr "type" "stm")]);;;; String instructions.;;;; movstrdi instruction pattern(s).;(define_expand "movstrdi" [(set (match_operand:BLK 0 "general_operand" "") (match_operand:BLK 1 "general_operand" "")) (use (match_operand:DI 2 "general_operand" "")) (match_operand 3 "" "")] "TARGET_64BIT" "{ rtx addr0, addr1; addr0 = force_operand (XEXP (operands[0], 0), NULL_RTX); addr1 = force_operand (XEXP (operands[1], 0), NULL_RTX); if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) <= 256) { operands[0] = change_address (operands[0], VOIDmode, addr0); operands[1] = change_address (operands[1], VOIDmode, addr1); operands[2] = GEN_INT (INTVAL (operands[2]) - 1); emit_insn (gen_movstrdi_short (operands[0], operands[1], operands[2])); DONE; } else { if (TARGET_MVCLE) { /* implementation suggested by Richard Henderson <rth@cygnus.com> */ rtx reg0 = gen_reg_rtx (TImode); rtx reg1 = gen_reg_rtx (TImode); rtx len = operands[2]; if (! CONSTANT_P (len)) len = force_reg (DImode, len); /* Load up the address+length pairs. */ emit_move_insn (gen_highpart (DImode, reg0), addr0); emit_move_insn (gen_lowpart (DImode, reg0), len); emit_move_insn (gen_highpart (DImode, reg1), addr1); emit_move_insn (gen_lowpart (DImode, reg1), len); /* MOVE */ emit_insn (gen_movstrdi_64 (reg0, reg1, reg0, reg1)); DONE; } else { rtx label1 = gen_label_rtx (); rtx label2 = gen_label_rtx (); rtx reg0, reg1, len, blocks; reg0 = gen_reg_rtx (DImode); reg1 = gen_reg_rtx (DImode); len = gen_reg_rtx (DImode); blocks = gen_reg_rtx (DImode); emit_move_insn (len, operands[2]); emit_insn (gen_cmpdi (len, const0_rtx)); emit_jump_insn (gen_beq (label1)); emit_move_insn (reg0, addr0); emit_move_insn (reg1, addr1); emit_insn (gen_adddi3 (len, len, constm1_rtx)); emit_insn (gen_ashrdi3 (blocks, len, GEN_INT (8))); emit_insn (gen_cmpdi (blocks, const0_rtx)); emit_jump_insn (gen_beq (label2)); emit_insn (gen_movstrdi_long (reg0, reg1, reg0, reg1, blocks, blocks)); emit_label (label2); operands[0] = change_address (operands[0], VOIDmode, reg0); operands[1] = change_address (operands[1], VOIDmode, reg1); emit_insn (gen_movstrdi_short (operands[0], operands[1], len)); emit_label (label1); DONE; } }}");; movstrsi instruction pattern(s).;(define_expand "movstrsi" [(set (match_operand:BLK 0 "general_operand" "") (match_operand:BLK 1 "general_operand" "")) (use (match_operand:SI 2 "general_operand" "")) (match_operand 3 "" "")] "!TARGET_64BIT" "{ rtx addr0 = force_operand (XEXP (operands[0], 0), NULL_RTX); rtx addr1 = force_operand (XEXP (operands[1], 0), NULL_RTX); if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) <= 256) { operands[0] = change_address (operands[0], VOIDmode, addr0); operands[1] = change_address (operands[1], VOIDmode, addr1); operands[2] = GEN_INT (INTVAL (operands[2]) - 1); emit_insn (gen_movstrsi_short (operands[0], operands[1], operands[2])); DONE; } else { if (TARGET_MVCLE) { /* implementation suggested by Richard Henderson <rth@cygnus.com> */ rtx reg0 = gen_reg_rtx (DImode); rtx reg1 = gen_reg_rtx (DImode); rtx len = operands[2]; if (! CONSTANT_P (len)) len = force_reg (SImode, len); /* Load up the address+length pairs. */ emit_move_insn (gen_highpart (SImode, reg0), addr0); emit_move_insn (gen_lowpart (SImode, reg0), len); emit_move_insn (gen_highpart (SImode, reg1), addr1); emit_move_insn (gen_lowpart (SImode, reg1), len); /* MOVE */ emit_insn (gen_movstrsi_31 (reg0, reg1, reg0, reg1)); DONE; } else { rtx label1 = gen_label_rtx (); rtx label2 = gen_label_rtx (); rtx reg0, reg1, len, blocks; reg0 = gen_reg_rtx (SImode); reg1 = gen_reg_rtx (SImode); len = gen_reg_rtx (SImode); blocks = gen_reg_rtx (SImode); emit_move_insn (len, operands[2]); emit_insn (gen_cmpsi (len, const0_rtx)); emit_jump_insn (gen_beq (label1)); emit_move_insn (reg0, addr0); emit_move_insn (reg1, addr1); emit_insn (gen_addsi3 (len, len, constm1_rtx)); emit_insn (gen_ashrsi3 (blocks, len, GEN_INT (8))); emit_insn (gen_cmpsi (blocks, const0_rtx)); emit_jump_insn (gen_beq (label2)); emit_insn (gen_movstrsi_long (reg0, reg1, reg0, reg1, blocks, blocks)); emit_label (label2); operands[0] = change_address (operands[0], VOIDmode, reg0); operands[1] = change_address (operands[1], VOIDmode, reg1); emit_insn (gen_movstrsi_short (operands[0], operands[1], len)); emit_label (label1); DONE; } }}"); Move a block that is up to 256 bytes in length.; The block length is taken as (operands[2] % 256) + 1.(define_insn "movstrdi_short" [(set (match_operand:BLK 0 "s_operand" "=oQ,oQ") (match_operand:BLK 1 "s_operand" "oQ,oQ")) (use (match_operand:DI 2 "nonmemory_operand" "n,a")) (clobber (match_scratch:DI 3 "=X,&a"))] "TARGET_64BIT" "*{ switch (which_alternative)
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