s390.md

gcc3.2.1源代码

  [(set (match_dup 2) (match_dup 3))
   (set (match_dup 0) (mem:TI (match_dup 2)))]
  "operands[2] = operand_subword (operands[0], 1, 0, TImode);
   operands[3] = legitimize_la_operand (XEXP (operands[1], 0));")

;
; movdi instruction pattern(s).
;

;; If generating PIC code and operands[1] is a symbolic CONST, emit a
;; move to get the address of the symbolic object from the GOT.

(define_expand "movdi"
  [(set (match_operand:DI 0 "general_operand" "")
        (match_operand:DI 1 "general_operand" ""))]
  ""
  "
{
  /* Handle PIC symbolic constants.  */
  if (TARGET_64BIT && flag_pic && SYMBOLIC_CONST (operands[1]))
    emit_pic_move (operands, DImode);

  /* During and after reload, we need to force constants
     to the literal pool ourselves, if necessary.  */
  if ((reload_in_progress || reload_completed)
      && CONSTANT_P (operands[1]) 
      && (!legitimate_reload_constant_p (operands[1])
          || fp_operand (operands[0], VOIDmode)))
    operands[1] = force_const_mem (DImode, operands[1]);
}")

(define_insn "*movdi_lhi"
  [(set (match_operand:DI 0 "register_operand" "=d")
        (match_operand:DI 1 "immediate_operand" "K"))]
  "TARGET_64BIT
   && GET_CODE (operands[1]) == CONST_INT
   && CONST_OK_FOR_LETTER_P (INTVAL (operands[1]), 'K')
   && !fp_operand (operands[0], VOIDmode)"
  "lghi\\t%0,%h1"
  [(set_attr "op_type" "RI")
   (set_attr "atype"   "reg")])

(define_insn "*movdi_lli"
  [(set (match_operand:DI 0 "register_operand" "=d")
        (match_operand:DI 1 "immediate_operand" "n"))]
  "TARGET_64BIT && s390_single_hi (operands[1], DImode, 0) >= 0
   && !fp_operand (operands[0], VOIDmode)"
  "*
{
  int part = s390_single_hi (operands[1], DImode, 0);
  operands[1] = GEN_INT (s390_extract_hi (operands[1], DImode, part));

  switch (part)
    {
      case 0: return \"llihh\\t%0,%x1\";
      case 1: return \"llihl\\t%0,%x1\";
      case 2: return \"llilh\\t%0,%x1\";
      case 3: return \"llill\\t%0,%x1\";
      default: abort ();
    }
}"
  [(set_attr "op_type" "RI")
   (set_attr "atype"   "reg")])

(define_insn "*movdi_larl"
  [(set (match_operand:DI 0 "register_operand" "=d")
        (match_operand:DI 1 "larl_operand" "X"))]
  "TARGET_64BIT
   && !fp_operand (operands[0], VOIDmode)"
  "larl\\t%0,%1"
   [(set_attr "op_type" "RIL")
    (set_attr "atype"   "reg")
    (set_attr "type"    "la")])

(define_insn "*movdi_ss"
  [(set (match_operand:DI 0 "s_operand" "=Qo")
        (match_operand:DI 1 "s_imm_operand" "Qo"))]
  ""
  "mvc\\t%O0(8,%R0),%1"	
  [(set_attr "op_type" "SS")
   (set_attr "atype"   "mem")])

(define_insn "*movdi_64"
  [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,m,!*f,!*f,!m")
        (match_operand:DI 1 "general_operand" "d,m,d,*f,m,*f"))]
  "TARGET_64BIT"
  "@
   lgr\\t%0,%1
   lg\\t%0,%1
   stg\\t%1,%0
   ldr\\t%0,%1
   ld\\t%0,%1
   std\\t%1,%0"
  [(set_attr "op_type" "RRE,RXE,RXE,RR,RX,RX")
   (set_attr "atype"   "reg,mem,mem,reg,mem,mem")])

(define_insn "*movdi_31"
  [(set (match_operand:DI 0 "nonimmediate_operand" "=d,Q,d,m,!*f,!*f,!m")
        (match_operand:DI 1 "general_operand" "Q,d,dKm,d,*f,m,*f"))]
  "!TARGET_64BIT"
  "@
   lm\\t%0,%N0,%1
   stm\\t%1,%N1,%0
   #
   #
   ldr\\t%0,%1
   ld\\t%0,%1
   std\\t%1,%0"
  [(set_attr "op_type" "RS,RS,NN,NN,RR,RX,RX")
   (set_attr "atype"   "mem,mem,*,*,reg,mem,mem")])

(define_split
  [(set (match_operand:DI 0 "nonimmediate_operand" "")
        (match_operand:DI 1 "general_operand" ""))]
  "!TARGET_64BIT && reload_completed
   && !fp_operand (operands[0], VOIDmode)
   && !fp_operand (operands[1], VOIDmode)
   && !s_operand (operands[0], VOIDmode)
   && !s_operand (operands[1], VOIDmode)
   && (register_operand (operands[0], VOIDmode)
       || register_operand (operands[1], VOIDmode))
   && (!register_operand (operands[0], VOIDmode)
       || !reg_overlap_mentioned_p (operand_subword (operands[0], 0, 0, DImode),
                                    operands[1])
       || !reg_overlap_mentioned_p (operand_subword (operands[0], 1, 0, DImode),
                                    operands[1]))"
  [(set (match_dup 2) (match_dup 4))
   (set (match_dup 3) (match_dup 5))]
  "
{
  if (!register_operand (operands[0], VOIDmode)
      || !reg_overlap_mentioned_p (operand_subword (operands[0], 0, 0, DImode),
                                   operands[1]))
    {
      operands[2] = operand_subword (operands[0], 0, 0, DImode);
      operands[3] = operand_subword (operands[0], 1, 0, DImode);
      operands[4] = operand_subword (operands[1], 0, 0, DImode);
      operands[5] = operand_subword (operands[1], 1, 0, DImode);
    }
  else
    {
      operands[2] = operand_subword (operands[0], 1, 0, DImode);
      operands[3] = operand_subword (operands[0], 0, 0, DImode);
      operands[4] = operand_subword (operands[1], 1, 0, DImode);
      operands[5] = operand_subword (operands[1], 0, 0, DImode);
    }
}")

(define_split
  [(set (match_operand:DI 0 "register_operand" "")
        (match_operand:DI 1 "memory_operand" ""))]
  "!TARGET_64BIT && reload_completed
   && !fp_operand (operands[0], VOIDmode)
   && !fp_operand (operands[1], VOIDmode)
   && !s_operand (operands[1], VOIDmode)"
  [(set (match_dup 2) (match_dup 3))
   (set (match_dup 0) (mem:DI (match_dup 2)))]
  "operands[2] = operand_subword (operands[0], 1, 0, DImode);
   operands[3] = legitimize_la_operand (XEXP (operands[1], 0));")

;
; movsi instruction pattern(s).
;

;; If generating PIC code and operands[1] is a symbolic CONST, emit a
;; move to get the address of the symbolic object from the GOT.

(define_expand "movsi"
  [(set (match_operand:SI 0 "general_operand" "")
        (match_operand:SI 1 "general_operand" ""))]
  ""
  "
{
  /* Handle PIC symbolic constants.  */
  if (!TARGET_64BIT && flag_pic && SYMBOLIC_CONST (operands[1]))
    emit_pic_move (operands, SImode);

  /* expr.c tries to load an effective address using 
     force_reg.  This fails because we don't have a 
     generic load_address pattern.  Convert the move
     to a proper arithmetic operation instead, unless
     it is guaranteed to be OK.  */
  if (GET_CODE (operands[1]) == PLUS
      && !legitimate_la_operand_p (operands[1]))
    {
      operands[1] = force_operand (operands[1], operands[0]);
      if (operands[1] == operands[0])
        DONE;
    }

  /* During and after reload, we need to force constants
     to the literal pool ourselves, if necessary.  */
  if ((reload_in_progress || reload_completed)
      && CONSTANT_P (operands[1]) 
      && (!legitimate_reload_constant_p (operands[1])
          || fp_operand (operands[0], VOIDmode)))
    operands[1] = force_const_mem (SImode, operands[1]);
}")

(define_insn "*movsi_lhi"
  [(set (match_operand:SI 0 "register_operand" "=d")
        (match_operand:SI 1 "immediate_operand" "K"))]
  "GET_CODE (operands[1]) == CONST_INT
   && CONST_OK_FOR_LETTER_P (INTVAL (operands[1]), 'K')
   && !fp_operand (operands[0], VOIDmode)"
  "lhi\\t%0,%h1"
  [(set_attr "op_type" "RI")])

(define_insn "*movsi_lli"
  [(set (match_operand:SI 0 "register_operand" "=d")
        (match_operand:SI 1 "immediate_operand" "n"))]
  "TARGET_64BIT && s390_single_hi (operands[1], SImode, 0) >= 0
   && !fp_operand (operands[0], VOIDmode)"
  "*
{
  int part = s390_single_hi (operands[1], SImode, 0);
  operands[1] = GEN_INT (s390_extract_hi (operands[1], SImode, part));

  switch (part)
    {
      case 0: return \"llilh\\t%0,%x1\";
      case 1: return \"llill\\t%0,%x1\";
      default: abort ();
    }
}"
  [(set_attr "op_type" "RI")])

(define_insn "*movsi_ss"
  [(set (match_operand:SI 0 "s_operand" "=Qo")
        (match_operand:SI 1 "s_imm_operand" "Qo"))]
  ""
  "mvc\\t%O0(4,%R0),%1"	
  [(set_attr "op_type" "SS")
   (set_attr "atype"   "mem")])

(define_insn "*movsi"
  [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,m,!*f,!*f,!m")
        (match_operand:SI 1 "general_operand" "d,m,d,*f,m,*f"))]
  ""
  "@
   lr\\t%0,%1
   l\\t%0,%1
   st\\t%1,%0
   ler\\t%0,%1
   le\\t%0,%1
   ste\\t%1,%0"
  [(set_attr "op_type" "RR,RX,RX,RR,RX,RX")
   (set_attr "atype"   "reg,mem,mem,reg,mem,mem")])


;
; movhi instruction pattern(s).
;

(define_insn "movhi"
  [(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,d,m")
        (match_operand:HI 1 "general_operand" "d,n,m,d"))]
  ""
  "@
   lr\\t%0,%1
   lhi\\t%0,%h1
   lh\\t%0,%1
   sth\\t%1,%0"
  [(set_attr "op_type" "RR,RI,RX,RX")
   (set_attr "atype"   "reg,reg,mem,mem")])


;
; movqi instruction pattern(s).
;

(define_insn "movqi_64"
  [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,m,Q")
        (match_operand:QI 1 "general_operand" "d,n,m,d,n"))]
  "TARGET_64BIT"
  "@
   lr\\t%0,%1
   lhi\\t%0,%b1
   llgc\\t%0,%1
   stc\\t%1,%0
   mvi\\t%0,%b1"
  [(set_attr "op_type" "RR,RI,RXE,RX,SI")
   (set_attr "atype"   "reg,reg,mem,mem,mem")])


(define_insn "movqi"
  [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,m,Q")
        (match_operand:QI 1 "general_operand" "d,n,m,d,n"))]
  ""
  "@
   lr\\t%0,%1
   lhi\\t%0,%b1
   ic\\t%0,%1
   stc\\t%1,%0
   mvi\\t%0,%b1"
  [(set_attr "op_type" "RR,RI,RX,RX,SI")
   (set_attr "atype"   "reg,reg,mem,mem,mem")])


;
; moveqstrictqi instruction pattern(s).
;

(define_insn "*movstrictqi"
  [(set (strict_low_part (match_operand:QI 0 "register_operand" "+d"))
                         (match_operand:QI 1 "memory_operand" "m"))]
  ""
  "ic\\t%0,%1"
  [(set_attr "op_type"  "RX")
   (set_attr "atype"    "mem")])

;
; movstricthi instruction pattern(s).
;

(define_insn "*movstricthi"
  [(set (strict_low_part (match_operand:HI 0 "register_operand" "+d"))
                         (match_operand:HI 1 "s_imm_operand" "Qo"))
   (clobber (reg:CC 33))]
  ""
  "icm\\t%0,3,%1"
  [(set_attr "op_type" "RS")
   (set_attr "atype"   "mem")])


;
; movstrictsi instruction pattern(s).
;

(define_insn "movestrictsi"
  [(set (strict_low_part (match_operand:SI 0 "register_operand" "+d,d"))
                         (match_operand:SI 1 "general_operand" "d,m"))]
  "TARGET_64BIT"
  "@
   lr\\t%0,%1
   l\\t%0,%1"
  [(set_attr "op_type" "RR,RS")
   (set_attr "atype"   "reg,mem")])


;
; movdf instruction pattern(s).
;

(define_expand "movdf"
  [(set (match_operand:DF 0 "nonimmediate_operand" "")
        (match_operand:DF 1 "general_operand"  ""))]
  ""
  "
{
  /* During and after reload, we need to force constants
     to the literal pool ourselves, if necessary.  */
  if ((reload_in_progress || reload_completed)
      && CONSTANT_P (operands[1]))
    operands[1] = force_const_mem (DFmode, operands[1]);
}")

(define_insn "*movdf_ss"
  [(set (match_operand:DF 0 "s_operand" "=Qo")
        (match_operand:DF 1 "s_imm_operand" "Qo"))]
  ""
  "mvc\\t%O0(8,%R0),%1"	
  [(set_attr "op_type" "SS")
   (set_attr "atype"   "mem")])

(define_insn "*movdf_64"
  [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,m,d,d,m")
        (match_operand:DF 1 "general_operand" "f,m,f,d,m,d"))]
  "TARGET_64BIT"
  "@
   ldr\\t%0,%1
   ld\\t%0,%1
   std\\t%1,%0
   lgr\\t%0,%1
   lg\\t%0,%1
   stg\\t%1,%0"
  [(set_attr "op_type" "RR,RX,RX,RRE,RXE,RXE")
   (set_attr "atype"   "reg,mem,mem,reg,mem,mem")])

(define_insn "*movdf_31"
  [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,m,d,Q,d,m")
        (match_operand:DF 1 "general_operand" "f,m,f,Q,d,dKm,d"))]
  "!TARGET_64BIT"
  "@
   ldr\\t%0,%1
   ld\\t%0,%1
   std\\t%1,%0
   lm\\t%0,%N0,%1
   stm\\t%1,%N1,%0
   #
   #"
  [(set_attr "op_type" "RR,RX,RX,RS,RS,NN,NN")
   (set_attr "atype"   "reg,mem,mem,mem,mem,*,*")])

(define_split
  [(set (match_operand:DF 0 "nonimmediate_operand" "")
        (match_operand:DF 1 "general_operand" ""))]
  "!TARGET_64BIT && reload_completed
   && !fp_operand (operands[0], VOIDmode)
   && !fp_operand (operands[1], VOIDmode)
   && !s_operand (operands[0], VOIDmode)
   && !s_operand (operands[1], VOIDmode)
   && (register_operand (operands[0], VOIDmode)
       || register_operand (operands[1], VOIDmode))
   && (!register_operand (operands[0], VOIDmode)
       || !reg_overlap_mentioned_p (operand_subword (operands[0], 0, 0, DFmode),
                                    operands[1])
       || !reg_overlap_mentioned_p (operand_subword (operands[0], 1, 0, DFmode),
                                    operands[1]))"
  [(set (match_dup 2) (match_dup 4))
   (set (match_dup 3) (match_dup 5))]
  "
{
  if (!register_operand (operands[0], VOIDmode)
      || !reg_overlap_mentioned_p (operand_subword (operands[0], 0, 0, DFmode),
                                   operands[1]))
    {
      operands[2] = operand_subword (operands[0], 0, 0, DFmode);
      operands[3] = operand_subword (operands[0], 1, 0, DFmode);
      operands[4] = operand_subword (operands[1], 0, 0, DFmode);
      operands[5] = operand_subword (operands[1], 1, 0, DFmode);
    }
  else
    {
      operands[2] = operand_subword (operands[0], 1, 0, DFmode);
      operands[3] = operand_subword (operands[0], 0, 0, DFmode);
      operands[4] = operand_subword (operands[1], 1, 0, DFmode);
      operands[5] = operand_subword (operands[1], 0, 0, DFmode);
    }
}")

(define_split
  [(set (match_operand:DF 0 "register_operand" "")