ns32k.h

gcc3.2.1源代码

{								\
  int regno;							\
  int offset = -4;						\
  for (regno = 0; regno < L1_REGNUM; regno++)			\
    if (regs_ever_live[regno] && ! call_used_regs[regno])	\
      offset += 4;						\
  for (; regno < FRAME_POINTER_REGNUM; regno++)			\
    if (regs_ever_live[regno] && ! call_used_regs[regno])	\
      offset += 8;						\
  if (flag_pic && current_function_uses_pic_offset_table)	\
    offset += 4;						\
  (DEPTH) = (offset + get_frame_size ()				\
	     + (get_frame_size () == 0 ? 0 : 4));		\
}


/* Output assembler code for a block containing the constant parts
   of a trampoline, leaving space for the variable parts.  */

/* On the 32k, the trampoline looks like this:
     addr  0(pc),r2
     jump  @__trampoline
     .int STATIC
     .int FUNCTION
Doing trampolines with a library assist function is easier than figuring
out how to do stores to memory in reverse byte order (the way immediate
operands on the 32k are stored).  */

#define TRAMPOLINE_TEMPLATE(FILE)					\
{									\
  fprintf (FILE, "\taddr 0(pc),r2\n" );					\
  fprintf (FILE, "\tjump " );						\
  PUT_ABSOLUTE_PREFIX (FILE);						\
  fprintf (FILE, "__trampoline\n" );					\
  assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);		\
  assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);		\
}

/* Length in units of the trampoline for entering a nested function.  */

#define TRAMPOLINE_SIZE 20

/* Emit RTL insns to initialize the variable parts of a trampoline.
   FNADDR is an RTX for the address of the function's pure code.
   CXT is an RTX for the static chain value for the function.  */

#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT)			     \
{									     \
  emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT);    \
  emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), FNADDR); \
}

/* This is the library routine that is used
   to transfer control from the trampoline
   to the actual nested function.  */

/* The function name __transfer_from_trampoline is not actually used.
   The function definition just permits use of "asm with operands"
   (though the operand list is empty).  */
#define TRANSFER_FROM_TRAMPOLINE	\
void					\
__transfer_from_trampoline ()		\
{					\
  asm (".globl __trampoline");		\
  asm ("__trampoline:");		\
  asm ("movd 16(r2),tos");		\
  asm ("movd 12(r2),r1");		\
  asm ("ret 0");			\
}

/* Addressing modes, and classification of registers for them.  */

/* #define HAVE_POST_INCREMENT 0 */
/* #define HAVE_POST_DECREMENT 0 */

/* #define HAVE_PRE_DECREMENT 0 */
/* #define HAVE_PRE_INCREMENT 0 */

/* Macros to check register numbers against specific register classes.  */

/* These assume that REGNO is a hard or pseudo reg number.
   They give nonzero only if REGNO is a hard reg of the suitable class
   or a pseudo reg currently allocated to a suitable hard reg.
   Since they use reg_renumber, they are safe only once reg_renumber
   has been allocated, which happens in local-alloc.c.  */

/* note that FP and SP cannot be used as an index. What about PC? */
#define REGNO_OK_FOR_INDEX_P(REGNO)  \
((REGNO) < F0_REGNUM || (unsigned)reg_renumber[REGNO] < F0_REGNUM)
#define REGNO_OK_FOR_BASE_P(REGNO)   \
((REGNO) < F0_REGNUM || (unsigned)reg_renumber[REGNO] < F0_REGNUM \
 || (REGNO) == FRAME_POINTER_REGNUM || (REGNO) == STACK_POINTER_REGNUM)

#define FP_REG_P(X) \
 (GET_CODE (X) == REG && REGNO (X) >= F0_REGNUM && REGNO (X) < FRAME_POINTER_REGNUM)

/* Maximum number of registers that can appear in a valid memory address.  */

#define MAX_REGS_PER_ADDRESS 2

/* Recognize any constant value that is a valid address.
   This might not work on future ns32k processors as negative
   displacements are not officially allowed but a mode reserved
   to National.  This works on processors up to 32532, though,
   and we don't expect any new ones in the series ;-( */

#define CONSTANT_ADDRESS_P(X)   \
  (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF		\
   || GET_CODE (X) == CONST						\
   || (GET_CODE (X) == CONST_INT					\
       && NS32K_DISPLACEMENT_P (INTVAL (X))))

#define CONSTANT_ADDRESS_NO_LABEL_P(X)   \
  (GET_CODE (X) == CONST_INT						\
   && NS32K_DISPLACEMENT_P (INTVAL (X)))

/* Return the register class of a scratch register needed to copy IN into
   or out of a register in CLASS in MODE.  If it can be done directly,
   NO_REGS is returned.  */

#define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
  secondary_reload_class (CLASS, MODE, IN)

/*  Certain machines have the property that some registers cannot be
    copied to some other registers without using memory.  Define this
    macro on those machines to be a C expression that is non-zero if
    objects of mode M in registers of CLASS1 can only be copied to
    registers of class CLASS2 by storing a register of CLASS1 into
    memory and loading that memory location into a register of CLASS2.

    On the ns32k, floating point regs can only be loaded through memory

    The movdf and movsf insns in ns32k.md copy between general and
    floating registers using the stack. In principle, we could get
    better code not allowing that case in the constraints and defining
    SECONDARY_MEMORY_NEEDED in practice, though the stack slots used
    are not available for optimization.  */

#if 0
#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, M)			\
     secondary_memory_needed(CLASS1, CLASS2, M)
#endif

/* SMALL_REGISTER_CLASSES is a run time option. This should no longer
   be necessay and should go when we have confidence that we won't run
   out of spill registers */
#define SMALL_REGISTER_CLASSES (target_flags & 1024)

/* A C expression whose value is nonzero if pseudos that have been
   assigned to registers of class CLASS would likely be spilled
   because registers of CLASS are needed for spill registers.

   The default definition won't do because class LONG_FLOAT_REG0 has two
   registers which are always accessed as a pair */

#define CLASS_LIKELY_SPILLED_P(CLASS) \
  (reg_class_size[(int) (CLASS)] == 1 || (CLASS) == LONG_FLOAT_REG0)


/* Nonzero if the constant value X is a legitimate general operand.
   It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.  */

#define LEGITIMATE_CONSTANT_P(X) 1

/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
   and check its validity for a certain class.
   We have two alternate definitions for each of them.
   The usual definition accepts all pseudo regs; the other rejects
   them unless they have been allocated suitable hard regs.
   The symbol REG_OK_STRICT causes the latter definition to be used.

   Most source files want to accept pseudo regs in the hope that
   they will get allocated to the class that the insn wants them to be in.
   Source files for reload pass need to be strict.
   After reload, it makes no difference, since pseudo regs have
   been eliminated by then.  */

#ifndef REG_OK_STRICT

/* Nonzero if X is a hard reg that can be used as an index
   or if it is a pseudo reg.  */
#define REG_OK_FOR_INDEX_P(X) \
  (REGNO (X) < F0_REGNUM || REGNO (X) >= FIRST_PSEUDO_REGISTER)
/* Nonzero if X is a hard reg that can be used as a base reg
   of if it is a pseudo reg.  */
#define REG_OK_FOR_BASE_P(X) (REGNO (X) < F0_REGNUM || REGNO (X) >= FRAME_POINTER_REGNUM)
/* Nonzero if X is a floating point reg or a pseudo reg.  */

#else

/* Nonzero if X is a hard reg that can be used as an index.  */
#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
/* Nonzero if X is a hard reg that can be used as a base reg.  */
#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))

#endif

/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
   that is a valid memory address for an instruction.
   The MODE argument is the machine mode for the MEM expression
   that wants to use this address.

   The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS.  */

/* 1 if X is an address that we could indirect through.  */
/***** NOTE ***** There is a bug in the Sequent assembler which fails
 to fixup addressing information for symbols used as offsets
 from registers which are not FP or SP (or SB or PC).  This
 makes _x(fp) valid, while _x(r0) is invalid.  */

#define INDIRECTABLE_1_ADDRESS_P(X)  \
  (CONSTANT_ADDRESS_P (X)						\
   || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X))			\
   || (GET_CODE (X) == PLUS						\
       && GET_CODE (XEXP (X, 0)) == REG					\
       && REG_OK_FOR_BASE_P (XEXP (X, 0))				\
       && ((flag_pic || TARGET_HIMEM) ? 				\
	     CONSTANT_ADDRESS_NO_LABEL_P (XEXP (X, 1))	 		\
	   :								\
	     CONSTANT_ADDRESS_P (XEXP (X, 1))) 				\
       && (GET_CODE (X) != CONST_INT || NS32K_DISPLACEMENT_P (INTVAL (X)))))

/* 1 if integer I will fit in a 4 byte displacement field.
   Strictly speaking, we can't be sure that a symbol will fit this range.
   But, in practice, it always will.  */

/* [e-mail] says that the 32016 and 32032
   can handle the full range of displacements--it is only the addresses
   that have a limited range.  So the following was deleted:
 (((i) <= 16777215 && (i) >= -16777216)
  || ((TARGET_32532 || TARGET_32332) && ...))  */
#define NS32K_DISPLACEMENT_P(i) 				\
  ((i) < (1 << 29) && (i) >= - (1 << 29))

/* Check for frame pointer or stack pointer.  */
#define MEM_REG(X) \
  (GET_CODE (X) == REG && (REGNO (X) == FRAME_POINTER_REGNUM  \
			   || REGNO(X) == STACK_POINTER_REGNUM))

/* A memory ref whose address is the FP or SP, with optional integer offset,
   or (on certain machines) a constant address.  */
#define INDIRECTABLE_2_ADDRESS_P(X)  \
  (GET_CODE (X) == MEM							\
   && (((xfoo0 = XEXP (X, 0), MEM_REG (xfoo0))				\
       || (GET_CODE (xfoo0) == PLUS					\
	   && MEM_REG (XEXP (xfoo0, 0))					\
	   && CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfoo0, 1))))		\
       || (TARGET_SB && CONSTANT_ADDRESS_P (xfoo0))))

/* Go to ADDR if X is a valid address not using indexing.
   (This much is the easy part.)  */
#define GO_IF_NONINDEXED_ADDRESS(X, ADDR)		\
{ 							\
  if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR;		\
  if (INDIRECTABLE_2_ADDRESS_P (X)) goto ADDR;		\
  if (GET_CODE (X) == PLUS)				\
    if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (X, 1)))	\
      if (INDIRECTABLE_2_ADDRESS_P (XEXP (X, 0)))	\
	goto ADDR;					\
}

/* Go to ADDR if X is a valid address not using indexing.
   (This much is the easy part.)  */
#define GO_IF_INDEXING(X, MODE, ADDR)  \
{ register rtx xfoob = (X);						\
  if (GET_CODE (xfoob) == PLUS && INDEX_TERM_P (XEXP (xfoob, 0), MODE))	\
    GO_IF_INDEXABLE_ADDRESS (XEXP (xfoob, 1), ADDR);			\
  if (GET_CODE (xfoob) == PLUS && INDEX_TERM_P (XEXP (xfoob, 1), MODE))	\
    GO_IF_INDEXABLE_ADDRESS (XEXP (xfoob, 0), ADDR); }			\

#define GO_IF_INDEXABLE_ADDRESS(X, ADDR) \
{ if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR;		\
  if (INDIRECTABLE_2_ADDRESS_P (X)) goto ADDR;				\
  if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR;				\
}

/* 1 if PROD is either a reg times size of mode MODE
   or just a reg, if MODE is just one byte. Actually, on the ns32k,
   since the index mode is independent of the operand size,
   we can match more stuff...

   This macro's expansion uses the temporary variables xfoo0, xfoo1
   and xfoo2 that must be declared in the surrounding context.  */
#define INDEX_TERM_P(PROD, MODE)   \
((GET_CODE (PROD) == REG && REG_OK_FOR_INDEX_P (PROD))			\
 || (GET_CODE (PROD) == MULT						\
     &&	(xfoo0 = XEXP (PROD, 0), xfoo1 = XEXP (PROD, 1),		\
	 (GET_CODE (xfoo1) == CONST_INT					\
	  && GET_CODE (xfoo0) == REG					\
	  && FITS_INDEX_RANGE (INTVAL (xfoo1))				\
	  && REG_OK_FOR_INDEX_P (xfoo0)))))

#define FITS_INDEX_RANGE(X)  \
  ((xfoo2 = (unsigned)(X)-1),						\
   ((xfoo2 < 4 && xfoo2 != 2) || xfoo2 == 7))

/* Note that xfoo0, xfoo1, xfoo2 are used in some of the submacros above.  */
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)				\
{ register rtx xfooy, xfoo0, xfoo1;					\
  unsigned xfoo2;							\
  xfooy = X;								\
  if (flag_pic && cfun && ! current_function_uses_pic_offset_table	\
      && global_symbolic_reference_mentioned_p (X, 1))			\
    current_function_uses_pic_offset_table = 1;				\
  GO_IF_NONINDEXED_ADDRESS (xfooy, ADDR);				\
  if (GET_CODE (xfooy) == PLUS)						\
    {									\
      if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfooy, 1))			\
	  && GET_CODE (XEXP (xfooy, 0)) == PLUS)			\
	xfooy = XEXP (xfooy, 0);					\
      else if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfooy, 0))		\
	  && GET_CODE (XEXP (xfooy, 1)) == PLUS)			\
	xfooy = XEXP (xfooy, 1);					\
      GO_IF_INDEXING (xfooy, MODE, ADDR);				\
    }									\
  else if (INDEX_TERM_P (xfooy, MODE))					\
    goto ADDR;								\
  else if (GET_CODE (xfooy) == PRE_DEC)					\
    {									\
      if (REGNO (XEXP (xfooy, 0)) == STACK_POINTER_REGNUM) goto ADDR;	\
      else abort ();							\
    }									\
}

/* Try machine-dependent ways of modifying an illegitimate address
   to be legitimate.  If we find one, return the new, valid address.
   This macro is used in only one place: `memory_address' in explow.c.

   OLDX is the address as it was before break_out_memory_refs was called.
   In some cases it is useful to look at this to decide what needs to be done.

   MODE and WIN are passed so that this macro can use
   GO_IF_LEGITIMATE_ADDRESS.

   It is always safe for this macro to do nothing.  It exists to recognize
   opportunities to optimize the output.

   For the ns32k, we do nothing */

#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN)   {}

/* Nonzero if the constant value X is a legitimate general operand
   when generating PIC code.  It is given that flag_pic is on and
   that X satisfies CONSTANT_P or is a CONST_DOUBLE.  */

#define LEGITIMATE_PIC_OPERAND_P(X) \
  (((! current_function_uses_pic_offset_table			\
     && symbolic_reference_mentioned_p (X))?			\
      (current_function_uses_pic_offset_table = 1):0		\
   ), (! SYMBOLIC_CONST (X)					\
   || GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == LABEL_REF))