a64008.s

mips架构的bootloader,99左右的版本 但源代码现在没人更新了

/*************************************************************
 * File: lib/a64008.s
 * Purpose: Part of C runtime library
 * Author: Phil Bunce ([e-mail])
 * Revision History:
 *	970304	Start of revision history
 */

#ifndef LR64008
#define LR64008
#endif
#include <mips.h>

	############# MPEG-II Transport (LR64008) #################
	.globl a64008init
	.ent a64008init
a64008init:
	beq	a0,zero,1f
	j	c64008init
    1:

	# check to see what type of memory we have
	# first program cs1
	li	t0,0xbff40410
	li	t1,0x60
	sh	t1,(t0)
	li	t1,2
	sh	t1,2(t0)

	# now read the dip switches
	li	t0,0xa1000000
	lhu	t1,(t0)

	# assume the 1MB case
	# TI=3 WC=0 AP=10 AM=0 DM=0 PSZ=00
	li	t4,0x320

	# bit7=sw7 bit6=sw6
	# 2MB: bit7=1 bit6=1    1MB: bit7=0 bit6=1
	and	t1,(1<<7)	# sw7
	beq	t1,zero,2f	# brif 1MB

	# 2MB case
	li	t4,0x322
   2:
	li	t0,M_08_DRAMC
	sh	t4,(t0)

	/* BBCC register */
	li	t0,M_08_BBCC
	/* drefill=4 dcen irefill=4 is1en icen */
	#li	t1,0x00000048   /* Disable both caches */
	#li	t1,0x00000059	/* Enable both Caches refill=4 */
	li	t1,0x00000019	/* Enable both Caches drf=1 irf=4 */
	sw	t1,(t0)

        # set flash access time
        li      t0,0xbff40404
        #li     t1,0x0351      #/* 3,10,1 default */
        #li     t1,0x0319      #/* 3,3,1 ok */
        #li     t1,0x0211      #/* 2,2,1 ok */
        li      t1,0x0010      #/* 0,2,0 best */
        #li     t1,0x0109      #/* 1,1,1 bad */
        sh      t1,(t0)
 
        # set cs3
        li      t0,0xbff40430
        li      t1,0x20
        sh      t1,(t0)
        li      t0,0xbff40432
        li      t1,0x000a
        sh      t1,(t0)
 
        # send reset to on-board logic
        li      t0,0xa1000000
        li      t1,0xffff
        sh      t1,(t0)

	# select the correct cache flushing routines
	la	s0,r4001_flush

	j	ra
	.end a64008init